1 /***************************************************************************//** 2 * \file cy_flash.h 3 * \version 3.70 4 * 5 * Provides the API declarations of the Flash driver. 6 * 7 ******************************************************************************** 8 * \copyright 9 * Copyright 2016-2021 Cypress Semiconductor Corporation 10 * SPDX-License-Identifier: Apache-2.0 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 *******************************************************************************/ 24 25 #if !defined (CY_FLASH_H) 26 #define CY_FLASH_H 27 28 /** 29 * \addtogroup group_flash 30 * \{ 31 * Internal flash memory programming 32 * 33 * The functions and other declarations used in this driver are in cy_flash.h. 34 * You can include cy_pdl.h to get access to all functions 35 * and declarations in the PDL. 36 * 37 * Flash memory in PSoC devices provides non-volatile storage for user firmware, 38 * user configuration data, and bulk data storage. 39 * 40 * Flash operations are implemented as system calls. System calls are executed 41 * out of SROM in the privileged mode of operation. Users have no access to read 42 * or modify the SROM code. The driver API requests the system call by acquiring 43 * the Inter-processor communication (IPC) and writing the SROM function opcode 44 * and parameters to its input registers. As a result, an NMI interrupt is invoked 45 * and the requested SROM function is executed. The operation status is returned 46 * to the driver context and a release interrupt is triggered. 47 * 48 * Writing to flash can take up to 20 milliseconds. During this time, 49 * the device should not be reset (including XRES pin, software reset, and 50 * watchdog) or unexpected changes may be made to portions of the flash. 51 * Also, the low-voltage detect circuits should be configured to generate an 52 * interrupt instead of a reset. 53 * 54 * A Read while Write violation occurs when a flash Read operation is initiated 55 * in the same or neighboring (neighboring restriction is applicable just for the 56 * CY8C6xx6, CY8C6xx7 devices) flash sector where the flash Write, Erase, or 57 * Program operation is working. This violation may cause a HardFault exception. 58 * To avoid the Read while Write violation, carefully split the 59 * Read and Write operation on flash sectors which are not neighboring, 60 * considering both cores in the multi-processor device. If the flash is divided 61 * into four equal sectors, you may edit the linker script to place the code 62 * into neighboring sectors. For example, use sectors number 0 and 1 for code 63 * and sectors 2 and 3 for data storage. 64 * 65 * \section group_flash_configuration Configuration Considerations 66 * 67 * \subsection group_flash_config_intro Introduction: 68 * The CAT1A devices user-programmable Flash consists of: 69 * - Application flash memory (from 2 to 8 sectors) - 128KB/256KB each. 70 * - EE emulation flash memory - 32KB. 71 * 72 * The CAT1C devices user-programmable Flash consists of: 73 * - Work flash region has 48 large sectors of 2 KB and 256 small sectors of 128 B. 74 * 75 * Write operation may be done as Blocking or Partially Blocking, 76 * defined as follows: 77 * 78 * \subsection group_flash_config_blocking Blocking: 79 * In this case, the entire Flash block is not available for the duration of the 80 * Write (∼16ms). Therefore, no Flash accesses (from any Bus Master) can 81 * occur during that time. CPU execution can be performed from SRAM. All 82 * pre-fetching must be disabled. Code execution from Flash is blocked for the 83 * Flash Write duration for both cores. 84 * 85 * \subsection group_flash_config_block_const Constraints for Blocking Flash operations: 86 * -# During write to flash, the device should not be reset (including XRES pin, 87 * software reset, and watchdog), or unexpected changes may be made to portions 88 * of the flash. 89 * -# The low-voltage detect circuits should be configured to generate an 90 * interrupt instead of a reset. 91 * -# Flash write operation in CAT1A devices is allowed only in one of the following CM4 states: 92 * -# CM4 is Active and initialized:<br> 93 * call \ref Cy_SysEnableCM4 "Cy_SysEnableCM4(CY_CORTEX_M4_APPL_ADDR)". 94 * <b>Note:</b> If desired user may put CM4 core in Deep Sleep any time 95 * after calling Cy_SysEnableCM4(). 96 * -# CM4 is Off and disabled:<br> 97 * call Cy_SysDisableCM4(). <b>Note:</b> In this state Debug mode is not 98 * supported. 99 * 100 * -# Flash Write cannot be performed in Ultra Low Power (core voltage 0.9V) mode. 101 * -# Interrupts must be enabled on both active cores. Do not enter a critical 102 * section during flash operation. 103 * -# For the CY8C6xx6, CY8C6xx7 devices user must guarantee that system pipe 104 * interrupts (IPC interrupts 3 and 4) have the highest priority, or 105 * at least that pipe interrupts are not interrupted or in a pending state 106 * for more than 700 µs. 107 * -# For CAT1A devices user must guarantee that during flash write operation no flash read 108 * operations are performed by bus masters other than CM0+ and CM4 (DMA and 109 * Crypto). 110 * -# For the CY8C6xx6, CY8C6xx7 devices if you do not use the default startup, perform the following steps 111 * before any flash write/erase operations: 112 * \snippet flash/snippet/main.c Flash Initialization 113 * 114 * \subsection group_flash_config_rww Partially Blocking: 115 * This method has a much shorter time window during which Flash accesses are not 116 * allowed. Application code execution from Flash is blocked for only a part of 117 * Flash Write duration, for both cores. Blocking duration depends upon the API 118 * sequence used. 119 * 120 * For CAT1A Devices API sequence Cy_Flash_StartEraseRow() + Cy_Flash_StartProgram() there are 121 * four block-out regions during which Read is blocked. See <b>Figure 1</b>. 122 * 123 * For CAT1C devices Flash memory controller has the dual bank mode feature. When using dual bank mode, 124 * flash memory region is split into two half banks. One is called Logical Bank 0 and the other is called Logical Bank 1 125 * User will be able to read from a different logical bank while writing to one logical bank. 126 * 127 * For CAT1C devices Erase ROW is not supported. User has to erase the entire sector before writing to the sector. 128 * 129 * CM7 cores in CAT1C devices support Data Cache. Data Cache line is 32 bytes. 130 * User needs to make sure that the pointer passed to the following functions points to 32 byte aligned data. 131 * Cy_Flash_StartWrite, Cy_Flash_ProgramRow, Cy_Flash_Program and Cy_Flash_Program_WorkFlash. 132 * User can use CY_ALIGN(32) macro for 32 byte alignment. 133 * 134 * <center> 135 * <table class="doxtable"> 136 * <caption>Table 1 - Block-out periods (timing values are valid just for the 137 * CY8C6xx6, CY8C6xx7 devices) </caption> 138 * <tr> 139 * <th>Block-out</th> 140 * <th>Phase</th> 141 * <th>Duration</th> 142 * </tr> 143 * <tr> 144 * <td>A</td> 145 * <td>The beginning of the Erase operation</td> 146 * <td>2ms + 9500 SlowClk cycles</td> 147 * </tr> 148 * <tr> 149 * <td>B</td> 150 * <td>The end of the Erase operation</td> 151 * <td>0.13ms + 1000 SlowClk cycles</td> 152 * </tr> 153 * <tr> 154 * <td>C</td> 155 * <td>The beginning of the Program operation</td> 156 * <td>0.8ms + 6000 SlowClk cycles</td> 157 * </tr> 158 * <tr> 159 * <td>D</td> 160 * <td>The end of the Program operation</td> 161 * <td>0.13ms + 1000 SlowClk cycles</td> 162 * </tr> 163 * </table> 164 * </center> 165 * 166 * This allows both cores to execute for about 80% of Flash Write 167 * operation - see <b>Figure 1</b>. 168 * This capability is important for communication protocols that rely on fast 169 * response. 170 * 171 * \image html flash-rww-diagram.png "Figure 1 - Blocking Intervals in Flash Write operation" 172 * 173 * For the Cy_Flash_StartWrite() function, the block-out period is different for 174 * the two cores. The core that initiates Cy_Flash_StartWrite() is blocked for 175 * two periods: 176 * - From start of Erase operation (start of A on Figure 1) till the start of 177 * Program operation (end of C on Figure 1). 178 * - During D period on <b>Figure 1</b>. 179 * 180 * The core that performs read/execute is blocked identically to the previous 181 * scenario - see <b>Figure 1</b>. 182 * 183 * This allows the core that initiates Cy_Flash_StartWrite() to execute for about 184 * 20% of Flash Write operation. The other core executes for about 80% of Flash 185 * Write operation. 186 * 187 * Some constraints must be planned for in the Partially Blocking mode which are 188 * described in detail below. 189 * 190 * \subsection group_flash_config_rww_const Constraints for Partially Blocking Flash operations: 191 * -# During write to flash, the device should not be reset (including XRES pin, 192 * software reset, and watchdog) or unexpected changes may be made to portions 193 * of the flash. 194 * -# The low-voltage detect circuits should be configured to generate an 195 * interrupt instead of a reset. 196 * -# During write to flash, application code should not change the clock 197 * settings. Use Cy_Flash_IsOperationComplete() to ensure flash write 198 * operation is finished. 199 * -# During write to flash, application code should not start the clock 200 * measurements (should not call Cy_SysClk_StartClkMeasurementCounters()). 201 * -# For CAT1A devices Flash write operation is allowed only in one of the following CM4 states: 202 * -# CM4 is Active and initialized:<br> 203 * call \ref Cy_SysEnableCM4 "Cy_SysEnableCM4(CY_CORTEX_M4_APPL_ADDR)". 204 * <b>Note:</b> If desired user may put CM4 core in Deep Sleep any time 205 * after calling Cy_SysEnableCM4(). 206 * -# CM4 is Off and disabled:<br> 207 * call Cy_SysDisableCM4(). <b>Note:</b> In this state Debug mode is not 208 * supported. 209 * . 210 * -# For CAT1C devices flash write operation is only allowed after the sector in erased. 211 * -# For CAT1A devices use the following rules for split by sectors. (In this context, read means 212 * read of any bus master: CM0+, CM4, DMA, Crypto, etc.) 213 * -# Do not write to and read/execute from the same flash sector at the same 214 * time. This is true for all sectors. 215 * -# Writing rules in application flash (this restriction is applicable just 216 * for CY8C6xx6, CY8C6xx7 devices): 217 * -# Any bus master can read/execute from UFLASH S0 and/or S1, during 218 * flash write to UFLASH S2 or S3. 219 * -# Any bus master can read/execute from UFLASH S2 and/or S3, during 220 * flash write to UFLASH S0 or S1. 221 * 222 * <b>Suggestion:</b> in case of bootloading, it is recommended to place 223 * code for CM4 in either S0 or S1. CM0+ code resides in S0. Write data 224 * to S2 and S3 sections. 225 * . 226 * -# Flash Write cannot be performed in Ultra Low Power mode (core voltage 0.9V). 227 * -# Interrupts must be enabled on both active cores. Do not enter a critical 228 * section during flash operation. 229 * -# For the CY8C6xx6, CY8C6xx7 devices user must guarantee that system pipe 230 * interrupts (IPC interrupts 3 and 4) have the highest priority, or at 231 * least that pipe interrupts are not interrupted or in a pending state 232 * for more than 700 µs. 233 * -# For the CY8C6xx6, CY8C6xx7 devices if you do not use the default startup, perform the following steps 234 * before any flash write/erase operations: 235 * \snippet flash/snippet/main.c Flash Initialization 236 * 237 * \subsection group_flash_config_emeeprom EEPROM section use: 238 * If you plan to use "cy_em_eeprom" section for different purposes for both of 239 * device cores or use <b>Em_EEPROM Middleware</b> together with flash driver 240 * write operations you must modify the linker scripts.<br> 241 * For more information, refer to the <b>Middleware/Cypress Em_EEPROM Middleware 242 * Library</b> section of the PDL documentation. 243 * 244 * \section group_flash_more_information More Information 245 * 246 * See the technical reference manual (TRM) for more information about the Flash 247 * architecture. 248 * 249 * \section group_flash_changelog Changelog 250 * 251 * <table class="doxtable"> 252 * <tr><th>Version</th><th style="width: 52%;">Changes</th><th>Reason for Change</th></tr> 253 * <tr> 254 * <td>3.70</td> 255 * <td>Fixed MISRA 2012 violations and Documentation Update.</td> 256 * <td>MISRA 2012 compliance.</td> 257 * </tr> 258 * <tr> 259 * <td>3.60</td> 260 * <td>Added API's to support new product family. Enhancement for support of eCT flash.</td> 261 * <td>eCT flash's contains Code flash and Work flash. New API's to program/erase both work flash and code flash are added.</td> 262 * </tr> 263 * <tr> 264 * <td>3.50.1</td> 265 * <td>Updated documentation to limit devices with the restrictions.</td> 266 * <td>User experience enhancement.</td> 267 * </tr> 268 * <tr> 269 * <td rowspan="2">3.50</td> 270 * <td>Updated attribute usage for the linker section placement.</td> 271 * <td>Enhancement based on usability feedback.</td> 272 * </tr> 273 * <tr> 274 * <td>Fixed/documented MISRA 2012 violations.</td> 275 * <td>MISRA 2012 compliance.</td> 276 * </tr> 277 * <tr> 278 * <td rowspan="1">3.40</td> 279 * <td>Updated Cy_Flash_OperationStatus() to access protected registers.</td> 280 * <td>Added PSoC 64 device support.</td> 281 * </tr> 282 * <tr> 283 * <td rowspan="1">3.30.4</td> 284 * <td>Improved documentation.</td> 285 * <td>User experience enhancement.</td> 286 * </tr> 287 * <tr> 288 * <td rowspan="1">3.30.3</td> 289 * <td>Updated documentation to limit devices with the restrictions. Improved calculation of the CY_FLASH_DELAY_CORRECTIVE macro.</td> 290 * <td>User experience enhancement.</td> 291 * </tr> 292 * <tr> 293 * <td rowspan="1">3.30.2</td> 294 * <td>Updated documentation to limit devices with the neighboring restriction.</td> 295 * <td>User experience enhancement.</td> 296 * </tr> 297 * <tr> 298 * <td rowspan="1">3.30.1</td> 299 * <td>Used the CY_RAMFUNC_BEGIN and CY_RAMFUNC_END macros that allocate the function in RAM instead of using the CY_SECTION(".cy_ramfunc") macros.</td> 300 * <td>Removed the code duplication.</td> 301 * </tr> 302 * <tr> 303 * <td rowspan="3">3.30</td> 304 * <td>Moved ipcWaitMessageStc structure to the RAM section called ".cy_sharedmem".</td> 305 * <td>Support Secure Boot devices.</td> 306 * </tr> 307 * <tr> 308 * <td>Renamed Function Cy_Flash_StartErase() to Cy_Flash_StartEraseRow().</td> 309 * <td>The driver improvements based on the usability feedback.</td> 310 * </tr> 311 * <tr> 312 * <td>Added new API functions \ref Cy_Flash_EraseSector, 313 * \ref Cy_Flash_StartEraseSector, \ref Cy_Flash_EraseSubsector, 314 * \ref Cy_Flash_StartEraseSubsector </td> 315 * <td>The driver improvements based on the usability feedback.</td> 316 * </tr> 317 * <tr> 318 * <td rowspan="3">3.20</td> 319 * <td>Flattened the organization of the driver source code into the single source directory and the single include directory.</td> 320 * <td>Driver library directory-structure simplification.</td> 321 * </tr> 322 * <tr> 323 * <td>Added new API function \ref Cy_Flash_InitExt</td> 324 * <td>The driver improvements based on the usability feedback</td> 325 * </tr> 326 * <tr> 327 * <td>Added register access layer. Use register access macros instead 328 * of direct register access using dereferenced pointers.</td> 329 * <td>Makes register access device-independent, so that the PDL does 330 * not need to be recompiled for each supported part number.</td> 331 * </tr> 332 * <tr> 333 * <td>3.11</td> 334 * <td>Updated driver functionality to correctly use the SysClk measurement 335 * counters while partially blocking flash operations</td> 336 * <td>Added arbiter mechanism for correct usage of the SysClk measurement 337 * counters</td> 338 * </tr> 339 * <tr> 340 * <td>3.10</td> 341 * <td>Updated Cy_Flash_SendCmd() code to support single core devices.</td> 342 * <td>Support new devices</td> 343 * </tr> 344 * <tr> 345 * <td>3.0</td> 346 * <td>New function - Cy_Flash_ProgramRow();<br> 347 * Updated Cy_Flash_RowChecksum(): changed input parameter to take the 348 * <b>row address</b> (rowAddr) instead of the <b>row number</b> 349 * (rowNum);<br> 350 * Renamed macro for disabling RWW support in driver to 351 * <b>CY_FLASH_RWW_DRV_SUPPORT_DISABLED</b>.<br> 352 * Updated \ref group_flash_configuration documentation section with 353 * flash usage constraints.</td> 354 * <td>Improvements made based on usability feedback to use a common 355 * interface</td> 356 * </tr> 357 * <tr> 358 * <td rowspan="3">2.0</td> 359 * <td>Added non-blocking erase function - Cy_Flash_StartErase(). 360 * Removed the clear cache function call.</td> 361 * <td>The clear cache operation is removed from the blocking Write/Erase 362 * function because in this case it is performed by the hardware. 363 * Otherwise it is documented that it is the user's responsibility to 364 * clear the cache after executing the non-blocking Write/Erase flash 365 * operation.</td> 366 * </tr> 367 * <tr> 368 * <td>Added new Cy_Flash_IsOperationComplete() function to check completeness. 369 * Obsoleted Cy_Flash_IsWriteComplete(), Cy_Flash_IsProgramComplete(), 370 * and Cy_Flash_IsEraseComplete() functions.<br> 371 * Added Cy_Flash_GetExternalStatus() function to get unparsed status where 372 * flash driver will be used in security applications with other modules 373 * as SecureImage.<br> 374 * Added Cy_Flash_Init() function to initialize all needed prerequisites 375 * for Erase/Write operations.</td> 376 * <td>Updated driver design to improve user experience.</td> 377 * </tr> 378 * <tr> 379 * <td>Updated driver implementation to remove MISRA rules deviations.</td> 380 * <td>Driver implementation quality improvement.</td> 381 * </tr> 382 * <tr> 383 * <td>1.0</td> 384 * <td>Initial version</td> 385 * <td></td> 386 * </tr> 387 * </table> 388 * 389 * \defgroup group_flash_macros Macros 390 * \{ 391 * \defgroup group_flash_general_macros Flash general parameters 392 * Provides general information about flash 393 * 394 * \defgroup group_flash_config_macros Flash configuration 395 * Specifies the parameter values passed to SROM API 396 * \} 397 * \defgroup group_flash_functions Functions 398 * \defgroup group_flash_enumerated_types Enumerated Types 399 * \defgroup group_flash_srom_config_structure Structures 400 */ 401 402 #include "cy_device.h" 403 404 #if defined (CY_IP_M4CPUSS) || defined (CY_IP_M7CPUSS) 405 406 #include "cy_ipc_drv.h" 407 #include "cy_syslib.h" 408 #if defined(CY_IP_MXFLASHC_VERSION_ECT) 409 #include "cy_flash_srom.h" 410 #endif 411 412 #if defined(__cplusplus) 413 extern "C" { 414 #endif 415 416 /*************************************** 417 * Macro definitions 418 ***************************************/ 419 /** 420 * \addtogroup group_flash_macros 421 * \{ 422 */ 423 424 /** Driver major version */ 425 #define CY_FLASH_DRV_VERSION_MAJOR 3 426 427 /** Driver minor version */ 428 #define CY_FLASH_DRV_VERSION_MINOR 70 429 430 #define CY_FLASH_ID (CY_PDL_DRV_ID(0x14UL)) /**< FLASH PDL ID */ 431 432 #define CY_FLASH_ID_INFO (uint32_t)( CY_FLASH_ID | CY_PDL_STATUS_INFO ) /**< Return prefix for FLASH driver function status codes */ 433 #define CY_FLASH_ID_WARNING (uint32_t)( CY_FLASH_ID | CY_PDL_STATUS_WARNING) /**< Return prefix for FLASH driver function warning return values */ 434 #define CY_FLASH_ID_ERROR (uint32_t)( CY_FLASH_ID | CY_PDL_STATUS_ERROR) /**< Return prefix for FLASH driver function error return values */ 435 436 /** \} group_flash_macros */ 437 438 439 /** 440 * \addtogroup group_flash_general_macros 441 * \{ 442 */ 443 444 /** Flash row size */ 445 #define CY_FLASH_SIZEOF_ROW (CPUSS_FLASHC_PA_SIZE * 4U) 446 /** Long words flash row size */ 447 #define CY_FLASH_SIZEOF_ROW_LONG_UNITS (CY_FLASH_SIZEOF_ROW / sizeof(uint32_t)) 448 449 /** \} group_flash_general_macros */ 450 451 #if defined(CY_IP_MXFLASHC_VERSION_ECT) 452 453 /** \cond INTERNAL */ 454 455 /** Flash bounds */ 456 typedef enum 457 { 458 CY_FLASH_IN_BOUNDS, 459 CY_FLASH_OUT_OF_BOUNDS, 460 } en_flash_bounds_t; 461 462 #define CY_FLASH_NUMBER_ROWS (CPUSS_FLASH_SIZE/CY_FLASH_SIZEOF_ROW) /** Number of flash rows */ 463 464 #define CY_WFLASH_LG_SBM_TOP CY_WFLASH_LG_SBM_BASE 465 #define CY_WFLASH_LG_SBM_END (CY_WFLASH_LG_SBM_BASE + CY_WFLASH_LG_SBM_SIZE) 466 467 #define CY_WFLASH_SM_SBM_TOP CY_WFLASH_SM_SBM_BASE 468 #define CY_WFLASH_SM_SBM_END (CY_WFLASH_SM_SBM_BASE + CY_WFLASH_SM_SBM_SIZE) 469 470 #define CY_WFLASH_LG_DBM0_TOP CY_WFLASH_LG_DBM0_BASE 471 #define CY_WFLASH_LG_DBM0_END (CY_WFLASH_LG_DBM0_BASE + CY_WFLASH_LG_DBM0_SIZE) 472 473 #define CY_WFLASH_SM_DBM0_TOP CY_WFLASH_SM_DBM0_BASE 474 #define CY_WFLASH_SM_DBM0_END (CY_WFLASH_SM_DBM0_BASE + CY_WFLASH_SM_DBM0_SIZE) 475 476 #define CY_WFLASH_LG_DBM1_TOP CY_WFLASH_LG_DBM1_BASE 477 #define CY_WFLASH_LG_DBM1_END (CY_WFLASH_LG_DBM1_BASE + CY_WFLASH_LG_DBM1_SIZE) 478 479 #define CY_WFLASH_SM_DBM1_TOP CY_WFLASH_SM_DBM1_BASE 480 #define CY_WFLASH_SM_DBM1_END (CY_WFLASH_SM_DBM1_BASE + CY_WFLASH_SM_DBM1_SIZE) 481 482 #define CY_FLASH_LG_SBM_TOP CY_FLASH_LG_SBM_BASE 483 #define CY_FLASH_LG_SBM_END (CY_FLASH_LG_SBM_BASE + CY_FLASH_LG_SBM_SIZE) 484 485 #define CY_FLASH_SM_SBM_TOP CY_FLASH_SM_SBM_BASE 486 #define CY_FLASH_SM_SBM_END (CY_FLASH_SM_SBM_BASE + CY_FLASH_SM_SBM_SIZE) 487 488 #define CY_FLASH_LG_DBM0_TOP CY_FLASH_LG_DBM0_BASE 489 #define CY_FLASH_LG_DBM0_END (CY_FLASH_LG_DBM0_BASE + CY_FLASH_LG_DBM0_SIZE) 490 491 #define CY_FLASH_SM_DBM0_TOP CY_FLASH_SM_DBM0_BASE 492 #define CY_FLASH_SM_DBM0_END (CY_FLASH_SM_DBM0_BASE + CY_FLASH_SM_DBM0_SIZE) 493 494 #define CY_FLASH_LG_DBM1_TOP CY_FLASH_LG_DBM1_BASE 495 #define CY_FLASH_LG_DBM1_END (CY_FLASH_LG_DBM1_BASE + CY_FLASH_LG_DBM1_SIZE) 496 497 #define CY_FLASH_SM_DBM1_TOP CY_FLASH_SM_DBM1_BASE 498 #define CY_FLASH_SM_DBM1_END (CY_FLASH_SM_DBM1_BASE + CY_FLASH_SM_DBM1_SIZE) 499 500 #define CY_SFLASH_TOP CY_SFLASH_BASE 501 #define CY_SFLASH_END (CY_SFLASH_BASE + CY_SFLASH_SIZE) 502 503 #define CY_SFLASH1_TOP CY_SFLASH1_BASE 504 #define CY_SFLASH1_END (CY_SFLASH1_BASE + CY_SFLASH1_SIZE) 505 506 #define CY_WORK_LES_SIZE_IN_BYTE (0x00000800UL) 507 #define CY_WORK_LES_SIZE_IN_WORD (0x00000800UL / 4UL) 508 #define CY_WORK_SES_SIZE_IN_BYTE (0x00000080UL) 509 #define CY_WORK_SES_SIZE_IN_WORD (0x00000080UL / 4UL) 510 511 #define CY_CODE_LES_SIZE_IN_BYTE (0x00008000UL) 512 #define CY_CODE_LES_SIZE_IN_WORD (0x00008000UL / 4UL) 513 #define CY_CODE_SES_SIZE_IN_BYTE (0x00002000UL) 514 #define CY_CODE_SES_SIZE_IN_WORD (0x00002000UL / 4UL) 515 516 517 typedef enum 518 { 519 CY_FLASH_MAIN_REGION = 0U, 520 CY_FLASH_WORK_REGION, 521 CY_FLASH_CA_CM0P_REGION 522 } cy_en_region_t; 523 524 typedef enum 525 { 526 CY_FLASH_SINGLE_BANK_MODE = 0U, 527 CY_FLASH_DUAL_BANK_MODE = 1U 528 } cy_en_bankmode_t; 529 530 typedef enum 531 { 532 CY_FLASH_MAPPING_A = 0U, 533 CY_FLASH_MAPPING_B = 1U 534 } cy_en_maptype_t; 535 536 /** \endcond */ 537 #endif // (defined(CY_IP_MXFLASHC_VERSION_ECT)) 538 539 540 541 /** 542 * \addtogroup group_flash_enumerated_types 543 * \{ 544 */ 545 546 /** This enum has the return values of the Flash driver */ 547 typedef enum cy_en_flashdrv_status 548 { 549 CY_FLASH_DRV_SUCCESS = 0x00UL, /**< Success */ 550 CY_FLASH_DRV_INV_PROT = ( CY_FLASH_ID_ERROR + 0x0UL), /**< Invalid device protection state */ 551 CY_FLASH_DRV_INVALID_FM_PL = ( CY_FLASH_ID_ERROR + 0x1UL), /**< Invalid flash page latch address */ 552 CY_FLASH_DRV_INVALID_FLASH_ADDR = ( CY_FLASH_ID_ERROR + 0x2UL), /**< Invalid flash address */ 553 CY_FLASH_DRV_ROW_PROTECTED = ( CY_FLASH_ID_ERROR + 0x3UL), /**< Row is write protected */ 554 CY_FLASH_DRV_IPC_BUSY = ( CY_FLASH_ID_ERROR + 0x5UL), /**< IPC structure is already locked by another process */ 555 CY_FLASH_DRV_INVALID_INPUT_PARAMETERS = ( CY_FLASH_ID_ERROR + 0x6UL), /**< Input parameters passed to Flash API are not valid */ 556 CY_FLASH_DRV_PL_ROW_COMP_FA = ( CY_FLASH_ID_ERROR + 0x22UL), /**< Comparison between Page Latches and FM row failed */ 557 CY_FLASH_DRV_ERR_UNC = ( CY_FLASH_ID_ERROR + 0xFFUL), /**< Unknown error code. See \ref Cy_Flash_GetExternalStatus() */ 558 CY_FLASH_DRV_PROGRESS_NO_ERROR = ( CY_FLASH_ID_INFO + 0x0UL), /**< Command in progress; no error */ 559 CY_FLASH_DRV_OPERATION_STARTED = ( CY_FLASH_ID_INFO + 0x1UL), /**< Flash operation is successfully initiated */ 560 CY_FLASH_DRV_OPCODE_BUSY = ( CY_FLASH_ID_INFO + 0x2UL), /**< Flash is under operation */ 561 CY_FLASH_DRV_CHECKSUM_NON_ZERO = ( CY_FLASH_ID_ERROR + 0x4UL), /**< Checksum of FLASH resulted in non-zero (SROM STATUS CODE: 0xF000000A) */ 562 CY_FLASH_DRV_NO_ERASE_SUSPEND = ( CY_FLASH_ID_ERROR + 0x7UL), /**< Returned when EraseResume is called when no sector is suspended from erase (SROM STATUS CODE: 0xF0000092) */ 563 CY_FLASH_DRV_FLASH_NOT_ERASED = ( CY_FLASH_ID_ERROR + 0x8UL), /**< Returned when ProgramRow is invoked on unerased cells or blank check fails (SROM STATUS CODE: 0xF00000A4) */ 564 CY_FLASH_DRV_NO_ERASE_ONGOING = ( CY_FLASH_ID_ERROR + 0x9UL), /**< Returned by EraseSuspend when called with no ongoing erase operation (SROM STATUS CODE: 0xF00000A5) */ 565 CY_FLASH_DRV_ACTIVE_ERASE = ( CY_FLASH_ID_ERROR + 0xAUL), /**< Returned by ProgramRow when active erase operation is going on (SROM STATUS CODE: 0xF00000A6) */ 566 CY_FLASH_DRV_INVALID_DATA_WIDTH = ( CY_FLASH_ID_ERROR + 0xBUL), /**< Returned by ProgramRow API if invalid program width option is provided (SROM STATUS CODE: 0xF00000A8) */ 567 CY_FLASH_DRV_FLASH_SAFTEY_ENABLED = ( CY_FLASH_ID_ERROR + 0xCUL), /**< Returned by FLASH program/erase APIs when writes are disabled in safety register (SROM STATUS CODE: 0xF00000AA) */ 568 CY_FLASH_DRV_INVALID_SFLASH_ADDR = ( CY_FLASH_ID_ERROR + 0xDUL), /**< Returned when WriteRow is called on invalid SFLASH rows in NORMAL state (SROM STATUS CODE: 0xF00000B2) */ 569 CY_FLASH_DRV_SFLASH_BACKUP_ERASED = ( CY_FLASH_ID_ERROR + 0xEUL), /**< Returned by Sflash programming APIs when backup sector is in erased state (SROM STATUS CODE: 0xF00000BB) */ 570 CY_FLASH_DRV_SECTOR_SUSPEND = ( CY_FLASH_ID_ERROR + 0xFUL), /**< Returned when Program operation is called on sector which is suspended from erase (SROM STATUS CODE: 0xF0000091) */ 571 CY_FLASH_DRV_SROM_API_TIMEOUT = ( CY_FLASH_ID_ERROR + 0x10UL) /**< Time out happens after calling srom API driver */ 572 } cy_en_flashdrv_status_t; 573 574 575 #if !defined (CY_FLASH_RWW_DRV_SUPPORT_DISABLED) 576 /** Flash notification configuration structure */ 577 typedef struct 578 { 579 uint8_t clientID; /**< Client ID */ 580 uint8_t pktType; /**< Message Type */ 581 uint16_t intrRelMask; /**< Mask */ 582 } cy_stc_flash_notify_t; 583 #endif /* !defined (CY_FLASH_RWW_DRV_SUPPORT_DISABLED) */ 584 585 /** \} group_flash_enumerated_types */ 586 587 #if (defined(CY_IP_MXFLASHC_VERSION_ECT)) 588 589 /** 590 * \addtogroup group_flash_enumerated_types 591 * \{ 592 */ 593 /** Flash Program row data size configuration */ 594 typedef enum 595 { 596 CY_FLASH_PROGRAMROW_DATA_SIZE_8BIT = (0x00UL), /**< Set program row data size 8 bit */ 597 CY_FLASH_PROGRAMROW_DATA_SIZE_16BIT = (0x01UL), /**< Set program row data size 16 bit */ 598 CY_FLASH_PROGRAMROW_DATA_SIZE_32BIT = (0x02UL), /**< Set program row data size 32 bit */ 599 CY_FLASH_PROGRAMROW_DATA_SIZE_64BIT = (0x03UL), /**< Set program row data size 64 bit */ 600 CY_FLASH_PROGRAMROW_DATA_SIZE_128BIT = (0x04UL), /**< Set program row data size 128 bit */ 601 CY_FLASH_PROGRAMROW_DATA_SIZE_256BIT = (0x05UL), /**< Set program row data size 256 bit */ 602 CY_FLASH_PROGRAMROW_DATA_SIZE_512BIT = (0x06UL), /**< Set program row data size 512 bit */ 603 CY_FLASH_PROGRAMROW_DATA_SIZE_1024BIT = (0x07UL), /**< Set program row data size 1024 bit */ 604 CY_FLASH_PROGRAMROW_DATA_SIZE_2048BIT = (0x08UL), /**< Set program row data size 2048 bit */ 605 CY_FLASH_PROGRAMROW_DATA_SIZE_4096BIT = (0x09UL) /**< Set program row data size 4096 bit */ 606 } cy_en_flash_programrow_datasize_t; 607 608 /** Flash Program row function execution type configuration */ 609 typedef enum 610 { 611 CY_FLASH_PROGRAMROW_NON_BLOCKING = (0x00UL), /**< Set program row API in non blocking mode */ 612 CY_FLASH_PROGRAMROW_BLOCKING = (0x01UL) /**< Set program row API in blocking mode */ 613 } cy_en_flash_programrow_blocking_t; 614 615 /** Flash blank check on Program row configuration */ 616 typedef enum 617 { 618 CY_FLASH_PROGRAMROW_BLANK_CHECK = (0x00UL), /**< Performs blank check on Program Row */ 619 CY_FLASH_PROGRAMROW_SKIP_BLANK_CHECK = (0x01UL) /**< Does not perform blank check on Program Row */ 620 } cy_en_flash_programrow_skipblankcheck_t; 621 622 /** Flash Program row data location configuration */ 623 typedef enum 624 { 625 CY_FLASH_PROGRAMROW_DATA_LOCATION_SRAM = (0x01UL) /**< Program Row data location is sram */ 626 } cy_en_flash_programrow_location_t; 627 628 /** Flash Program row interrupt mask configuration */ 629 typedef enum 630 { 631 CY_FLASH_PROGRAMROW_NOT_SET_INTR_MASK = (0x00UL), /**< Program Row API interrupt is not set */ 632 CY_FLASH_PROGRAMROW_SET_INTR_MASK = (0x01UL) /**< Program Row API interrupt is set */ 633 } cy_en_flash_programrow_intrmask_t; 634 635 /** Flash Erase sector function execution type configuration */ 636 typedef enum 637 { 638 CY_FLASH_ERASESECTOR_NON_BLOCKING = (0x00UL), /**< Erase sector API executed in non blocking mode */ 639 CY_FLASH_ERASESECTOR_BLOCKING = (0x01UL) /**< Erase sector API executed in blocking mode */ 640 } cy_en_flash_erasesector_blocking_t; 641 642 /** Flash Erase sector interrupt mask configuration */ 643 typedef enum 644 { 645 CY_FLASH_ERASESECTOR_NOT_SET_INTR_MASK = (0x00UL), /**< Erase sector API interrupt is not set */ 646 CY_FLASH_ERASESECTOR_SET_INTR_MASK = (0x01UL) /**< Erase sector API interrupt is set */ 647 } cy_en_flash_erasesector_intrmask_t; 648 649 /** Flash checksum bank configuration */ 650 typedef enum 651 { 652 CY_FLASH_CHECKSUM_BANK0 = (0x00UL), /**< Checksum calculated for Bank0 */ 653 CY_FLASH_CHECKSUM_BANK1 = (0x01UL) /**< Checksum calculated for Bank1 */ 654 } cy_en_flash_checksum_bank_t; 655 656 /** Flash checksum page configuration */ 657 typedef enum 658 { 659 CY_FLASH_CHECKSUM_PAGE = (0x00UL), /**< Checksum calculated for that page */ 660 CY_FLASH_CHECKSUM_WHOLE = (0x01UL) /**< Checksum calculated for whole region */ 661 } cy_en_flash_checksum_scope_t; 662 663 /** Flash checksum region configuration */ 664 typedef enum 665 { 666 CY_FLASH_CHECKSUM_MAIN = (0x00UL), /**< Checksum calculated for Main flash region */ 667 CY_FLASH_CHECKSUM_WORK = (0x01UL), /**< Checksum calculated for Work flash region */ 668 CY_FLASH_CHECKSUM_SUPERVISORY = (0x02UL) /**< Checksum calculated for Supervisory flash region */ 669 } cy_en_flash_checksum_region_t; 670 671 /** Flash compute hash configuration */ 672 typedef enum 673 { 674 CY_FLASH_COMPUTEHASH_BASIC = (0x00UL), /**< Compute Basic hash */ 675 CY_FLASH_COMPUTEHASH_CRC8 = (0x01UL) /**< Compute CRC8 hash */ 676 } cy_en_flash_computehash_type_t; 677 678 /** Flash Erase resume interrupt mask configuration */ 679 typedef enum 680 { 681 CY_FLASH_ERASERESUME_NOT_SET_INTR_MASK = (0x00UL), /**< Erase resume API interrupt is not set */ 682 CY_FLASH_ERASERESUME_SET_INTR_MASK = (0x01UL) /**< Erase resume API interrupt is set */ 683 } cy_en_flash_eraseresume_setintr_t; 684 685 /** Flash Erase resume function execution type configuration */ 686 typedef enum 687 { 688 CY_FLASH_ERASERESUME_NON_BLOCKING = (0x00UL), /**< Set erase resume API in non blocking mode */ 689 CY_FLASH_ERASERESUME_BLOCKING = (0x01UL) /**< Set erase resume API in blocking mode */ 690 } cy_en_flash_eraseresume_blocking_t; 691 692 /** Flash driver function execution type configuration */ 693 typedef enum 694 { 695 CY_FLASH_DRIVER_NON_BLOCKING = (0x00UL), /**< Set SROM API in non blocking mode */ 696 CY_FLASH_DRIVER_BLOCKING = (0x01UL) /**< Set SROM API in blocking mode */ 697 } cy_en_flash_driver_blocking_t; 698 699 /** \} group_flash_enumerated_types */ 700 #endif // (defined(CY_IP_MXFLASHC_VERSION_ECT)) 701 702 /*************************************** 703 * Data Structure definitions 704 ***************************************/ 705 #if (defined(CY_IP_MXFLASHC_VERSION_ECT)) 706 707 /** 708 * \addtogroup group_flash_srom_config_structure 709 * \{ 710 */ 711 /** Flash program row configuration structure */ 712 typedef struct 713 { 714 const uint32_t* destAddr; /**< Destination address of flash */ 715 const uint32_t* dataAddr; /**< pointer to 32byte aligned source data to be written to the flash */ 716 cy_en_flash_programrow_blocking_t blocking; /**< blocking or non blocking mode. \ref cy_en_flash_programrow_blocking_t */ 717 cy_en_flash_programrow_skipblankcheck_t skipBC; /**< blank check operation \ref cy_en_flash_programrow_skipblankcheck_t */ 718 cy_en_flash_programrow_datasize_t dataSize; /**< size of the data to be written. \ref cy_en_flash_programrow_datasize_t */ 719 cy_en_flash_programrow_location_t dataLoc; /**< data location for the operation \ref cy_en_flash_programrow_location_t */ 720 cy_en_flash_programrow_intrmask_t intrMask; /**< interrupt mask to be set. \ref cy_en_flash_programrow_intrmask_t */ 721 }cy_stc_flash_programrow_config_t; 722 723 /** Flash erase row configuration structure */ 724 typedef struct 725 { 726 const uint32_t* sectorAddr; /**< Sector address to be erased */ 727 cy_en_flash_erasesector_blocking_t blocking; /**< blocking or non blocking mode \ref cy_en_flash_erasesector_blocking_t */ 728 cy_en_flash_erasesector_intrmask_t intrMask; /**< interrupt mask to be set. \ref cy_en_flash_erasesector_intrmask_t */ 729 }cy_stc_flash_erasesector_config_t; 730 731 /** Flash checksum configuration structure */ 732 typedef struct 733 { 734 uint8_t rowId; /**< row id for checksum */ 735 cy_en_flash_checksum_bank_t bank; /**< Checksum calculated for Bank0 or Bank1 \ref cy_en_flash_checksum_bank_t */ 736 cy_en_flash_checksum_scope_t whole; /**< Checksum calculated for whole region or page \ref cy_en_flash_checksum_scope_t */ 737 cy_en_flash_checksum_region_t region; /**< Specifies the configuration of flash operation \ref cy_en_flash_checksum_region_t */ 738 } cy_stc_flash_checksum_config_t; 739 740 /** Flash compute hash configuration structure */ 741 typedef struct 742 { 743 const uint32_t* startAddr; /**< Address for computing hash */ 744 uint32_t numOfByte; /**< Number of Bytes for computing hash */ 745 cy_en_flash_computehash_type_t type; /**< Compute CRC8 hash or basic hash. /ref cy_en_flash_computehash_type_t*/ 746 } cy_stc_flash_computehash_config_t; 747 748 /** Flash erase resume configuration structure */ 749 typedef struct 750 { 751 cy_en_flash_eraseresume_setintr_t intrMask; /**< Interrupt mask for erase resume operation \ref cy_en_flash_eraseresume_setintr_t */ 752 cy_en_flash_eraseresume_blocking_t blocking; /**< Blocking or non blocking mode. \ref cy_en_flash_eraseresume_blocking_t */ 753 } cy_stc_flash_eraseresume_config_t; 754 755 /** Flash blank check configuration structure */ 756 typedef struct 757 { 758 const uint32_t* addrToBeChecked; /**< Address for which blank check to be performed. */ 759 uint32_t numOfWordsToBeChecked; /**< No of words to be checked. */ 760 } cy_stc_flash_blankcheck_config_t; 761 762 /** \} group_flash_srom_config_structure */ 763 764 #endif // (defined(CY_IP_MXFLASHC_VERSION_ECT)) 765 766 767 /*************************************** 768 * Function Prototypes 769 ***************************************/ 770 #if (defined(CY_IP_MXFLASHC_VERSION_ECT)) 771 772 773 /** 774 * \addtogroup group_flash_functions 775 * \{ 776 */ 777 778 779 /******************************************************************************* 780 * Function Name: Cy_Flashc_MainWriteEnable 781 ****************************************************************************//** 782 * 783 * \brief Enable writing to main flash. 784 * Enables writing to main flash. 785 * 786 * \note This function is applicable for CAT1C devices. 787 * 788 * \return none 789 * 790 *******************************************************************************/ 791 void Cy_Flashc_MainWriteEnable(void); 792 793 794 /******************************************************************************* 795 * Function Name: Cy_Flashc_MainWriteDisable 796 ****************************************************************************//** 797 * 798 * \brief Disable writing to main flash 799 * Disables writing to main flash. 800 * 801 * \note This function is applicable for CAT1C devices. 802 * 803 * \return none 804 * 805 *******************************************************************************/ 806 void Cy_Flashc_MainWriteDisable(void); 807 808 809 /******************************************************************************* 810 * Function Name: Cy_Flashc_WorkWriteEnable 811 ****************************************************************************//** 812 * 813 * \brief Enable writing work flash 814 * Work Flash embedded operations are enabled. 815 * 816 * \note This function is applicable for CAT1C devices. 817 * 818 * \return none 819 * 820 *******************************************************************************/ 821 void Cy_Flashc_WorkWriteEnable(void); 822 823 824 /******************************************************************************* 825 * Function Name: Cy_Flashc_WorkWriteDisable 826 ****************************************************************************//** 827 * 828 * \brief Disable writing work flash 829 * Work Flash embedded operations are blocked 830 * 831 * \note This function is applicable for CAT1C devices. 832 * 833 * \return none 834 * 835 *******************************************************************************/ 836 void Cy_Flashc_WorkWriteDisable(void); 837 838 839 /******************************************************************************* 840 * Function Name: Cy_Flashc_WorkECCEnable 841 ****************************************************************************//** 842 * 843 * \brief Enables ECC for work flash 844 * ECC checking/reporting on FLASH work interface is enabled. 845 * Correctable or non-correctable faults are reported by enabling ECC. 846 * 847 * \note This function is applicable for CAT1C devices. 848 * 849 * \return none 850 * 851 *******************************************************************************/ 852 void Cy_Flashc_WorkECCEnable(void); 853 854 /******************************************************************************* 855 * Function Name: Cy_Flashc_WorkECCDisable 856 ****************************************************************************//** 857 * 858 * \brief Disables ECC for work flash 859 * ECC checking/reporting on FLASH work interface is disabled. 860 * No correctable or non-correctable faults are reported by disabling ECC. 861 * 862 * \note This function is applicable for CAT1C devices. 863 * 864 * \return none 865 * 866 *******************************************************************************/ 867 void Cy_Flashc_WorkECCDisable(void); 868 869 870 /******************************************************************************* 871 * Function Name: Cy_Flashc_MainECCEnable 872 ****************************************************************************//** 873 * 874 * \brief Enables ECC for main flash 875 * ECC checking/reporting on FLASH main interface is enabled. 876 * Correctable or non-correctable faults are reported by enabling ECC. 877 * 878 * \note This function is applicable for CAT1C devices. 879 * 880 * \return none 881 * 882 *******************************************************************************/ 883 void Cy_Flashc_MainECCEnable(void); 884 885 /******************************************************************************* 886 * Function Name: Cy_Flashc_MainECCDisable 887 ****************************************************************************//** 888 * 889 * \brief Disables ECC for main flash. 890 * ECC checking/reporting on FLASH main interface is disabled. 891 * No correctable or non-correctable faults are reported by disabling ECC. 892 * 893 * \note This function is applicable for CAT1C devices. 894 * 895 * \return none 896 * 897 *******************************************************************************/ 898 void Cy_Flashc_MainECCDisable(void); 899 900 /******************************************************************************* 901 * Function Name: Cy_Flash_Program_WorkFlash 902 ****************************************************************************//** 903 * 904 * This function writes an array data to work flash. Reports success or 905 * or a reason for failure. User should only pass work flash address else it will return an error. 906 * This function executes in blocking mode only. 907 * 908 * Returns immediately and reports a CY_FLASH_DRV_IPC_BUSY error in the case when another 909 * process is operating flash. User firmware should not enter the hibernate 910 * mode until flash Write is complete. The Flash operation is allowed in Sleep and 911 * Deep-sleep modes. During the Flash operation, the device should not be reset, 912 * including the XRES pin, a software reset, and watchdog reset sources. Also, 913 * low-voltage detect circuits should be configured to generate an interrupt instead 914 * of a reset. Otherwise, portions of flash may undergo unexpected changes. 915 * \note A Read while Write violation occurs when a flash Read operation is initiated 916 * in the same or neighboring flash sector where the flash Write, Erase, or 917 * Program operation is working. This violation may cause a HardFault exception. 918 * To avoid the Read while Write violation, 919 * use Cy_Flash_IsOperationComplete() to ensure flash operation is complete. 920 * 921 * \note This function is applicable for CAT1C devices. 922 * 923 * \note User needs to make sure that the data pointer passed to this function points to 32 byte aligned data. 924 * 925 * \param config configuration of this function. 926 * This parameter is defined by the cy_stc_flash_programrow_config_t 927 * in \ref group_flash_srom_config_structure macro. 928 * 929 * \return Returns the status of the Flash operation (see \ref cy_en_flashdrv_status_t). 930 * 931 * \funcusage 932 * \snippet flash/snippet/main.c snippet_Cy_Flash_Program_WorkFlash 933 * 934 *******************************************************************************/ 935 cy_en_flashdrv_status_t Cy_Flash_Program_WorkFlash(const cy_stc_flash_programrow_config_t* config); 936 937 /******************************************************************************* 938 * Function Name: Cy_Flash_Program 939 ****************************************************************************//** 940 * 941 * This function writes an array of data to flash. Reports success or 942 * or a reason for failure. 943 * Returns immediately and reports a CY_FLASH_DRV_IPC_BUSY error in the case when another 944 * process is operating flash. User firmware should not enter the hibernate 945 * mode until flash Write is complete. The Flash operation is allowed in Sleep and 946 * Deep-sleep modes. During the Flash operation, the device should not be reset, 947 * including the XRES pin, a software reset, and watchdog reset sources. Also, 948 * low-voltage detect circuits should be configured to generate an interrupt instead 949 * of a reset. Otherwise, portions of flash may undergo unexpected changes. 950 * \note A Read while Write violation occurs when a flash Read operation is initiated 951 * in the same or neighboring flash sector where the flash Write, Erase, or 952 * Program operation is working. This violation may cause a HardFault exception. 953 * To avoid the Read while Write violation, 954 * use Cy_Flash_IsOperationComplete() to ensure flash operation is complete. 955 * 956 * \note This function is applicable for CAT1C devices. 957 * 958 * \note User needs to make sure that the data pointer passed to this function points to 32 byte aligned data. 959 * 960 * \param config configuration of this function. 961 * This parameter is defined by the cy_stc_flash_programrow_config_t 962 * in \ref group_flash_srom_config_structure macro. 963 * 964 * \param block specifies if the function to execute in blocking or non blocking mode. 965 * 966 * \return Returns the status of the Flash operation (see \ref cy_en_flashdrv_status_t). 967 * returns CY_FLASH_DRV_OPERATION_STARTED if operation starts with out error in non blocking mode. 968 * returns CY_FLASH_DRV_SUCCESS in blocking mode. 969 * 970 * \funcusage 971 * \snippet flash/snippet/main.c snippet_Cy_Flash_Program 972 *******************************************************************************/ 973 cy_en_flashdrv_status_t Cy_Flash_Program(const cy_stc_flash_programrow_config_t* config, cy_en_flash_driver_blocking_t block); 974 975 /******************************************************************************* 976 * Function Name: Cy_Flash_Checksum 977 ****************************************************************************//** 978 * 979 * Returns a checksum value of the specified flash row. supports only blocking 980 * mode for now. 981 * 982 * \note This function is applicable for CAT1C devices. 983 * 984 * \param config configuration of this function. 985 * This parameter is defined by the cy_stc_flash_checksum_config_t 986 * in \ref cy_stc_flash_checksum_config_t macro. 987 * 988 * \param checksumPtr The pointer to the address where checksum is to be stored 989 * 990 * \return Returns the status of the Flash operation. 991 * 992 * \funcusage 993 * \snippet flash/snippet/main.c snippet_Cy_Flash_Checksum 994 *******************************************************************************/ 995 cy_en_flashdrv_status_t Cy_Flash_Checksum (const cy_stc_flash_checksum_config_t *config, uint32_t* checksumPtr); 996 997 /******************************************************************************* 998 * Function Name: Cy_Flash_EraseSuspend 999 ****************************************************************************//** 1000 * 1001 * This function suspends an ongoing erase operation. User should not read from a 1002 * sector which is suspended from an erase operation. Cy_Flash_ProgramRow function 1003 * will return error if invoked on suspended sector. 1004 * This function cannot be called on SFLASH. Reports success 1005 * or a reason for failure. Does not return until the Erase operation is complete. 1006 * Returns immediately and reports a CY_FLASH_DRV_IPC_BUSY error in the case when another 1007 * process is operating flash. 1008 * This function supports only blocking mode for now. 1009 * 1010 * \note This function is applicable for CAT1C devices. 1011 * 1012 * \return Returns the status of the Flash operation (see \ref cy_en_flashdrv_status_t). 1013 * 1014 *******************************************************************************/ 1015 cy_en_flashdrv_status_t Cy_Flash_EraseSuspend(void); 1016 1017 /******************************************************************************* 1018 * Function Name: Cy_Flash_EraseResume 1019 ****************************************************************************//** 1020 * 1021 * This function calls to resume a suspended erase operation. 1022 * Reports success or a reason for failure. 1023 * Returns immediately and reports a CY_FLASH_DRV_IPC_BUSY error in the case when another 1024 * process is operating flash. 1025 * \note A Read while Write violation occurs when a flash Read operation is initiated 1026 * in the same or neighboring flash sector where the flash Write, Erase, or 1027 * Program operation is working. This violation may cause a HardFault exception. 1028 * To avoid the Read while Write violation, 1029 * use Cy_Flash_IsOperationComplete() to ensure flash operation is complete. 1030 * 1031 * \note This function is applicable for CAT1C devices. 1032 * 1033 * \param config configuration of this function. 1034 * This parameter is defined by the cy_stc_flash_eraseresume_config_t 1035 * in \ref group_flash_srom_config_structure macro. 1036 * 1037 * \return Returns the status of the Flash operation (see \ref cy_en_flashdrv_status_t). 1038 * 1039 *******************************************************************************/ 1040 cy_en_flashdrv_status_t Cy_Flash_EraseResume(const cy_stc_flash_eraseresume_config_t *config); 1041 1042 /******************************************************************************* 1043 * Function Name: Cy_Flash_BlankCheck 1044 ****************************************************************************//** 1045 * 1046 * This function performs blank check on the addressed work FLASH. 1047 * Reports success or a reason for failure. 1048 * Returns immediately and reports a CY_FLASH_DRV_IPC_BUSY error in the case when another 1049 * process is operating flash. 1050 * 1051 * \note This function is applicable for CAT1C devices. 1052 * 1053 * \param config configuration of this function. 1054 * This parameter is defined by the cy_stc_flash_blankcheck_config_t 1055 * in \ref group_flash_srom_config_structure macro. 1056 * 1057 * \param block specifies if the function to execute in blocking or non blocking mode. 1058 * 1059 * \return Returns the status of the Flash operation (see \ref cy_en_flashdrv_status_t). 1060 * returns CY_FLASH_DRV_OPERATION_STARTED if operation starts with out error in non blocking mode. 1061 * returns CY_FLASH_DRV_SUCCESS in blocking mode. 1062 * 1063 * \funcusage 1064 * \snippet flash/snippet/main.c snippet_Flashc_test_code 1065 *******************************************************************************/ 1066 cy_en_flashdrv_status_t Cy_Flash_BlankCheck(const cy_stc_flash_blankcheck_config_t *config, cy_en_flash_driver_blocking_t block); 1067 1068 /******************************************************************************* 1069 * Function Name: Cy_Flash_OperationStatus 1070 ****************************************************************************//** 1071 * 1072 * Checks the status of the Flash Operation, and returns it. 1073 * 1074 * \return Driver status. 1075 * returns CY_FLASH_DRV_OPERATION_STARTED if operation in non blocking mode is not complete. 1076 * returns CY_FLASH_DRV_SUCCESS if the operation is complete. 1077 * 1078 * \funcusage 1079 * \snippet flash/snippet/main.c snippet_Flashc_test_code 1080 *******************************************************************************/ 1081 cy_en_flashdrv_status_t Cy_Flash_OperationStatus(void); 1082 1083 /******************************************************************************* 1084 * Function Name: Cy_Flashc_InjectECC 1085 ****************************************************************************//** 1086 * 1087 * This function enables ECC injection and sets the address where a parity will be injected 1088 * and the parity value. 1089 * Reports success or a reason for failure. 1090 * 1091 * \note This function is applicable for CAT1C devices. 1092 * 1093 * \param region An indicator which region (Code/Work/Cache) ECC parity will be injected to. 1094 * This parameter is defined by the cy_en_region_t 1095 * in \ref group_flash_macros macro. 1096 * 1097 * \param address The address where ECC parity will be injected. 1098 * 1099 * \param parity The parity value which will be injected. 1100 * 1101 * \return Returns the status of the Flash operation (see \ref cy_en_flashdrv_status_t). 1102 * 1103 *******************************************************************************/ 1104 cy_en_flashdrv_status_t Cy_Flashc_InjectECC(cy_en_region_t region, uint32_t address, uint8_t parity); 1105 1106 1107 /******************************************************************************* 1108 * Function Name: Cy_Flashc_SetWorkBankMode 1109 ****************************************************************************//** 1110 * 1111 * \brief Sets bank mode for work flash 1112 * \note This function is applicable for CAT1C devices. 1113 * 1114 * 1115 * \param mode bank mode to be set 1116 * 1117 * \return none 1118 * 1119 * \funcusage 1120 * \snippet flash/snippet/main.c snippet_Cy_Flashc_WorkBankMode 1121 *******************************************************************************/ 1122 void Cy_Flashc_SetWorkBankMode(cy_en_bankmode_t mode); 1123 1124 /******************************************************************************* 1125 * Function Name: Cy_Flashc_GetWorkBankMode 1126 ****************************************************************************//** 1127 * 1128 * \brief Gets current bank mode for work flash 1129 * \note This function is applicable for CAT1C devices. 1130 * 1131 * 1132 * \return Current bank mode 1133 * 1134 * \funcusage 1135 * \snippet flash/snippet/main.c snippet_Cy_Flashc_WorkBankMode 1136 *******************************************************************************/ 1137 cy_en_bankmode_t Cy_Flashc_GetWorkBankMode(void); 1138 1139 /******************************************************************************* 1140 * Function Name: Cy_Flashc_SetMainBankMode 1141 ****************************************************************************//** 1142 * 1143 * \brief Sets bank mode for main flash 1144 * 1145 * \param mode bank mode to be set 1146 * 1147 * \return 1148 * 1149 * \funcusage 1150 * \snippet flash/snippet/main.c snippet_Cy_Flashc_MainBankMode 1151 *******************************************************************************/ 1152 void Cy_Flashc_SetMainBankMode(cy_en_bankmode_t mode); 1153 1154 /******************************************************************************* 1155 * Function Name: Cy_Flashc_GetMainBankMode 1156 ****************************************************************************//** 1157 * 1158 * \brief Gets current bank mode for main flash 1159 * \note This function is applicable for CAT1C devices. 1160 * 1161 * 1162 * \return Current bank mode 1163 * 1164 * \funcusage 1165 * \snippet flash/snippet/main.c snippet_Cy_Flashc_MainBankMode 1166 *******************************************************************************/ 1167 cy_en_bankmode_t Cy_Flashc_GetMainBankMode(void); 1168 1169 1170 /** \} group_flash_functions */ 1171 1172 #endif 1173 1174 #if ((!defined(CY_IP_MXFLASHC_VERSION_ECT)) || defined(CY_DOXYGEN)) 1175 1176 /** 1177 * \addtogroup group_flash_functions 1178 * \{ 1179 */ 1180 1181 /******************************************************************************* 1182 * Function Name: Cy_Flash_EraseRow 1183 ****************************************************************************//** 1184 * 1185 * This function erases a single row of flash. Reports success or 1186 * a reason for failure. Does not return until the Write operation is 1187 * complete. Returns immediately and reports a \ref CY_FLASH_DRV_IPC_BUSY error in 1188 * the case when another process is writing to flash or erasing the row. 1189 * User firmware should not enter the Hibernate or Deep Sleep mode until flash Erase 1190 * is complete. The Flash operation is allowed in Sleep mode. 1191 * During the Flash operation, the device should not be reset, including the 1192 * XRES pin, a software reset, and watchdog reset sources. Also, low-voltage 1193 * detect circuits should be configured to generate an interrupt instead of a 1194 * reset. Otherwise, portions of flash may undergo unexpected changes. 1195 * \note A Read while Write violation occurs when a flash Read operation is initiated 1196 * in the same or neighboring flash sector where the flash Write, Erase, ors 1197 * Program operation is working. This violation may cause a HardFault exception. 1198 * To avoid the Read while Write violation, 1199 * use Cy_Flash_IsOperationComplete() to ensure flash operation is complete. 1200 * \note This function is applicable for CAT1A devices. 1201 * 1202 * \param rowAddr Address of the flash row number. 1203 * The Read-while-Write violation occurs when the flash read operation is 1204 * initiated in the same flash sector where the flash write operation is 1205 * performing. Refer to the device datasheet for the details. 1206 * Address must match row start address. 1207 * 1208 * \return Returns the status of the Flash operation, 1209 * see \ref cy_en_flashdrv_status_t. 1210 * 1211 *******************************************************************************/ 1212 cy_en_flashdrv_status_t Cy_Flash_EraseRow(uint32_t rowAddr); 1213 1214 /******************************************************************************* 1215 * Function Name: Cy_Flash_StartEraseRow 1216 ****************************************************************************//** 1217 * 1218 * Starts erasing a single row of flash. Returns immediately 1219 * and reports a successful start or reason for failure. 1220 * Reports a \ref CY_FLASH_DRV_IPC_BUSY error in the case when IPC structure is locked 1221 * by another process. User firmware should not enter the Hibernate or Deep Sleep mode until 1222 * flash Erase is complete. The Flash operation is allowed in Sleep mode. 1223 * During the flash operation, the device should not be reset, including the 1224 * XRES pin, a software reset, and watchdog reset sources. Also, the low-voltage 1225 * detect circuits should be configured to generate an interrupt instead of a reset. 1226 * Otherwise, portions of flash may undergo unexpected changes. 1227 * \note To avoid situation of reading data from cache memory - before 1228 * reading data from previously programmed/erased flash rows, the user must 1229 * clear the flash cache with the Cy_SysLib_ClearFlashCacheAndBuffer() 1230 * function. 1231 * \note A Read while Write violation occurs when a flash Read operation is initiated 1232 * in the same or neighboring flash sector where the flash Write, Erase, or 1233 * Program operation is working. This violation may cause a HardFault exception. 1234 * To avoid the Read while Write violation, 1235 * use Cy_Flash_IsOperationComplete() to ensure flash operation is complete. 1236 * \note This function is applicable for CAT1A devices. 1237 * 1238 * \param rowAddr Address of the flash row number. 1239 * The Read-while-Write violation occurs when the flash read operation is 1240 * initiated in the same flash sector where the flash erase operation is 1241 * performing. Refer to the device datasheet for the details. 1242 * Address must match row start address. 1243 * 1244 * \return Returns the status of the Flash operation, 1245 * see \ref cy_en_flashdrv_status_t. 1246 * returns CY_FLASH_DRV_OPERATION_STARTED if operation starts with out error. 1247 * 1248 *******************************************************************************/ 1249 cy_en_flashdrv_status_t Cy_Flash_StartEraseRow(uint32_t rowAddr); 1250 1251 1252 /******************************************************************************* 1253 * Function Name: Cy_Flash_EraseSubsector 1254 ****************************************************************************//** 1255 * 1256 * This function erases an 8-row subsector of flash. Reports success or 1257 * a reason for failure. Does not return until the Write operation is 1258 * complete. Returns immediately and reports a \ref CY_FLASH_DRV_IPC_BUSY error in 1259 * the case when another process is writing to flash or erasing the row. 1260 * User firmware should not enter the Hibernate or Deep-Sleep mode until flash Erase 1261 * is complete. The Flash operation is allowed in Sleep mode. 1262 * During the Flash operation, the device should not be reset, including the 1263 * XRES pin, a software reset, and watchdog reset sources. Also, low-voltage 1264 * detect circuits should be configured to generate an interrupt instead of a 1265 * reset. Otherwise, portions of flash may undergo unexpected changes. 1266 ** \note A Read while Write violation occurs when a flash Read operation is initiated 1267 * in the same or neighboring flash sector where the flash Write, Erase, or 1268 * Program operation is working. This violation may cause a HardFault exception. 1269 * To avoid the Read while Write violation, 1270 * use Cy_Flash_IsOperationComplete() to ensure flash operation is complete. 1271 * \note This function is applicable for CAT1A devices. 1272 * 1273 * \param subSectorAddr Address of the flash row number. 1274 * The Read-while-Write violation occurs when the flash read operation is 1275 * initiated in the same flash sector where the flash write operation is 1276 * performing. Refer to the device datasheet for the details. 1277 * Address must match row start address. 1278 * 1279 * \return Returns the status of the Flash operation, 1280 * see \ref cy_en_flashdrv_status_t. 1281 * 1282 *******************************************************************************/ 1283 cy_en_flashdrv_status_t Cy_Flash_EraseSubsector(uint32_t subSectorAddr); 1284 1285 /******************************************************************************* 1286 * Function Name: Cy_Flash_StartEraseSubsector 1287 ****************************************************************************//** 1288 * 1289 * Starts erasing an 8-row subsector of flash. Returns immediately 1290 * and reports a successful start or reason for failure. 1291 * Reports a \ref CY_FLASH_DRV_IPC_BUSY error in the case when IPC structure is locked 1292 * by another process. User firmware should not enter the Hibernate or Deep-Sleep mode until 1293 * flash Erase is complete. The Flash operation is allowed in Sleep mode. 1294 * During the flash operation, the device should not be reset, including the 1295 * XRES pin, a software reset, and watchdog reset sources. Also, the low-voltage 1296 * detect circuits should be configured to generate an interrupt instead of a reset. 1297 * Otherwise, portions of flash may undergo unexpected changes. 1298 * \note Before reading data from previously programmed/erased flash rows, the 1299 * user must clear the flash cache with the Cy_SysLib_ClearFlashCacheAndBuffer() 1300 * function. 1301 * \note A Read while Write violation occurs when a flash Read operation is initiated 1302 * in the same or neighboring flash sector where the flash Write, Erase, or 1303 * Program operation is working. This violation may cause a HardFault exception. 1304 * To avoid the Read while Write violation, 1305 * use Cy_Flash_IsOperationComplete() to ensure flash operation is complete. 1306 * \note This function is applicable for CAT1A devices. 1307 * 1308 * \param subSectorAddr Address of the flash row number. 1309 * The Read-while-Write violation occurs when the flash read operation is 1310 * initiated in the same flash sector where the flash erase operation is 1311 * performing. Refer to the device datasheet for the details. 1312 * Address must match row start address. 1313 * 1314 * \return Returns the status of the Flash operation, 1315 * see \ref cy_en_flashdrv_status_t. 1316 * returns CY_FLASH_DRV_OPERATION_STARTED if operation starts with out error. 1317 * 1318 *******************************************************************************/ 1319 cy_en_flashdrv_status_t Cy_Flash_StartEraseSubsector(uint32_t subSectorAddr); 1320 1321 1322 1323 /******************************************************************************* 1324 * Function Name: Cy_Flash_WriteRow 1325 ****************************************************************************//** 1326 * 1327 * This function writes an array of data to a single row of flash. This is done 1328 * in three steps - pre-program, erase and then program flash row with the input 1329 * data. Reports success or a reason for failure. Does not return until the Write 1330 * operation is complete. 1331 * Returns immediately and reports a \ref CY_FLASH_DRV_IPC_BUSY error in the case 1332 * when another process is writing to flash. User firmware should not enter the 1333 * Hibernate or Deep-sleep mode until flash Write is complete. The Flash operation 1334 * is allowed in Sleep mode. During the Flash operation, the 1335 * device should not be reset, including the XRES pin, a software 1336 * reset, and watchdog reset sources. Also, low-voltage detect 1337 * circuits should be configured to generate an interrupt 1338 * instead of a reset. Otherwise, portions of flash may undergo 1339 * unexpected changes. 1340 * \note A Read while Write violation occurs when a flash Read operation is initiated 1341 * in the same or neighboring flash sector where the flash Write, Erase, or 1342 * Program operation is working. This violation may cause a HardFault exception. 1343 * To avoid the Read while Write violation, 1344 * use Cy_Flash_IsOperationComplete() to ensure flash operation is complete. 1345 * 1346 * \note This is a blocking function and will not return until the Write operation is complete. 1347 * \note This function is applicable for CAT1A devices. 1348 * 1349 * \param rowAddr Address of the flash row number. 1350 * The Read-while-Write violation occurs when the flash read operation is 1351 * initiated in the same flash sector where the flash write operation is 1352 * performing. Refer to the device datasheet for the details. 1353 * Address must match row start address. 1354 * 1355 * \param data The pointer to the data which has to be written to flash. The size 1356 * of the data array must be equal to the flash row size. The flash row size for 1357 * the selected device is defined by the \ref CY_FLASH_SIZEOF_ROW macro. Refer to 1358 * the device datasheet for the details. 1359 * 1360 * \return Returns the status of the Flash operation, 1361 * see \ref cy_en_flashdrv_status_t. 1362 * 1363 *******************************************************************************/ 1364 cy_en_flashdrv_status_t Cy_Flash_WriteRow(uint32_t rowAddr, const uint32_t* data); 1365 1366 /******************************************************************************* 1367 * Function Name: Cy_Flash_StartProgram 1368 ****************************************************************************//** 1369 * 1370 * Starts writing an array of data to a single row of flash. Returns immediately 1371 * and reports a successful start or reason for failure. 1372 * Reports a \ref CY_FLASH_DRV_IPC_BUSY error if another process is writing 1373 * to flash. The user firmware should not enter Hibernate or Deep-Sleep mode until flash 1374 * Program is complete. The Flash operation is allowed in Sleep mode. 1375 * During the Flash operation, the device should not be reset, including the 1376 * XRES pin, a software reset, and watchdog reset sources. Also, the low-voltage 1377 * detect circuits should be configured to generate an interrupt instead of a reset. 1378 * Otherwise, portions of flash may undergo unexpected changes.\n 1379 * Before calling this function, the target flash region must be erased by 1380 * the StartEraseRow/EraseRow function.\n 1381 * Data to be programmed must be located in the SRAM memory region. 1382 * \note Before reading data from previously programmed/erased flash rows, the 1383 * user must clear the flash cache with the Cy_SysLib_ClearFlashCacheAndBuffer() 1384 * function. 1385 * \note A Read while Write violation occurs when a flash Read operation is initiated 1386 * in the same or neighboring flash sector where the flash Write, Erase, or 1387 * Program operation is working. This violation may cause a HardFault exception. 1388 * To avoid the Read while Write violation, 1389 * use Cy_Flash_IsOperationComplete() to ensure flash operation is complete. 1390 * 1391 * \note This is a non blocking function and will not wait until the Write operation is complete. 1392 * \note This function is applicable for CAT1A devices. 1393 * 1394 * \param rowAddr The address of the flash row number. 1395 * The Read-while-Write violation occurs when the Flash Write operation is 1396 * performing. Refer to the device datasheet for the details. 1397 * The address must match the row start address. 1398 * 1399 * \param data The pointer to the data to be written to flash. The size 1400 * of the data array must be equal to the flash row size. The flash row size for 1401 * the selected device is defined by the \ref CY_FLASH_SIZEOF_ROW macro. Refer to 1402 * the device datasheet for the details. 1403 * 1404 * \return Returns the status of the Flash operation, 1405 * see \ref cy_en_flashdrv_status_t. 1406 * returns CY_FLASH_DRV_OPERATION_STARTED if operation starts with out error. 1407 * 1408 *******************************************************************************/ 1409 cy_en_flashdrv_status_t Cy_Flash_StartProgram(uint32_t rowAddr, const uint32_t* data); 1410 1411 /******************************************************************************* 1412 * Function Name: Cy_Flash_GetExternalStatus 1413 ****************************************************************************//** 1414 * 1415 * This function handles the case where a module such as security image captures 1416 * a system call from this driver and reports its own status or error code, 1417 * for example protection violation. In that case, a function from this 1418 * driver returns an unknown error (see cy_en_flashdrv_status_t). After receipt 1419 * of an unknown error, the user may call this function to get the status 1420 * of the capturing module. 1421 * 1422 * The user is responsible for parsing the content of the returned value 1423 * and casting it to the appropriate enumeration. 1424 * \note This function is applicable for CAT1A devices. 1425 * 1426 * \return Returns the status of the Flash operation code. 1427 *******************************************************************************/ 1428 uint32_t Cy_Flash_GetExternalStatus(void); 1429 1430 #if !defined (CY_FLASH_RWW_DRV_SUPPORT_DISABLED) 1431 /******************************************************************************* 1432 * Function Name: Cy_Flash_InitExt 1433 ****************************************************************************//** 1434 * 1435 * Initiates all needed prerequisites to support flash erase/write. 1436 * Should be called from each core. Defines the address of the message structure. 1437 * 1438 * Requires a call to Cy_IPC_Sema_Init(), Cy_IPC_Pipe_Config() and 1439 * Cy_IPC_Pipe_Init() functions before use. 1440 * 1441 * \note This function is applicable for CAT1A devices. 1442 * 1443 * This function is called in the Cy_Flash_Init() function - see the 1444 * \ref Cy_Flash_Init usage considerations. 1445 * 1446 *******************************************************************************/ 1447 void Cy_Flash_InitExt(cy_stc_flash_notify_t *ipcWaitMessageAddr); 1448 #endif /* !defined (CY_FLASH_RWW_DRV_SUPPORT_DISABLED) */ 1449 1450 /** \} group_flash_functions */ 1451 1452 /** \cond INTERNAL */ 1453 #if (CY_CPU_CORTEX_M4) 1454 void Cy_Flash_ResumeIrqHandler(void); 1455 #endif 1456 1457 /******************************************************************************* 1458 Backward compatibility macro. The following code is DEPRECATED and must 1459 not be used in new projects 1460 *******************************************************************************/ 1461 #define CY_FLASH_NUMBER_ROWS (CY_FLASH_SIZE / CY_FLASH_SIZEOF_ROW) 1462 #define Cy_Flash_StartErase Cy_Flash_StartEraseRow 1463 1464 /** \endcond */ 1465 1466 1467 #endif //(defined(CY_IP_MXFLASHC_VERSION_ECT) || defined(CY_DOXYGEN)) 1468 1469 /** 1470 * \addtogroup group_flash_functions 1471 * \{ 1472 */ 1473 1474 /******************************************************************************* 1475 * Function Name: Cy_Flash_IsOperationComplete 1476 ****************************************************************************//** 1477 * 1478 * Reports a successful operation result, reason of failure or busy status 1479 * ( \ref CY_FLASH_DRV_OPCODE_BUSY ). 1480 * 1481 * \return Returns the status of the Flash operation (see \ref cy_en_flashdrv_status_t). 1482 * returns CY_FLASH_DRV_OPERATION_STARTED if operation in non blocking mode is not complete. 1483 * returns CY_FLASH_DRV_SUCCESS if the operation is complete. 1484 * 1485 *******************************************************************************/ 1486 cy_en_flashdrv_status_t Cy_Flash_IsOperationComplete(void); 1487 1488 1489 /******************************************************************************* 1490 * Function Name: Cy_Flash_StartWrite 1491 ****************************************************************************//** 1492 * 1493 * Starts programming the flash row with 1494 * the input data. Returns immediately and reports a successful start 1495 * or reason for failure. Reports a \ref CY_FLASH_DRV_IPC_BUSY error 1496 * in the case when another process is writing to flash. User 1497 * firmware should not enter the Hibernate or Deep-Sleep mode until 1498 * flash Write is complete. The Flash operation is allowed in Sleep mode. 1499 * During the flash operation, the device should not be reset, including the 1500 * XRES pin, a software reset, and watchdog reset sources. Also, the low-voltage 1501 * detect circuits should be configured to generate an interrupt instead of a reset. 1502 * Otherwise, portions of flash may undergo unexpected changes. 1503 * \note Before reading data from previously programmed/erased flash rows, the 1504 * user must clear the flash cache with the Cy_SysLib_ClearFlashCacheAndBuffer() 1505 * function. 1506 * \note This is added as backword compatibility function in CAT1C devices. 1507 * This function will not erase the row before writing to the row. Erase ROW is not supported in CAT1C devices. 1508 * User can use \ref Cy_Flash_EraseSector or Cy_Flash_EraseAll functions. 1509 * \note A Read while Write violation occurs when a flash Read operation is initiated 1510 * in the same or neighboring flash sector where the flash Write, Erase, or 1511 * Program operation is working. This violation may cause a HardFault exception. 1512 * To avoid the Read while Write violation, 1513 * use Cy_Flash_IsOperationComplete() to ensure flash operation is complete. 1514 * 1515 * \note This is a non blocking function and will not wait until the Write operation is complete. 1516 * 1517 * \note User needs to make sure that the data pointer passed to this function points to 32 byte aligned data for CAT1C devices. 1518 * 1519 * \param rowAddr Address of the flash row number. 1520 * The Read-while-Write violation occurs when the flash read operation is 1521 * initiated in the same flash sector where the flash write operation is 1522 * performing. Refer to the device datasheet for the details. 1523 * Address must match row start address. 1524 * 1525 * \param data The pointer to the data to be written to flash. The size 1526 * of the data array must be equal to the flash row size. The flash row size for 1527 * the selected device is defined by the \ref CY_FLASH_SIZEOF_ROW macro. Refer to 1528 * the device datasheet for the details. 1529 * For CAT1C devices this data pointer needs to point to 32 byte aligned data. 1530 * 1531 * \return Returns the status of the Flash operation, 1532 * returns CY_FLASH_DRV_OPERATION_STARTED if operation starts with out error. 1533 * see \ref cy_en_flashdrv_status_t. 1534 * 1535 *******************************************************************************/ 1536 cy_en_flashdrv_status_t Cy_Flash_StartWrite(uint32_t rowAddr, const uint32_t* data); 1537 1538 /******************************************************************************* 1539 * Function Name: Cy_Flash_StartEraseSector 1540 ****************************************************************************//** 1541 * 1542 * Starts erasing a sector of flash. Returns immediately 1543 * and reports a successful start or reason for failure. 1544 * Reports a \ref CY_FLASH_DRV_IPC_BUSY error in the case when IPC structure is locked 1545 * by another process. User firmware should not enter the Hibernate or Deep Sleep mode until 1546 * flash Erase is complete. The Flash operation is allowed in Sleep mode. 1547 * During the flash operation, the device should not be reset, including the 1548 * XRES pin, a software reset, and watchdog reset sources. Also, the low-voltage 1549 * detect circuits should be configured to generate an interrupt instead of a reset. 1550 * Otherwise, portions of flash may undergo unexpected changes. 1551 * \note Before reading data from previously programmed/erased flash rows, the 1552 * user must clear the flash cache with the Cy_SysLib_ClearFlashCacheAndBuffer() 1553 * function. 1554 * \note A Read while Write violation occurs when a flash Read operation is initiated 1555 * in the same or neighboring flash sector where the flash Write, Erase, or 1556 * Program operation is working. This violation may cause a HardFault exception. 1557 * To avoid the Read while Write violation, 1558 * use Cy_Flash_IsOperationComplete() to ensure flash operation is complete. 1559 * 1560 * \note This is a non blocking function and will not wait until the operation is complete. 1561 * 1562 * \param sectorAddr Address of the flash row number. 1563 * The Read-while-Write violation occurs when the flash read operation is 1564 * initiated in the same flash sector where the flash erase operation is 1565 * performing. Refer to the device datasheet for the details. 1566 * Address must match row start address. 1567 * 1568 * \return Returns the status of the Flash operation, 1569 * returns CY_FLASH_DRV_OPERATION_STARTED if operation starts with out error. 1570 * see \ref cy_en_flashdrv_status_t. 1571 * 1572 *******************************************************************************/ 1573 cy_en_flashdrv_status_t Cy_Flash_StartEraseSector(uint32_t sectorAddr); 1574 1575 /******************************************************************************* 1576 * Function Name: Cy_Flash_ProgramRow 1577 ****************************************************************************//** 1578 * 1579 * This function writes an array of data to a single row of flash. Reports 1580 * success or a reason for failure. Does not return until the Program operation 1581 * is complete. 1582 * Returns immediately and reports a \ref CY_FLASH_DRV_IPC_BUSY error in the case 1583 * when another process is writing to flash. User firmware should not enter the 1584 * Hibernate or Deep-sleep mode until flash Write is complete. The Flash operation 1585 * is allowed in Sleep mode. During the Flash operation, the device should not be 1586 * reset, including the XRES pin, a software reset, and watchdog reset sources. 1587 * Also, low-voltage detect circuits should be configured to generate an interrupt 1588 * instead of a reset. Otherwise, portions of flash may undergo unexpected 1589 * changes.\n 1590 * Before calling this function, the target flash region must be erased by 1591 * the StartErase/EraseRow function.\n 1592 * Data to be programmed must be located in the SRAM memory region. 1593 * \note Before reading data from previously programmed/erased flash rows, the 1594 * user must clear the flash cache with the Cy_SysLib_ClearFlashCacheAndBuffer() 1595 * function. 1596 * \note A Read while Write violation occurs when a flash Read operation is initiated 1597 * in the same or neighboring flash sector where the flash Write, Erase, or 1598 * Program operation is working. This violation may cause a HardFault exception. 1599 * To avoid the Read while Write violation, 1600 * use Cy_Flash_IsOperationComplete() to ensure flash operation is complete. 1601 * 1602 * \note This is a blocking function and will not return until the Write operation is complete. 1603 * 1604 * \note User needs to make sure that the data pointer passed to this function points to 32 byte aligned data for CAT1C devices. 1605 * 1606 * \param rowAddr Address of the flash row number. 1607 * The Read-while-Write violation occurs when the flash read operation is 1608 * initiated in the same flash sector where the flash write operation is 1609 * performing. Refer to the device datasheet for the details. 1610 * Address must match row start address. 1611 * 1612 * \param data The pointer to the data which has to be written to flash. The size 1613 * of the data array must be equal to the flash row size. The flash row size for 1614 * the selected device is defined by the \ref CY_FLASH_SIZEOF_ROW macro. Refer to 1615 * the device datasheet for the details. 1616 * For CAT1C devices this data pointer needs to point to 32 byte aligned data. 1617 * 1618 * \return Returns the status of the Flash operation, 1619 * see \ref cy_en_flashdrv_status_t. 1620 * 1621 *******************************************************************************/ 1622 cy_en_flashdrv_status_t Cy_Flash_ProgramRow(uint32_t rowAddr, const uint32_t* data); 1623 1624 /******************************************************************************* 1625 * Function Name: Cy_Flash_EraseSector 1626 ****************************************************************************//** 1627 * 1628 * This function erases a sector of flash. Reports success or 1629 * a reason for failure. Does not return until the Erase operation is 1630 * complete. Returns immediately and reports a \ref CY_FLASH_DRV_IPC_BUSY error in 1631 * the case when another process is writing to flash or erasing the row. 1632 * User firmware should not enter the Hibernate or Deep Sleep mode until flash Erase 1633 * is complete. The Flash operation is allowed in Sleep mode. 1634 * During the Flash operation, the device should not be reset, including the 1635 * XRES pin, a software reset, and watchdog reset sources. Also, low-voltage 1636 * detect circuits should be configured to generate an interrupt instead of a 1637 * reset. Otherwise, portions of flash may undergo unexpected changes. 1638 * 1639 * \note A Read while Write violation occurs when a flash Read operation is initiated 1640 * in the same or neighboring flash sector where the flash Write, Erase, or 1641 * Program operation is working. This violation may cause a HardFault exception. 1642 * To avoid the Read while Write violation, 1643 * use Cy_Flash_IsOperationComplete() to ensure flash operation is complete. 1644 * 1645 * \note This is a blocking function and will not return until the erase operation is complete. 1646 * 1647 * \param sectorAddr Address of the flash row number. 1648 * The Read-while-Write violation occurs when the flash read operation is 1649 * initiated in the same flash sector where the flash write operation is 1650 * performing. Refer to the device datasheet for the details. 1651 * Address must match row start address. 1652 * 1653 * \return Returns the status of the Flash operation, 1654 * see \ref cy_en_flashdrv_status_t. 1655 * 1656 *******************************************************************************/ 1657 cy_en_flashdrv_status_t Cy_Flash_EraseSector(uint32_t sectorAddr); 1658 1659 /******************************************************************************* 1660 * Function Name: Cy_Flash_CalculateHash 1661 ****************************************************************************//** 1662 * 1663 * Returns a hash value of the specified region of flash. 1664 * 1665 * \param data Start the data address. 1666 * 1667 * \param numberOfBytes The hash value is calculated for the number of bytes after the 1668 * start data address (0 - 1 byte, 1- 2 bytes etc). 1669 * 1670 * \param hashPtr The pointer to the address where hash is to be stored 1671 * 1672 * \return Returns the status of the Flash operation. 1673 * 1674 *******************************************************************************/ 1675 cy_en_flashdrv_status_t Cy_Flash_CalculateHash(const uint32_t* data, uint32_t numberOfBytes, uint32_t* hashPtr); 1676 1677 /******************************************************************************* 1678 * Function Name: Cy_Flash_RowChecksum 1679 ****************************************************************************//** 1680 * 1681 * Returns a checksum value of the specified flash row. 1682 * 1683 * \note Now Cy_Flash_RowChecksum() requires the row <b>address</b> (rowAddr) 1684 * as a parameter. In previous versions of the driver, this function used 1685 * the row <b>number</b> (rowNum) for this parameter. 1686 * 1687 * \param rowAddr The address of the flash row. 1688 * 1689 * \param checksumPtr The pointer to the address where checksum is to be stored 1690 * 1691 * \return Returns the status of the Flash operation. 1692 * 1693 *******************************************************************************/ 1694 cy_en_flashdrv_status_t Cy_Flash_RowChecksum(uint32_t rowAddr, uint32_t* checksumPtr); 1695 1696 /******************************************************************************* 1697 * Function Name: Cy_Flash_Init 1698 ****************************************************************************//** 1699 * 1700 * Initiates all needed prerequisites to support flash erase/write. 1701 * Should be called from each core. 1702 * 1703 * Requires a call to Cy_IPC_Sema_Init(), Cy_IPC_Pipe_Config() and 1704 * Cy_IPC_Pipe_Init() functions before use for CAT1A devices. 1705 * 1706 * This function is called in the SystemInit() function, for proper flash write 1707 * and erase operations. If the default startup file is not used, or the function 1708 * SystemInit() is not called in your project, ensure to perform the following steps 1709 * before any flash or EmEEPROM write/erase operations: 1710 * \snippet flash/snippet/main.c Flash Initialization 1711 * 1712 *******************************************************************************/ 1713 void Cy_Flash_Init(void); 1714 1715 /** \} group_flash_functions */ 1716 1717 /** \cond INTERNAL */ 1718 1719 /******************************************************************************* 1720 Backward compatibility macro. The following code is DEPRECATED and must 1721 not be used in new projects 1722 *******************************************************************************/ 1723 1724 #define Cy_Flash_IsWriteComplete(...) Cy_Flash_IsOperationComplete() 1725 #define Cy_Flash_IsProgramComplete(...) Cy_Flash_IsOperationComplete() 1726 #define Cy_Flash_IsEraseComplete(...) Cy_Flash_IsOperationComplete() 1727 /** \endcond */ 1728 1729 1730 #if defined(__cplusplus) 1731 } 1732 #endif 1733 1734 #endif /* CY_IP_M4CPUSS || CY_IP_M7CPUSS*/ 1735 1736 #endif /* #if !defined (CY_FLASH_H) */ 1737 1738 /** \} group_flash */ 1739 1740 1741 /* [] END OF FILE */ 1742
