1 /***************************************************************************//**
2 * \file cy_dmac.h
3 * \version 1.30.1
4 *
5 * \brief
6 * The header file of the DMAC driver.
7 *
8 ********************************************************************************
9 * \copyright
10 * Copyright 2018-2022 Cypress Semiconductor Corporation
11 * SPDX-License-Identifier: Apache-2.0
12 *
13 * Licensed under the Apache License, Version 2.0 (the "License");
14 * you may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at
16 *
17 * http://www.apache.org/licenses/LICENSE-2.0
18 *
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
24 *******************************************************************************/
25
26 /**
27 * \addtogroup group_dmac
28 * \{
29 * Configures the DMA Controller block, channels and descriptors.
30 *
31 * The functions and other declarations used in this driver are in cy_dmac.h.
32 * You can include cy_pdl.h to get access to all functions
33 * and declarations in the PDL.
34 *
35 * The DMA Controller channel can be used in any project to transfer data
36 * without CPU intervention basing on a hardware trigger signal from another component.
37 *
38 * The DMA Controller block has a set of registers, a base hardware address,
39 * and supports multiple channels. Many API functions for the DMAC driver require
40 * a base hardware address and channel number.
41 * Ensure that you use the correct hardware address for the DMA Controller block in use.
42 *
43 * Features:
44 * * Multiple channels (device specific).
45 * * Four priority levels for each channel.
46 * * Descriptor chaining.
47 * * Configurable data transfer width/masking: byte, half-word (2-byte), and word (4-byte).
48 * * Configurable source and destination addresses.
49 * * Single transfer, 1D, 2D, memory copy and scatter transfer descriptor types are supported.
50 * * Configurable input/output triggers and interrupts.
51 *
52 * \section group_dmac_configuration Configuration Considerations
53 *
54 * To set up a DMAC driver, initialize a descriptor,
55 * initialize and enable a channel, and enable the DMAC block.
56 *
57 * To set up a descriptor, provide the configuration parameters for the
58 * descriptor in the \ref cy_stc_dmac_descriptor_config_t structure. Then call the
59 * \ref Cy_DMAC_Descriptor_Init function to initialize the descriptor in SRAM. You can
60 * modify the source and destination addresses dynamically by calling
61 * \ref Cy_DMAC_Descriptor_SetSrcAddress and \ref Cy_DMAC_Descriptor_SetDstAddress.
62 *
63 * To set up a DMAC channel, provide a filled \ref cy_stc_dmac_channel_config_t
64 * structure. Call the \ref Cy_DMAC_Channel_Init function, specifying the channel
65 * number. Use \ref Cy_DMAC_Channel_Enable to enable the configured DMAC channel.
66 *
67 * Call \ref Cy_DMAC_Channel_Enable for each DMAC channel in use.
68 *
69 * When configured, another peripheral typically triggers the DMAC channel. The trigger is
70 * connected to the DMAC channel using the trigger multiplexer. The trigger multiplexer
71 * driver has a software trigger you can use in firmware to trigger the DMAC channel. See the
72 * <a href="group__group__trigmux.html">Trigger Multiplexer</a> documentation.
73 *
74 * The following is a simplified structure of the DMAC driver API interdependencies
75 * in a typical user application:
76 * \image html dmac.png
77 *
78 * <B>NOTE:</B> DMAC will read descriptors from SRAM memory. To run DMAC on devices with Core CM7,
79 * D cache needs to be cleaned before calling \ref Cy_DMAC_Channel_Enable and should be invalidated after DMAC transfer. \n
80 * <B>NOTE:</B> Even if a DMAC channel is enabled, it is not operational until
81 * the DMAC block is enabled using function \ref Cy_DMAC_Enable.\n
82 * <B>NOTE:</B> If the DMAC descriptor is configured to generate an interrupt,
83 * the interrupt must be enabled using the \ref Cy_DMAC_Channel_SetInterruptMask
84 * function for each DMAC channel.
85 *
86 * For example:
87 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Enable
88 *
89 * CM7 cores in CAT1C devices support Data Cache. Data Cache line is 32 bytes.
90 * User needs to make sure that the source and destination buffer pointers and the config structure pointers passed
91 * to the following functions points to 32 byte aligned data.
92 * Cy_DMAC_Channel_SetDescriptor, Cy_DMAC_Descriptor_SetNextDescriptor, Cy_DMAC_Descriptor_SetSrcAddress, Cy_DMAC_Descriptor_SetDstAddress.
93 * User can use CY_ALIGN(32) macro for 32 byte alignment.
94 * User needs to clean the following data elements from the cache and invalidate before accessing them.
95 * source and destination buffers and descriptor structure.
96 * * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Cache_usage
97 *
98 * \section group_dmac_more_information More Information.
99 * See the DMAC chapter of the device technical reference manual (TRM).
100 *
101 * \section group_dmac_changelog Changelog
102 *
103 * <table class="doxtable">
104 * <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
105 * <tr>
106 * <td>1.30.1</td>
107 * <td>Minor Documentation update for cache usage on CM7.</td>
108 * <td>Documentation enhancement.</td>
109 * </tr>
110 * <tr>
111 * <td>1.30</td>
112 * <td>Update to configure DMAC on core CM7.</td>
113 * <td>Support for new product family.</td>
114 * </tr>
115 * <tr>
116 * <td>1.20</td>
117 * <td>Fixed MISRA 2012 violations.</td>
118 * <td>MISRA 2012 compliance.</td>
119 * </tr>
120 * <tr>
121 * <td>1.10.1</td>
122 * <td>Minor documentation updates.</td>
123 * <td>Documentation enhancement.</td>
124 * </tr>
125 * <tr>
126 * <td>1.10</td>
127 * <td>The \ref Cy_DMAC_Channel_ClearInterrupt is changed.</td>
128 * <td>Minor defect fixing.</td>
129 * </tr>
130 * <tr>
131 * <td>1.0</td>
132 * <td>The initial version.</td>
133 * <td></td>
134 * </tr>
135 * </table>
136 *
137 * \defgroup group_dmac_macros Macros
138 * \defgroup group_dmac_macros_interrupt_masks Interrupt Masks
139 * \defgroup group_dmac_functions Functions
140 * \{
141 * \defgroup group_dmac_block_functions Block Functions
142 * \defgroup group_dmac_channel_functions Channel Functions
143 * \defgroup group_dmac_descriptor_functions Descriptor Functions
144 * \}
145 * \defgroup group_dmac_data_structures Data Structures
146 * \defgroup group_dmac_enums Enumerated Types
147 */
148
149 #if !defined (CY_DMAC_H)
150 #define CY_DMAC_H
151
152 #include "cy_device.h"
153
154 #if defined (CY_IP_M4CPUSS_DMAC) || defined (CY_IP_MXAHBDMAC) || defined (CY_IP_M7CPUSS_DMAC)
155
156 #include "cy_syslib.h"
157 #include <stdint.h>
158 #include <stdbool.h>
159 #include <stddef.h>
160
161 #if defined(__cplusplus)
162 extern "C" {
163 #endif
164
165 CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 10.8', 13, \
166 'Value extracted from _VAL2FLD macro will not exceed enum range.')
167
168 /******************************************************************************
169 * Macro definitions *
170 ******************************************************************************/
171
172 /**
173 * \addtogroup group_dmac_macros
174 * \{
175 */
176
177 /** The driver major version */
178 #define CY_DMAC_DRV_VERSION_MAJOR 1
179
180 /** The driver minor version */
181 #define CY_DMAC_DRV_VERSION_MINOR 30
182
183 /** The DMAC driver identifier */
184 #define CY_DMAC_ID (CY_PDL_DRV_ID(0x3FU))
185
186 /** The minimum X/Y Count API parameters */
187 #define CY_DMAC_LOOP_COUNT_MIN (1UL)
188 /** The maximum X/Y Count API parameters */
189 #define CY_DMAC_LOOP_COUNT_MAX (65536UL)
190 /** The maximum X Count API parameter for scatter transfer */
191 #define CY_DMAC_SCATTER_COUNT_MAX (32768UL)
192
193 /** The minimum X/Y Increment API parameters */
194 #define CY_DMAC_LOOP_INCREMENT_MIN (-32768L)
195 /** The maximum X/Y Increment API parameters */
196 #define CY_DMAC_LOOP_INCREMENT_MAX (32767L)
197
198 /**
199 * \addtogroup group_dmac_macros_interrupt_masks Interrupt Masks
200 * \{
201 */
202
203 /** Bit 0: Completion of data transfer(s) as specified by the descriptor's interruptType setting. */
204 #define CY_DMAC_INTR_COMPLETION (DMAC_CH_V2_INTR_COMPLETION_Msk)
205 /** Bit 1: Bus error for a load from the source. */
206 #define CY_DMAC_INTR_SRC_BUS_ERROR (DMAC_CH_V2_INTR_SRC_BUS_ERROR_Msk)
207 /** Bit 2: Bus error for a store to the destination. */
208 #define CY_DMAC_INTR_DST_BUS_ERROR (DMAC_CH_V2_INTR_DST_BUS_ERROR_Msk)
209 /** Bit 3: Misalignment of the source address. */
210 #define CY_DMAC_INTR_SRC_MISAL (DMAC_CH_V2_INTR_SRC_MISAL_Msk)
211 /** Bit 4: Misalignment of the destination address. */
212 #define CY_DMAC_INTR_DST_MISAL (DMAC_CH_V2_INTR_DST_MISAL_Msk)
213 /** Bit 5: The channel is enabled and the current descriptor pointer is "0". */
214 #define CY_DMAC_INTR_CURR_PTR_NULL (DMAC_CH_V2_INTR_CURR_PTR_NULL_Msk)
215 /** Bit 6: The channel is disabled and the data transfer engine is busy. */
216 #define CY_DMAC_INTR_ACTIVE_CH_DISABLED (DMAC_CH_V2_INTR_ACTIVE_CH_DISABLED_Msk)
217 /** Bit 7: Bus error for a load of the descriptor. */
218 #define CY_DMAC_INTR_DESCR_BUS_ERROR (DMAC_CH_V2_INTR_DESCR_BUS_ERROR_Msk)
219
220 /** \} group_dmac_macros_interrupt_masks */
221
222 /** \} group_dmac_macros */
223
224
225 /**
226 * \addtogroup group_dmac_enums
227 * \{
228 */
229
230 /** Contains the options for the descriptor type */
231 typedef enum
232 {
233 CY_DMAC_SINGLE_TRANSFER = 0U, /**< Single transfer. */
234 CY_DMAC_1D_TRANSFER = 1U, /**< 1D transfer. */
235 CY_DMAC_2D_TRANSFER = 2U, /**< 2D transfer. */
236 CY_DMAC_MEMORY_COPY = 3U, /**< Memory copy. */
237 CY_DMAC_SCATTER_TRANSFER = 4U /**< Scatter transfer. */
238 } cy_en_dmac_descriptor_type_t;
239
240 /** Contains the options for the interrupt, trig-in and trig-out type parameters of the descriptor */
241 typedef enum
242 {
243 CY_DMAC_1ELEMENT = 0U, /**< One element transfer. */
244 CY_DMAC_X_LOOP = 1U, /**< One X loop transfer. */
245 CY_DMAC_DESCR = 2U, /**< One descriptor transfer. */
246 CY_DMAC_DESCR_CHAIN = 3U /**< Entire descriptor chain transfer. */
247 } cy_en_dmac_trigger_type_t;
248
249 /** Contains the options for the data size */
250 typedef enum
251 {
252 CY_DMAC_BYTE = 0U, /**< One byte. */
253 CY_DMAC_HALFWORD = 1U, /**< Half word (two bytes). */
254 CY_DMAC_WORD = 2U /**< Full word (four bytes). */
255 } cy_en_dmac_data_size_t;
256
257 /** Contains the options for descriptor retriggering */
258 typedef enum
259 {
260 CY_DMAC_RETRIG_IM = 0U, /**< Retrigger immediately. */
261 CY_DMAC_RETRIG_4CYC = 1U, /**< Retrigger after 4 Clk_Slow cycles. */
262 CY_DMAC_RETRIG_16CYC = 2U, /**< Retrigger after 16 Clk_Slow cycles. */
263 CY_DMAC_WAIT_FOR_REACT = 3U /**< Wait for trigger reactivation. */
264 } cy_en_dmac_retrigger_t;
265
266 /** Contains the options for the transfer size */
267 typedef enum
268 {
269 CY_DMAC_TRANSFER_SIZE_DATA = 0U, /**< As specified by dataSize. */
270 CY_DMAC_TRANSFER_SIZE_WORD = 1U, /**< A full word (four bytes). */
271 } cy_en_dmac_transfer_size_t;
272
273 /** Contains the options for the state of the channel when the descriptor is completed */
274 typedef enum
275 {
276 CY_DMAC_CHANNEL_ENABLED = 0U, /**< Channel stays enabled. */
277 CY_DMAC_CHANNEL_DISABLED = 1U /**< Channel is disabled. */
278 } cy_en_dmac_channel_state_t;
279
280 /** Contains the return values of the DMAC driver */
281 typedef enum
282 {
283 CY_DMAC_SUCCESS = 0x0UL, /**< Success. */
284 CY_DMAC_BAD_PARAM = CY_DMAC_ID | CY_PDL_STATUS_ERROR | 0x1UL /**< The input parameters passed to the DMAC API are not valid. */
285 } cy_en_dmac_status_t;
286
287 /** \} group_dmac_enums */
288
289 /** \cond Macros for the conditions used by CY_ASSERT calls */
290
291 #define CY_DMAC_IS_LOOP_COUNT_VALID(count) (((count) >= CY_DMAC_LOOP_COUNT_MIN) && ((count) <= CY_DMAC_LOOP_COUNT_MAX))
292 #define CY_DMAC_IS_SCATTER_COUNT_VALID(count) (((count) >= CY_DMAC_LOOP_COUNT_MIN) && ((count) <= CY_DMAC_SCATTER_COUNT_MAX))
293 #define CY_DMAC_IS_LOOP_INCR_VALID(incr) (((incr) >= CY_DMAC_LOOP_INCREMENT_MIN) && ((incr) <= CY_DMAC_LOOP_INCREMENT_MAX))
294 #define CY_DMAC_IS_PRIORITY_VALID(prio) ((prio) <= 3UL)
295
296 #define CY_DMAC_INTR_MASK (CY_DMAC_INTR_COMPLETION | \
297 CY_DMAC_INTR_SRC_BUS_ERROR | \
298 CY_DMAC_INTR_DST_BUS_ERROR | \
299 CY_DMAC_INTR_SRC_MISAL | \
300 CY_DMAC_INTR_DST_MISAL | \
301 CY_DMAC_INTR_CURR_PTR_NULL | \
302 CY_DMAC_INTR_ACTIVE_CH_DISABLED | \
303 CY_DMAC_INTR_DESCR_BUS_ERROR)
304
305 #define CY_DMAC_IS_INTR_MASK_VALID(intr) (0UL == ((intr) & ((uint32_t) ~CY_DMAC_INTR_MASK)))
306
307 #define CY_DMAC_IS_RETRIGGER_VALID(retrigger) ((CY_DMAC_RETRIG_IM == (retrigger)) || \
308 (CY_DMAC_RETRIG_4CYC == (retrigger)) || \
309 (CY_DMAC_RETRIG_16CYC == (retrigger)) || \
310 (CY_DMAC_WAIT_FOR_REACT == (retrigger)))
311
312 #define CY_DMAC_IS_TRIG_TYPE_VALID(trigType) ((CY_DMAC_1ELEMENT == (trigType)) || \
313 (CY_DMAC_X_LOOP == (trigType)) || \
314 (CY_DMAC_DESCR == (trigType)) || \
315 (CY_DMAC_DESCR_CHAIN == (trigType)))
316
317 #define CY_DMAC_IS_XFER_SIZE_VALID(xferSize) ((CY_DMAC_TRANSFER_SIZE_DATA == (xferSize)) || \
318 (CY_DMAC_TRANSFER_SIZE_WORD == (xferSize)))
319
320 #define CY_DMAC_IS_CHANNEL_STATE_VALID(state) ((CY_DMAC_CHANNEL_ENABLED == (state)) || \
321 (CY_DMAC_CHANNEL_DISABLED == (state)))
322
323 #define CY_DMAC_IS_DATA_SIZE_VALID(dataSize) ((CY_DMAC_BYTE == (dataSize)) || \
324 (CY_DMAC_HALFWORD == (dataSize)) || \
325 (CY_DMAC_WORD == (dataSize)))
326
327 #define CY_DMAC_IS_TYPE_VALID(descrType) ((CY_DMAC_SINGLE_TRANSFER == (descrType)) || \
328 (CY_DMAC_1D_TRANSFER == (descrType)) || \
329 (CY_DMAC_2D_TRANSFER == (descrType)) || \
330 (CY_DMAC_MEMORY_COPY == (descrType)) || \
331 (CY_DMAC_SCATTER_TRANSFER == (descrType)))
332
333 #define CY_DMAC_IS_CH_NR_VALID(chNr) (CY_DMAC_CH_NR > (chNr))
334
335 /** \endcond */
336
337
338 /**
339 * \addtogroup group_dmac_data_structures
340 * \{
341 */
342
343
344 /**
345 * DMAC descriptor structure type. It is a user-declared structure
346 * allocated in RAM. The DMAC HW requires a pointer to this structure to work with it.
347 *
348 * For advanced users: the descriptor can be allocated even in flash, however the user
349 * have to predefine all the structure items with constants manually,
350 * because the descriptor "Set" API functions (including \ref Cy_DMAC_Descriptor_Init())
351 * don't work with read-only descriptors.
352 */
353 typedef struct
354 {
355 uint32_t ctl; /*!< 0x00000000 Descriptor control */
356 uint32_t src; /*!< 0x00000004 Descriptor source */
357 uint32_t dst; /*!< 0x00000008 Descriptor destination */
358 uint32_t xSize; /*!< 0x0000000C Descriptor X loop size */
359 uint32_t xIncr; /*!< 0x00000010 Descriptor X loop increment */
360 uint32_t ySize; /*!< 0x00000014 Descriptor Y loop size */
361 uint32_t yIncr; /*!< 0x00000010 Descriptor Y loop increment */
362 uint32_t nextPtr; /*!< 0x00000014 Descriptor next pointer */
363 } cy_stc_dmac_descriptor_t;
364
365 /** \cond The next type-specific descriptor types are ONLY for internal API implementation. */
366
367 typedef cy_stc_dmac_descriptor_t cy_stc_dmac_dscr_2d_t;
368
369 typedef struct
370 {
371 uint32_t ctl;
372 uint32_t src;
373 uint32_t dst;
374 uint32_t nextPtr;
375 } cy_stc_dmac_dscr_single_t;
376
377 typedef struct
378 {
379 uint32_t ctl;
380 uint32_t src;
381 uint32_t xSize;
382 uint32_t nextPtr;
383 } cy_stc_dmac_dscr_scatter_t;
384
385 typedef struct
386 {
387 uint32_t ctl;
388 uint32_t src;
389 uint32_t dst;
390 uint32_t xSize;
391 uint32_t nextPtr;
392 } cy_stc_dmac_dscr_memcpy_t;
393
394 typedef struct
395 {
396 uint32_t ctl;
397 uint32_t src;
398 uint32_t dst;
399 uint32_t xSize;
400 uint32_t xIncr;
401 uint32_t nextPtr;
402 } cy_stc_dmac_dscr_1d_t;
403
404 /** \endcond */
405
406
407 /**
408 * This structure is a configuration structure pre-initialized by user
409 * and passed as a parameter to the \ref Cy_DMAC_Descriptor_Init().
410 * It can be allocated in RAM/flash (on user's choice).
411 * In case of flash allocation there is a possibility to reinitialize the descriptor in runtime.
412 * This structure has all the parameters of the descriptor as separate parameters.
413 * Most of these parameters are represented in the \ref cy_stc_dmac_descriptor_t structure as bit fields.
414 */
415 typedef struct
416 {
417 cy_en_dmac_retrigger_t retrigger; /**< Specifies whether the DMA controller should wait for the input trigger to be deactivated. */
418 cy_en_dmac_trigger_type_t interruptType; /**< Sets the event that triggers an interrupt. See \ref cy_en_dmac_trigger_type_t. */
419 cy_en_dmac_trigger_type_t triggerOutType; /**< Sets the event that triggers an output. See \ref cy_en_dmac_trigger_type_t. */
420 cy_en_dmac_channel_state_t channelState; /**< Specifies whether the channel is enabled or disabled on completion of descriptor see \ref cy_en_dmac_channel_state_t. */
421 cy_en_dmac_trigger_type_t triggerInType; /**< Sets what type of transfer is triggered. See \ref cy_en_dmac_trigger_type_t. */
422 bool dataPrefetch; /**< Source data transfers are initiated as soon as the channel is enabled, the current descriptor pointer is NOT "0"
423 * and there is space available in the channel's data FIFO.
424 */
425 cy_en_dmac_data_size_t dataSize; /**< The size of the data bus for transfer. See \ref cy_en_dmac_data_size_t.
426 * For memory copy and scatter descriptors this setting will be ignored.
427 */
428 cy_en_dmac_transfer_size_t srcTransferSize; /**< The source transfer size.
429 * For memory copy and scatter descriptors this setting will be ignored.
430 */
431 cy_en_dmac_transfer_size_t dstTransferSize; /**< The destination transfer size.
432 * For memory copy and scatter descriptors this setting will be ignored.
433 */
434 cy_en_dmac_descriptor_type_t descriptorType; /**< The type of the descriptor. See \ref cy_en_dmac_descriptor_type_t. */
435 void * srcAddress; /**< The source address of the transfer. */
436 void * dstAddress; /**< The destination address of the transfer. */
437 int32_t srcXincrement; /**< The address increment of the source after each X-loop transfer. Valid range is -32768...32767. */
438 int32_t dstXincrement; /**< The address increment of the destination after each X-loop transfer. Valid range is -32768...32767. */
439 uint32_t xCount; /**< The number of transfers in an X-loop. Valid range (for all descriptors except scatter transfer) is 1...65536.
440 * For memory copy descriptors, the X count is a number of bytes (not a data transfer size).
441 * For scatter descriptors, the X count is a number of [address, data] pairs (two words each). Valid range is 1...32768.
442 */
443 int32_t srcYincrement; /**< The address increment of the source after each Y-loop transfer. Valid range is -32768...32767. */
444 int32_t dstYincrement; /**< The address increment of the destination after each Y-loop transfer. Valid range is -32768...32767. */
445 uint32_t yCount; /**< The number of X-loops in the Y-loop. Valid range is 1...65536. */
446 cy_stc_dmac_descriptor_t * nextDescriptor; /**< The next descriptor to chain after completion. A NULL value will signify no chaining. */
447 } cy_stc_dmac_descriptor_config_t;
448
449 /** This structure holds the initialization values for the DMAC channel */
450 typedef struct
451 {
452 cy_stc_dmac_descriptor_t * descriptor; /**< The DMAC descriptor associated with the channel being initialized. */
453 uint32_t priority; /**< This parameter specifies the channel's priority. */
454 bool enable; /**< This parameter specifies if the channel is enabled after initializing. */
455 bool bufferable; /**< This parameter specifies whether a write transaction can complete.
456 * without waiting for the destination to accept the write transaction data.
457 */
458 } cy_stc_dmac_channel_config_t;
459
460 /** \} group_dmac_data_structures */
461
462
463 /**
464 * \addtogroup group_dmac_functions
465 * \{
466 */
467
468 __STATIC_INLINE void Cy_DMAC_Enable (DMAC_Type * base);
469 __STATIC_INLINE void Cy_DMAC_Disable (DMAC_Type * base);
470 __STATIC_INLINE uint32_t Cy_DMAC_GetActiveChannel (DMAC_Type const * base);
471
472
473 /**
474 * \addtogroup group_dmac_channel_functions
475 * \{
476 */
477 cy_en_dmac_status_t Cy_DMAC_Channel_Init (DMAC_Type * base, uint32_t channel, cy_stc_dmac_channel_config_t const * config);
478 void Cy_DMAC_Channel_DeInit (DMAC_Type * base, uint32_t channel);
479 __STATIC_INLINE void Cy_DMAC_Channel_SetDescriptor (DMAC_Type * base, uint32_t channel, cy_stc_dmac_descriptor_t const * descriptor);
480 __STATIC_INLINE void Cy_DMAC_Channel_Enable (DMAC_Type * base, uint32_t channel);
481 __STATIC_INLINE void Cy_DMAC_Channel_Disable (DMAC_Type * base, uint32_t channel);
482 __STATIC_INLINE void Cy_DMAC_Channel_SetPriority (DMAC_Type * base, uint32_t channel, uint32_t priority);
483 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetPriority (DMAC_Type const * base, uint32_t channel);
484 __STATIC_INLINE void * Cy_DMAC_Channel_GetCurrentSrcAddress (DMAC_Type const * base, uint32_t channel);
485 __STATIC_INLINE void * Cy_DMAC_Channel_GetCurrentDstAddress (DMAC_Type const * base, uint32_t channel);
486 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetCurrentXloopIndex (DMAC_Type const * base, uint32_t channel);
487 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetCurrentYloopIndex (DMAC_Type const * base, uint32_t channel);
488 __STATIC_INLINE cy_stc_dmac_descriptor_t *
489 Cy_DMAC_Channel_GetCurrentDescriptor (DMAC_Type const * base, uint32_t channel);
490 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetInterruptStatus (DMAC_Type const * base, uint32_t channel);
491 __STATIC_INLINE void Cy_DMAC_Channel_ClearInterrupt (DMAC_Type * base, uint32_t channel, uint32_t interrupt);
492 __STATIC_INLINE void Cy_DMAC_Channel_SetInterrupt (DMAC_Type * base, uint32_t channel, uint32_t interrupt);
493 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetInterruptMask (DMAC_Type const * base, uint32_t channel);
494 __STATIC_INLINE void Cy_DMAC_Channel_SetInterruptMask (DMAC_Type * base, uint32_t channel, uint32_t interrupt);
495 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetInterruptStatusMasked(DMAC_Type const * base, uint32_t channel);
496
497 /** \} group_dmac_channel_functions */
498
499
500 /**
501 * \addtogroup group_dmac_descriptor_functions
502 * \{
503 */
504
505 cy_en_dmac_status_t Cy_DMAC_Descriptor_Init (cy_stc_dmac_descriptor_t * descriptor, cy_stc_dmac_descriptor_config_t const * config);
506 void Cy_DMAC_Descriptor_DeInit(cy_stc_dmac_descriptor_t * descriptor);
507
508 void Cy_DMAC_Descriptor_SetNextDescriptor (cy_stc_dmac_descriptor_t * descriptor, cy_stc_dmac_descriptor_t const * nextDescriptor);
509 void Cy_DMAC_Descriptor_SetDescriptorType (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_descriptor_type_t descriptorType);
510 __STATIC_INLINE void Cy_DMAC_Descriptor_SetSrcAddress (cy_stc_dmac_descriptor_t * descriptor, void const * srcAddress);
511 __STATIC_INLINE void Cy_DMAC_Descriptor_SetDstAddress (cy_stc_dmac_descriptor_t * descriptor, void const * dstAddress);
512 void Cy_DMAC_Descriptor_SetXloopDataCount (cy_stc_dmac_descriptor_t * descriptor, uint32_t xCount);
513 __STATIC_INLINE void Cy_DMAC_Descriptor_SetYloopDataCount (cy_stc_dmac_descriptor_t * descriptor, uint32_t yCount);
514 __STATIC_INLINE void Cy_DMAC_Descriptor_SetXloopSrcIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t srcXincrement);
515 __STATIC_INLINE void Cy_DMAC_Descriptor_SetXloopDstIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t dstXincrement);
516 __STATIC_INLINE void Cy_DMAC_Descriptor_SetYloopSrcIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t srcYincrement);
517 __STATIC_INLINE void Cy_DMAC_Descriptor_SetYloopDstIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t dstYincrement);
518 __STATIC_INLINE void Cy_DMAC_Descriptor_SetInterruptType (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_trigger_type_t interruptType);
519 __STATIC_INLINE void Cy_DMAC_Descriptor_SetTriggerInType (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_trigger_type_t triggerInType);
520 __STATIC_INLINE void Cy_DMAC_Descriptor_SetTriggerOutType (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_trigger_type_t triggerOutType);
521 __STATIC_INLINE void Cy_DMAC_Descriptor_SetDataSize (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_data_size_t dataSize);
522 __STATIC_INLINE void Cy_DMAC_Descriptor_SetSrcTransferSize (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_transfer_size_t srcTransferSize);
523 __STATIC_INLINE void Cy_DMAC_Descriptor_SetDstTransferSize (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_transfer_size_t dstTransferSize);
524 __STATIC_INLINE void Cy_DMAC_Descriptor_SetRetrigger (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_retrigger_t retrigger);
525 __STATIC_INLINE void Cy_DMAC_Descriptor_SetChannelState (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_channel_state_t channelState);
526
527 cy_stc_dmac_descriptor_t * Cy_DMAC_Descriptor_GetNextDescriptor (cy_stc_dmac_descriptor_t const * descriptor);
528 __STATIC_INLINE cy_en_dmac_descriptor_type_t Cy_DMAC_Descriptor_GetDescriptorType (cy_stc_dmac_descriptor_t const * descriptor);
529 __STATIC_INLINE void * Cy_DMAC_Descriptor_GetSrcAddress (cy_stc_dmac_descriptor_t const * descriptor);
530 __STATIC_INLINE void * Cy_DMAC_Descriptor_GetDstAddress (cy_stc_dmac_descriptor_t const * descriptor);
531 uint32_t Cy_DMAC_Descriptor_GetXloopDataCount (cy_stc_dmac_descriptor_t const * descriptor);
532 __STATIC_INLINE uint32_t Cy_DMAC_Descriptor_GetYloopDataCount (cy_stc_dmac_descriptor_t const * descriptor);
533 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetXloopSrcIncrement(cy_stc_dmac_descriptor_t const * descriptor);
534 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetXloopDstIncrement(cy_stc_dmac_descriptor_t const * descriptor);
535 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetYloopSrcIncrement(cy_stc_dmac_descriptor_t const * descriptor);
536 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetYloopDstIncrement(cy_stc_dmac_descriptor_t const * descriptor);
537 __STATIC_INLINE cy_en_dmac_trigger_type_t Cy_DMAC_Descriptor_GetInterruptType (cy_stc_dmac_descriptor_t const * descriptor);
538 __STATIC_INLINE cy_en_dmac_trigger_type_t Cy_DMAC_Descriptor_GetTriggerInType (cy_stc_dmac_descriptor_t const * descriptor);
539 __STATIC_INLINE cy_en_dmac_trigger_type_t Cy_DMAC_Descriptor_GetTriggerOutType (cy_stc_dmac_descriptor_t const * descriptor);
540 __STATIC_INLINE cy_en_dmac_data_size_t Cy_DMAC_Descriptor_GetDataSize (cy_stc_dmac_descriptor_t const * descriptor);
541 __STATIC_INLINE cy_en_dmac_transfer_size_t Cy_DMAC_Descriptor_GetSrcTransferSize (cy_stc_dmac_descriptor_t const * descriptor);
542 __STATIC_INLINE cy_en_dmac_transfer_size_t Cy_DMAC_Descriptor_GetDstTransferSize (cy_stc_dmac_descriptor_t const * descriptor);
543 __STATIC_INLINE cy_en_dmac_retrigger_t Cy_DMAC_Descriptor_GetRetrigger (cy_stc_dmac_descriptor_t const * descriptor);
544 __STATIC_INLINE cy_en_dmac_channel_state_t Cy_DMAC_Descriptor_GetChannelState (cy_stc_dmac_descriptor_t const * descriptor);
545
546 /** \} group_dmac_descriptor_functions */
547
548
549 /***************************************
550 * In-line Function Implementation
551 ***************************************/
552
553
554 /**
555 * \addtogroup group_dmac_block_functions
556 * \{
557 */
558
559
560 /*******************************************************************************
561 * Function Name: Cy_DMAC_Enable
562 ****************************************************************************//**
563 *
564 * Enables the DMACblock.
565 *
566 * \param base
567 * The pointer to the hardware DMAC block.
568 *
569 * \funcusage
570 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Enable
571 *
572 *******************************************************************************/
Cy_DMAC_Enable(DMAC_Type * base)573 __STATIC_INLINE void Cy_DMAC_Enable(DMAC_Type * base)
574 {
575 DMAC_CTL(base) |= DMAC_V2_CTL_ENABLED_Msk;
576 }
577
578
579 /*******************************************************************************
580 * Function Name: Cy_DMAC_Disable
581 ****************************************************************************//**
582 *
583 * Disables the DMACblock.
584 *
585 * \param base
586 * The pointer to the hardware DMAC block.
587 *
588 * \funcusage
589 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Disable
590 *
591 *******************************************************************************/
Cy_DMAC_Disable(DMAC_Type * base)592 __STATIC_INLINE void Cy_DMAC_Disable(DMAC_Type * base)
593 {
594 DMAC_CTL(base) &= (uint32_t) ~DMAC_V2_CTL_ENABLED_Msk;
595 }
596
597
598 /*******************************************************************************
599 * Function Name: Cy_DMAC_GetActiveChannel
600 ****************************************************************************//**
601 *
602 * Returns the status of the active/pending channels of the DMACblock.
603 *
604 * \param base
605 * The pointer to the hardware DMAC block.
606 *
607 * \return
608 * Returns a bit-field with all of the currently active/pending channels in the
609 * DMAC block.
610 *
611 * \funcusage
612 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Disable
613 *
614 *******************************************************************************/
Cy_DMAC_GetActiveChannel(DMAC_Type const * base)615 __STATIC_INLINE uint32_t Cy_DMAC_GetActiveChannel(DMAC_Type const * base)
616 {
617 return(_FLD2VAL(DMAC_V2_ACTIVE_ACTIVE, DMAC_ACTIVE(base)));
618 }
619
620 /** \} group_dmac_block_functions */
621
622
623 /**
624 * \addtogroup group_dmac_descriptor_functions
625 * \{
626 */
627
628
629 /*******************************************************************************
630 * Function Name: Cy_DMAC_Descriptor_SetSrcAddress
631 ****************************************************************************//**
632 *
633 * Sets the source address parameter for the specified descriptor.
634 *
635 * \param descriptor
636 * The descriptor structure instance.
637 *
638 * \param srcAddress
639 * The source address value for the descriptor.
640 * For CAT1C devices this pointer needs to point to 32 byte aligned structure.
641 *
642 * \funcusage
643 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
644 *
645 *******************************************************************************/
Cy_DMAC_Descriptor_SetSrcAddress(cy_stc_dmac_descriptor_t * descriptor,void const * srcAddress)646 __STATIC_INLINE void Cy_DMAC_Descriptor_SetSrcAddress(cy_stc_dmac_descriptor_t * descriptor, void const * srcAddress)
647 {
648 descriptor->src = (uint32_t) srcAddress;
649 }
650
651
652 /*******************************************************************************
653 * Function Name: Cy_DMAC_Descriptor_GetSrcAddress
654 ****************************************************************************//**
655 *
656 * Returns the source address of the specified descriptor.
657 *
658 * \param descriptor
659 * The descriptor structure instance.
660 *
661 * \return
662 * The source address value of the descriptor.
663 *
664 * \funcusage
665 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
666 *
667 *******************************************************************************/
Cy_DMAC_Descriptor_GetSrcAddress(cy_stc_dmac_descriptor_t const * descriptor)668 __STATIC_INLINE void * Cy_DMAC_Descriptor_GetSrcAddress(cy_stc_dmac_descriptor_t const * descriptor)
669 {
670 return ((void *) descriptor->src);
671 }
672
673
674 /*******************************************************************************
675 * Function Name: Cy_DMAC_Descriptor_SetDstAddress
676 ****************************************************************************//**
677 *
678 * Sets the destination address parameter for the specified descriptor.
679 *
680 * \param descriptor
681 * The descriptor structure instance.
682 *
683 * \param dstAddress
684 * The destination address value for the descriptor.
685 * For CAT1C devices this pointer needs to point to 32 byte aligned structure.
686 *
687 * \funcusage
688 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
689 *
690 *******************************************************************************/
Cy_DMAC_Descriptor_SetDstAddress(cy_stc_dmac_descriptor_t * descriptor,void const * dstAddress)691 __STATIC_INLINE void Cy_DMAC_Descriptor_SetDstAddress(cy_stc_dmac_descriptor_t * descriptor, void const * dstAddress)
692 {
693 CY_ASSERT_L1(CY_DMAC_SCATTER_TRANSFER != Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
694
695 descriptor->dst = (uint32_t) dstAddress;
696 }
697
698
699 /*******************************************************************************
700 * Function Name: Cy_DMAC_Descriptor_GetDstAddress
701 ****************************************************************************//**
702 *
703 * Returns the destination address of the specified descriptor.
704 *
705 * \param descriptor
706 * The descriptor structure instance.
707 *
708 * \return
709 * The destination address value of the descriptor.
710 *
711 * \funcusage
712 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
713 *
714 *******************************************************************************/
Cy_DMAC_Descriptor_GetDstAddress(cy_stc_dmac_descriptor_t const * descriptor)715 __STATIC_INLINE void * Cy_DMAC_Descriptor_GetDstAddress(cy_stc_dmac_descriptor_t const * descriptor)
716 {
717 CY_ASSERT_L1(CY_DMAC_SCATTER_TRANSFER != Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
718
719 return ((void *) descriptor->dst);
720 }
721
722
723 /*******************************************************************************
724 * Function Name: Cy_DMAC_Descriptor_SetInterruptType
725 ****************************************************************************//**
726 *
727 * Sets the interrupt type parameter for the specified descriptor.
728 *
729 * \param descriptor
730 * The descriptor structure instance.
731 *
732 * \param interruptType
733 * The interrupt type set for the descriptor. \ref cy_en_dmac_trigger_type_t
734 *
735 * \funcusage
736 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
737 *
738 *******************************************************************************/
Cy_DMAC_Descriptor_SetInterruptType(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_trigger_type_t interruptType)739 __STATIC_INLINE void Cy_DMAC_Descriptor_SetInterruptType(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_trigger_type_t interruptType)
740 {
741 CY_ASSERT_L3(CY_DMAC_IS_TRIG_TYPE_VALID(interruptType));
742
743 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_INTR_TYPE, interruptType);
744 }
745
746
747 /*******************************************************************************
748 * Function Name: Cy_DMAC_Descriptor_GetInterruptType
749 ****************************************************************************//**
750 *
751 * Returns the Interrupt-Type of the specified descriptor.
752 *
753 * \param descriptor
754 * The descriptor structure instance.
755 *
756 * \return
757 * The Interrupt-Type \ref cy_en_dmac_trigger_type_t.
758 *
759 * \funcusage
760 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
761 *
762 *******************************************************************************/
Cy_DMAC_Descriptor_GetInterruptType(cy_stc_dmac_descriptor_t const * descriptor)763 __STATIC_INLINE cy_en_dmac_trigger_type_t Cy_DMAC_Descriptor_GetInterruptType(cy_stc_dmac_descriptor_t const * descriptor)
764 {
765 return((cy_en_dmac_trigger_type_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_INTR_TYPE, descriptor->ctl));
766 }
767
768
769 /*******************************************************************************
770 * Function Name: Cy_DMAC_Descriptor_SetTriggerInType
771 ****************************************************************************//**
772 *
773 * Sets the Trigger In Type parameter for the specified descriptor.
774 *
775 * \param descriptor
776 * The descriptor structure instance.
777 *
778 * \param triggerInType
779 * The Trigger In Type parameter \ref cy_en_dmac_trigger_type_t
780 *
781 * \funcusage
782 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
783 *
784 *******************************************************************************/
Cy_DMAC_Descriptor_SetTriggerInType(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_trigger_type_t triggerInType)785 __STATIC_INLINE void Cy_DMAC_Descriptor_SetTriggerInType(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_trigger_type_t triggerInType)
786 {
787 CY_ASSERT_L3(CY_DMAC_IS_TRIG_TYPE_VALID(triggerInType));
788
789 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_TR_IN_TYPE, triggerInType);
790 }
791
792
793 /*******************************************************************************
794 * Function Name: Cy_DMAC_Descriptor_GetTriggerInType
795 ****************************************************************************//**
796 *
797 * Returns the Trigger In Type of the specified descriptor.
798 *
799 * \param descriptor
800 * The descriptor structure instance.
801 *
802 * \return
803 * The Trigger In Type \ref cy_en_dmac_trigger_type_t
804 *
805 * \funcusage
806 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
807 *
808 *******************************************************************************/
Cy_DMAC_Descriptor_GetTriggerInType(cy_stc_dmac_descriptor_t const * descriptor)809 __STATIC_INLINE cy_en_dmac_trigger_type_t Cy_DMAC_Descriptor_GetTriggerInType(cy_stc_dmac_descriptor_t const * descriptor)
810 {
811 return((cy_en_dmac_trigger_type_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_TR_IN_TYPE, descriptor->ctl));
812 }
813
814
815 /*******************************************************************************
816 * Function Name: Cy_DMAC_Descriptor_SetTriggerOutType
817 ****************************************************************************//**
818 *
819 * Sets the Trigger Out Type parameter for the specified descriptor.
820 *
821 * \param descriptor
822 * The descriptor structure instance.
823 *
824 * \param triggerOutType
825 * The Trigger Out Type set for the descriptor. \ref cy_en_dmac_trigger_type_t
826 *
827 * \funcusage
828 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
829 *
830 *******************************************************************************/
Cy_DMAC_Descriptor_SetTriggerOutType(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_trigger_type_t triggerOutType)831 __STATIC_INLINE void Cy_DMAC_Descriptor_SetTriggerOutType(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_trigger_type_t triggerOutType)
832 {
833 CY_ASSERT_L3(CY_DMAC_IS_TRIG_TYPE_VALID(triggerOutType));
834
835 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_TR_OUT_TYPE, triggerOutType);
836 }
837
838
839 /*******************************************************************************
840 * Function Name: Cy_DMAC_Descriptor_GetTriggerOutType
841 ****************************************************************************//**
842 *
843 * Returns the Trigger Out Type of the specified descriptor.
844 *
845 * \param descriptor
846 * The descriptor structure instance.
847 *
848 * \return
849 * The Trigger Out Type parameter \ref cy_en_dmac_trigger_type_t.
850 *
851 * \funcusage
852 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
853 *
854 *******************************************************************************/
Cy_DMAC_Descriptor_GetTriggerOutType(cy_stc_dmac_descriptor_t const * descriptor)855 __STATIC_INLINE cy_en_dmac_trigger_type_t Cy_DMAC_Descriptor_GetTriggerOutType(cy_stc_dmac_descriptor_t const * descriptor)
856 {
857 return((cy_en_dmac_trigger_type_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_TR_OUT_TYPE, descriptor->ctl));
858 }
859
860
861 /*******************************************************************************
862 * Function Name: Cy_DMAC_Descriptor_SetDataSize
863 ****************************************************************************//**
864 *
865 * Sets the Data Element Size parameter for the specified descriptor.
866 *
867 * \param descriptor
868 * The descriptor structure instance.
869 *
870 * \param dataSize
871 * The Data Element Size \ref cy_en_dmac_data_size_t
872 *
873 * \funcusage
874 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
875 *
876 *******************************************************************************/
Cy_DMAC_Descriptor_SetDataSize(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_data_size_t dataSize)877 __STATIC_INLINE void Cy_DMAC_Descriptor_SetDataSize(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_data_size_t dataSize)
878 {
879 CY_ASSERT_L3(CY_DMAC_IS_DATA_SIZE_VALID(dataSize));
880
881 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_DATA_SIZE, dataSize);
882 }
883
884
885 /*******************************************************************************
886 * Function Name: Cy_DMAC_Descriptor_GetDataSize
887 ****************************************************************************//**
888 *
889 * Returns the Data Element Size of the specified descriptor.
890 *
891 * \param descriptor
892 * The descriptor structure instance.
893 *
894 * \return
895 * The Data Element Size \ref cy_en_dmac_data_size_t.
896 *
897 * \funcusage
898 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
899 *
900 *******************************************************************************/
Cy_DMAC_Descriptor_GetDataSize(cy_stc_dmac_descriptor_t const * descriptor)901 __STATIC_INLINE cy_en_dmac_data_size_t Cy_DMAC_Descriptor_GetDataSize(cy_stc_dmac_descriptor_t const * descriptor)
902 {
903 return((cy_en_dmac_data_size_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_DATA_SIZE, descriptor->ctl));
904 }
905
906
907 /*******************************************************************************
908 * Function Name: Cy_DMAC_Descriptor_SetSrcTransferSize
909 ****************************************************************************//**
910 *
911 * Sets the Source Transfer Size parameter for the specified descriptor.
912 *
913 * \param descriptor
914 * The descriptor structure instance.
915 *
916 * \param srcTransferSize
917 * The Source Transfer Size \ref cy_en_dmac_transfer_size_t.
918 *
919 * \funcusage
920 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
921 *******************************************************************************/
Cy_DMAC_Descriptor_SetSrcTransferSize(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_transfer_size_t srcTransferSize)922 __STATIC_INLINE void Cy_DMAC_Descriptor_SetSrcTransferSize(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_transfer_size_t srcTransferSize)
923 {
924 CY_ASSERT_L3(CY_DMAC_IS_XFER_SIZE_VALID(srcTransferSize));
925
926 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_SRC_TRANSFER_SIZE, srcTransferSize);
927 }
928
929
930 /*******************************************************************************
931 * Function Name: Cy_DMAC_Descriptor_GetSrcTransferSize
932 ****************************************************************************//**
933 *
934 * Returns the Source Transfer Size of the specified descriptor.
935 *
936 * \param descriptor
937 * The descriptor structure instance.
938 *
939 * \return
940 * The Source Transfer Size \ref cy_en_dmac_transfer_size_t.
941 *
942 * \funcusage
943 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
944 *
945 *******************************************************************************/
Cy_DMAC_Descriptor_GetSrcTransferSize(cy_stc_dmac_descriptor_t const * descriptor)946 __STATIC_INLINE cy_en_dmac_transfer_size_t Cy_DMAC_Descriptor_GetSrcTransferSize(cy_stc_dmac_descriptor_t const * descriptor)
947 {
948 return((cy_en_dmac_transfer_size_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_SRC_TRANSFER_SIZE, descriptor->ctl));
949 }
950
951
952 /*******************************************************************************
953 * Function Name: Cy_DMAC_Descriptor_SetDstTransferSize
954 ****************************************************************************//**
955 *
956 * Sets the Destination Transfer Size parameter for the specified descriptor.
957 *
958 * \param descriptor
959 * The descriptor structure instance.
960 *
961 * \param dstTransferSize
962 * The Destination Transfer Size \ref cy_en_dmac_transfer_size_t.
963 *
964 * \funcusage
965 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
966 *
967 *******************************************************************************/
Cy_DMAC_Descriptor_SetDstTransferSize(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_transfer_size_t dstTransferSize)968 __STATIC_INLINE void Cy_DMAC_Descriptor_SetDstTransferSize(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_transfer_size_t dstTransferSize)
969 {
970 CY_ASSERT_L3(CY_DMAC_IS_XFER_SIZE_VALID(dstTransferSize));
971
972 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_DST_TRANSFER_SIZE, dstTransferSize);
973 }
974
975
976 /*******************************************************************************
977 * Function Name: Cy_DMAC_Descriptor_GetDstTransferSize
978 ****************************************************************************//**
979 *
980 * Returns the Destination Transfer Size of the specified descriptor.
981 *
982 * \param descriptor
983 * The descriptor structure instance.
984 *
985 * \return
986 * The Destination Transfer Size \ref cy_en_dmac_transfer_size_t
987 *
988 * \funcusage
989 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
990 *
991 *******************************************************************************/
Cy_DMAC_Descriptor_GetDstTransferSize(cy_stc_dmac_descriptor_t const * descriptor)992 __STATIC_INLINE cy_en_dmac_transfer_size_t Cy_DMAC_Descriptor_GetDstTransferSize(cy_stc_dmac_descriptor_t const * descriptor)
993 {
994 return((cy_en_dmac_transfer_size_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_DST_TRANSFER_SIZE, descriptor->ctl));
995 }
996
997
998 /*******************************************************************************
999 * Function Name: Cy_DMAC_Descriptor_SetRetrigger
1000 ****************************************************************************//**
1001 *
1002 * Sets the retrigger value which specifies whether the controller should
1003 * wait for the input trigger to be deactivated.
1004 *
1005 * \param descriptor
1006 * The descriptor structure instance.
1007 *
1008 * \param retrigger
1009 * The \ref cy_en_dmac_retrigger_t parameter specifies whether the controller
1010 * should wait for the input trigger to be deactivated.
1011 *
1012 * \funcusage
1013 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1014 *
1015 *******************************************************************************/
Cy_DMAC_Descriptor_SetRetrigger(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_retrigger_t retrigger)1016 __STATIC_INLINE void Cy_DMAC_Descriptor_SetRetrigger(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_retrigger_t retrigger)
1017 {
1018 CY_ASSERT_L3(CY_DMAC_IS_RETRIGGER_VALID(retrigger));
1019
1020 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_WAIT_FOR_DEACT, retrigger);
1021 }
1022
1023
1024 /*******************************************************************************
1025 * Function Name: Cy_DMAC_Descriptor_GetRetrigger
1026 ****************************************************************************//**
1027 *
1028 * Returns a value which specifies whether the controller should
1029 * wait for the input trigger to be deactivated.
1030 *
1031 * \param descriptor
1032 * The descriptor structure instance.
1033 *
1034 * \return
1035 * The Retrigger setting \ref cy_en_dmac_retrigger_t.
1036 *
1037 * \funcusage
1038 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1039 *
1040 *******************************************************************************/
Cy_DMAC_Descriptor_GetRetrigger(cy_stc_dmac_descriptor_t const * descriptor)1041 __STATIC_INLINE cy_en_dmac_retrigger_t Cy_DMAC_Descriptor_GetRetrigger(cy_stc_dmac_descriptor_t const * descriptor)
1042 {
1043 return((cy_en_dmac_retrigger_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_WAIT_FOR_DEACT, descriptor->ctl));
1044 }
1045
1046
1047 /*******************************************************************************
1048 * Function Name: Cy_DMAC_Descriptor_GetDescriptorType
1049 ****************************************************************************//**
1050 *
1051 * Returns the descriptor's type of the specified descriptor.
1052 *
1053 * \param descriptor
1054 * The descriptor structure instance.
1055 *
1056 * \return
1057 * The descriptor type \ref cy_en_dmac_descriptor_type_t
1058 *
1059 * \funcusage
1060 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1061 *
1062 *******************************************************************************/
Cy_DMAC_Descriptor_GetDescriptorType(cy_stc_dmac_descriptor_t const * descriptor)1063 __STATIC_INLINE cy_en_dmac_descriptor_type_t Cy_DMAC_Descriptor_GetDescriptorType(cy_stc_dmac_descriptor_t const * descriptor)
1064 {
1065 return((cy_en_dmac_descriptor_type_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_DESCR_TYPE, descriptor->ctl));
1066 }
1067
1068
1069 /*******************************************************************************
1070 * Function Name: Cy_DMAC_Descriptor_SetChannelState
1071 ****************************************************************************//**
1072 *
1073 * Sets the channel state on completion of the specified descriptor.
1074 *
1075 * \param descriptor
1076 * The descriptor structure instance.
1077 *
1078 * \param channelState
1079 * The channel state \ref cy_en_dmac_channel_state_t.
1080 *
1081 * \funcusage
1082 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1083 *
1084 *******************************************************************************/
Cy_DMAC_Descriptor_SetChannelState(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_channel_state_t channelState)1085 __STATIC_INLINE void Cy_DMAC_Descriptor_SetChannelState(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_channel_state_t channelState)
1086 {
1087 CY_ASSERT_L3(CY_DMAC_IS_CHANNEL_STATE_VALID(channelState));
1088
1089 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_CH_DISABLE, channelState);
1090 }
1091
1092
1093 /*******************************************************************************
1094 * Function Name: Cy_DMAC_Descriptor_GetChannelState
1095 ****************************************************************************//**
1096 *
1097 * Returns the channel state on completion of the specified descriptor.
1098 *
1099 * \param descriptor
1100 * The descriptor structure instance.
1101 *
1102 * \return
1103 * The Channel State setting \ref cy_en_dmac_channel_state_t
1104 *
1105 * \funcusage
1106 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1107 *
1108 *******************************************************************************/
Cy_DMAC_Descriptor_GetChannelState(cy_stc_dmac_descriptor_t const * descriptor)1109 __STATIC_INLINE cy_en_dmac_channel_state_t Cy_DMAC_Descriptor_GetChannelState(cy_stc_dmac_descriptor_t const * descriptor)
1110 {
1111 return((cy_en_dmac_channel_state_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_CH_DISABLE, descriptor->ctl));
1112 }
1113
1114
1115 /*******************************************************************************
1116 * Function Name: Cy_DMAC_Descriptor_SetXloopSrcIncrement
1117 ****************************************************************************//**
1118 *
1119 * Sets the source increment parameter for the X loop of the specified
1120 * descriptor (for 1D or 2D descriptors only).
1121 *
1122 * \param descriptor
1123 * The descriptor structure instance.
1124 *
1125 * \param srcXincrement
1126 * The value of the source increment. The valid range is -32768 ... 32767.
1127 *
1128 * \funcusage
1129 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1130 *
1131 *******************************************************************************/
Cy_DMAC_Descriptor_SetXloopSrcIncrement(cy_stc_dmac_descriptor_t * descriptor,int32_t srcXincrement)1132 __STATIC_INLINE void Cy_DMAC_Descriptor_SetXloopSrcIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t srcXincrement)
1133 {
1134 CY_ASSERT_L1(CY_DMAC_SINGLE_TRANSFER != Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1135 CY_ASSERT_L2(CY_DMAC_IS_LOOP_INCR_VALID(srcXincrement));
1136
1137 CY_REG32_CLR_SET(descriptor->xIncr, DMAC_CH_V2_DESCR_X_INCR_SRC_X, srcXincrement);
1138 }
1139
1140
1141 /*******************************************************************************
1142 * Function Name: Cy_DMAC_Descriptor_GetXloopSrcIncrement
1143 ****************************************************************************//**
1144 *
1145 * Returns the source increment parameter for the X loop of the specified
1146 * descriptor (for 1D or 2D descriptors only).
1147 *
1148 * \param descriptor
1149 * The descriptor structure instance.
1150 *
1151 * \return
1152 * The value of the source increment. The range is -32768 ... 32767.
1153 *
1154 * \funcusage
1155 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1156 *
1157 *******************************************************************************/
Cy_DMAC_Descriptor_GetXloopSrcIncrement(cy_stc_dmac_descriptor_t const * descriptor)1158 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetXloopSrcIncrement(cy_stc_dmac_descriptor_t const * descriptor)
1159 {
1160 CY_ASSERT_L1(CY_DMAC_SINGLE_TRANSFER != Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1161
1162 return ((int32_t) _FLD2VAL(DMAC_CH_V2_DESCR_X_INCR_SRC_X, descriptor->xIncr));
1163 }
1164
1165
1166 /*******************************************************************************
1167 * Function Name: Cy_DMAC_Descriptor_SetXloopDstIncrement
1168 ****************************************************************************//**
1169 *
1170 * Sets the destination increment parameter for the X loop for the specified
1171 * descriptor (for 1D or 2D descriptors only).
1172 *
1173 * \param descriptor
1174 * The descriptor structure instance.
1175 *
1176 * \param dstXincrement
1177 * The value of the destination increment. The valid range is -32768 ... 32767.
1178 *
1179 * \funcusage
1180 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1181 *
1182 *******************************************************************************/
Cy_DMAC_Descriptor_SetXloopDstIncrement(cy_stc_dmac_descriptor_t * descriptor,int32_t dstXincrement)1183 __STATIC_INLINE void Cy_DMAC_Descriptor_SetXloopDstIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t dstXincrement)
1184 {
1185 CY_ASSERT_L1(CY_DMAC_SINGLE_TRANSFER != Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1186 CY_ASSERT_L2(CY_DMAC_IS_LOOP_INCR_VALID(dstXincrement));
1187
1188 CY_REG32_CLR_SET(descriptor->xIncr, DMAC_CH_V2_DESCR_X_INCR_DST_X, dstXincrement);
1189 }
1190
1191
1192 /*******************************************************************************
1193 * Function Name: Cy_DMAC_Descriptor_GetXloopDstIncrement
1194 ****************************************************************************//**
1195 *
1196 * Returns the destination increment parameter for the X loop of the specified
1197 * descriptor (for 1D or 2D descriptors only).
1198 *
1199 * \param descriptor
1200 * The descriptor structure instance.
1201 *
1202 * \return
1203 * The value of the destination increment. The range is -32768 ... 32767.
1204 *
1205 * \funcusage
1206 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1207 *
1208 *******************************************************************************/
Cy_DMAC_Descriptor_GetXloopDstIncrement(cy_stc_dmac_descriptor_t const * descriptor)1209 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetXloopDstIncrement(cy_stc_dmac_descriptor_t const * descriptor)
1210 {
1211 CY_ASSERT_L1(CY_DMAC_SINGLE_TRANSFER != Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1212
1213 return ((int32_t) _FLD2VAL(DMAC_CH_V2_DESCR_X_INCR_DST_X, descriptor->xIncr));
1214 }
1215
1216
1217 /*******************************************************************************
1218 * Function Name: Cy_DMAC_Descriptor_SetYloopDataCount
1219 ****************************************************************************//**
1220 *
1221 * Sets the number of data elements for the Y loop of the specified descriptor
1222 * (for 2D descriptors only).
1223 *
1224 * \param descriptor
1225 * The descriptor structure instance.
1226 *
1227 * \param yCount
1228 * The number of X loops to execute in the Y loop. The valid range is 1 ... 65536.
1229 *
1230 * \funcusage
1231 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1232 *
1233 *******************************************************************************/
Cy_DMAC_Descriptor_SetYloopDataCount(cy_stc_dmac_descriptor_t * descriptor,uint32_t yCount)1234 __STATIC_INLINE void Cy_DMAC_Descriptor_SetYloopDataCount(cy_stc_dmac_descriptor_t * descriptor, uint32_t yCount)
1235 {
1236 CY_ASSERT_L1(CY_DMAC_2D_TRANSFER == Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1237 CY_ASSERT_L2(CY_DMAC_IS_LOOP_COUNT_VALID(yCount));
1238 /* Convert the data count from the user's range (1-65536) into the machine range (0-65535). */
1239 CY_REG32_CLR_SET(descriptor->ySize, DMAC_CH_V2_DESCR_Y_SIZE_Y_COUNT, yCount - 1UL);
1240 }
1241
1242
1243 /*******************************************************************************
1244 * Function Name: Cy_DMAC_Descriptor_GetYloopDataCount
1245 ****************************************************************************//**
1246 *
1247 * Returns the number of X loops to execute in the Y loop of the specified
1248 * descriptor (for 2D descriptors only).
1249 *
1250 * \param descriptor
1251 * The descriptor structure instance.
1252 *
1253 * \return
1254 * The number of X loops to execute in the Y loop. The range is 1 ... 65536.
1255 *
1256 * \funcusage
1257 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1258 *
1259 *******************************************************************************/
Cy_DMAC_Descriptor_GetYloopDataCount(cy_stc_dmac_descriptor_t const * descriptor)1260 __STATIC_INLINE uint32_t Cy_DMAC_Descriptor_GetYloopDataCount(cy_stc_dmac_descriptor_t const * descriptor)
1261 {
1262 CY_ASSERT_L1(CY_DMAC_2D_TRANSFER == Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1263 /* Convert the data count from the machine range (0-65535) into the user's range (1-65536). */
1264 return (_FLD2VAL(DMAC_CH_V2_DESCR_Y_SIZE_Y_COUNT, descriptor->ySize) + 1UL);
1265 }
1266
1267
1268 /*******************************************************************************
1269 * Function Name: Cy_DMAC_Descriptor_SetYloopSrcIncrement
1270 ****************************************************************************//**
1271 *
1272 * Sets the source increment parameter for the Y loop for the specified
1273 * descriptor (for 2D descriptors only).
1274 *
1275 * \param descriptor
1276 * The descriptor structure instance.
1277 *
1278 * \param srcYincrement
1279 * The value of the source increment. The valid range is -32768 ... 32767.
1280 *
1281 * \funcusage
1282 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1283 *
1284 *******************************************************************************/
Cy_DMAC_Descriptor_SetYloopSrcIncrement(cy_stc_dmac_descriptor_t * descriptor,int32_t srcYincrement)1285 __STATIC_INLINE void Cy_DMAC_Descriptor_SetYloopSrcIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t srcYincrement)
1286 {
1287 CY_ASSERT_L1(CY_DMAC_2D_TRANSFER == Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1288 CY_ASSERT_L2(CY_DMAC_IS_LOOP_INCR_VALID(srcYincrement));
1289
1290 CY_REG32_CLR_SET(descriptor->yIncr, DMAC_CH_V2_DESCR_Y_INCR_SRC_Y, srcYincrement);
1291 }
1292
1293
1294 /*******************************************************************************
1295 * Function Name: Cy_DMAC_Descriptor_GetYloopSrcIncrement
1296 ****************************************************************************//**
1297 *
1298 * Returns the source increment parameter for the Y loop of the specified
1299 * descriptor (for 2D descriptors only).
1300 *
1301 * \param descriptor
1302 * The descriptor structure instance.
1303 *
1304 * \return
1305 * The value of source increment. The range is -32768 ... 32767.
1306 *
1307 * \funcusage
1308 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1309 *
1310 *******************************************************************************/
Cy_DMAC_Descriptor_GetYloopSrcIncrement(cy_stc_dmac_descriptor_t const * descriptor)1311 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetYloopSrcIncrement(cy_stc_dmac_descriptor_t const * descriptor)
1312 {
1313 CY_ASSERT_L1(CY_DMAC_2D_TRANSFER == Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1314
1315 return ((int32_t) _FLD2VAL(DMAC_CH_V2_DESCR_Y_INCR_SRC_Y, descriptor->yIncr));
1316 }
1317
1318
1319 /*******************************************************************************
1320 * Function Name: Cy_DMAC_Descriptor_SetYloopDstIncrement
1321 ****************************************************************************//**
1322 *
1323 * Sets the destination increment parameter for the Y loop of the specified
1324 * descriptor (for 2D descriptors only).
1325 *
1326 * \param descriptor
1327 * The descriptor structure instance.
1328 *
1329 * \param dstYincrement
1330 * The value of the destination increment. The valid range is -32768 ... 32767.
1331 *
1332 * \funcusage
1333 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1334 *
1335 *******************************************************************************/
Cy_DMAC_Descriptor_SetYloopDstIncrement(cy_stc_dmac_descriptor_t * descriptor,int32_t dstYincrement)1336 __STATIC_INLINE void Cy_DMAC_Descriptor_SetYloopDstIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t dstYincrement)
1337 {
1338 CY_ASSERT_L1(CY_DMAC_2D_TRANSFER == Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1339 CY_ASSERT_L2(CY_DMAC_IS_LOOP_INCR_VALID(dstYincrement));
1340
1341 CY_REG32_CLR_SET(descriptor->yIncr, DMAC_CH_V2_DESCR_Y_INCR_DST_Y, dstYincrement);
1342 }
1343
1344
1345 /*******************************************************************************
1346 * Function Name: Cy_DMAC_Descriptor_GetYloopDstIncrement
1347 ****************************************************************************//**
1348 *
1349 * Returns the destination increment parameter for the Y loop of the specified
1350 * descriptor (for 2D descriptors only).
1351 *
1352 * \param descriptor
1353 * The descriptor structure instance.
1354 *
1355 * \return
1356 * The value of the destination increment. The range is -32768 ... 32767.
1357 *
1358 * \funcusage
1359 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1360 *
1361 *******************************************************************************/
Cy_DMAC_Descriptor_GetYloopDstIncrement(cy_stc_dmac_descriptor_t const * descriptor)1362 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetYloopDstIncrement(cy_stc_dmac_descriptor_t const * descriptor)
1363 {
1364 CY_ASSERT_L1(CY_DMAC_2D_TRANSFER == Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1365
1366 return ((int32_t) _FLD2VAL(DMAC_CH_V2_DESCR_Y_INCR_DST_Y, descriptor->yIncr));
1367 }
1368
1369 /** \} group_dmac_descriptor_functions */
1370
1371
1372 /**
1373 * \addtogroup group_dmac_channel_functions
1374 * \{
1375 */
1376
1377
1378 /*******************************************************************************
1379 * Function Name: Cy_DMAC_Channel_SetDescriptor
1380 ****************************************************************************//**
1381 *
1382 * Sets a descriptor as current for the specified DMACchannel.
1383 *
1384 * \param base
1385 * The pointer to the hardware DMAC block.
1386 *
1387 * \param channel
1388 * The channel number.
1389 *
1390 * \param descriptor
1391 * This is the descriptor to be associated with the channel.
1392 * For CAT1C devices this pointer needs to point to 32 byte aligned structure.
1393 *
1394 * \funcusage
1395 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Enable
1396 *
1397 *******************************************************************************/
Cy_DMAC_Channel_SetDescriptor(DMAC_Type * base,uint32_t channel,cy_stc_dmac_descriptor_t const * descriptor)1398 __STATIC_INLINE void Cy_DMAC_Channel_SetDescriptor(DMAC_Type * base, uint32_t channel, cy_stc_dmac_descriptor_t const * descriptor)
1399 {
1400 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1401
1402 DMAC_CH_CURR(base, channel) = (uint32_t)descriptor;
1403 }
1404
1405
1406 /*******************************************************************************
1407 * Function Name: Cy_DMAC_Channel_Enable
1408 ****************************************************************************//**
1409 *
1410 * Enables a DMAC channel.
1411 *
1412 * \param base
1413 * The pointer to the hardware DMAC block.
1414 *
1415 * \param channel
1416 * The channel number.
1417 *
1418 * \funcusage
1419 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Enable
1420 *
1421 *******************************************************************************/
Cy_DMAC_Channel_Enable(DMAC_Type * base,uint32_t channel)1422 __STATIC_INLINE void Cy_DMAC_Channel_Enable(DMAC_Type * base, uint32_t channel)
1423 {
1424 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1425
1426 DMAC_CH_CTL(base, channel) |= DMAC_CH_V2_CTL_ENABLED_Msk;
1427 }
1428
1429
1430 /*******************************************************************************
1431 * Function Name: Cy_DMAC_Channel_Disable
1432 ****************************************************************************//**
1433 *
1434 * Disables a DMACchannel.
1435 *
1436 * \param base
1437 * The pointer to the hardware DMAC block.
1438 *
1439 * \param channel
1440 * The channel number.
1441 *
1442 * \funcusage
1443 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Disable
1444 *
1445 *******************************************************************************/
Cy_DMAC_Channel_Disable(DMAC_Type * base,uint32_t channel)1446 __STATIC_INLINE void Cy_DMAC_Channel_Disable(DMAC_Type * base, uint32_t channel)
1447 {
1448 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1449
1450 DMAC_CH_CTL(base, channel) &= (uint32_t) ~DMAC_CH_V2_CTL_ENABLED_Msk;
1451 }
1452
1453
1454 /*******************************************************************************
1455 * Function Name: Cy_DMAC_Channel_SetPriority
1456 ****************************************************************************//**
1457 *
1458 * The function is used to set a priority for the DMAC channel.
1459 *
1460 * \param base
1461 * The pointer to the hardware DMAC block.
1462 *
1463 * \param channel
1464 * The channel number.
1465 *
1466 * \param priority
1467 * The priority to be set for the DMAC channel. The allowed values are 0,1,2,3.
1468 *
1469 * \funcusage
1470 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Enable
1471 *
1472 *******************************************************************************/
Cy_DMAC_Channel_SetPriority(DMAC_Type * base,uint32_t channel,uint32_t priority)1473 __STATIC_INLINE void Cy_DMAC_Channel_SetPriority(DMAC_Type * base, uint32_t channel, uint32_t priority)
1474 {
1475 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1476 CY_ASSERT_L2(CY_DMAC_IS_PRIORITY_VALID(priority));
1477
1478 CY_REG32_CLR_SET(DMAC_CH_CTL(base, channel), DMAC_CH_V2_CTL_PRIO, priority);
1479 }
1480
1481
1482 /*******************************************************************************
1483 * Function Name: Cy_DMAC_Channel_GetPriority
1484 ****************************************************************************//**
1485 *
1486 * Returns the priority of the DMAC channel.
1487 *
1488 * \param base
1489 * The pointer to the hardware DMAC block.
1490 *
1491 * \param channel
1492 * The channel number.
1493 *
1494 * \return
1495 * The priority of the channel.
1496 *
1497 * \funcusage
1498 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Disable
1499 *
1500 *******************************************************************************/
Cy_DMAC_Channel_GetPriority(DMAC_Type const * base,uint32_t channel)1501 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetPriority(DMAC_Type const * base, uint32_t channel)
1502 {
1503 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1504
1505 return ((uint32_t) _FLD2VAL(DMAC_CH_V2_CTL_PRIO, DMAC_CH_CTL(base, channel)));
1506 }
1507
1508
1509 /*******************************************************************************
1510 * Function Name: Cy_DMAC_Channel_GetCurrentSrcAddress
1511 ****************************************************************************//**
1512 *
1513 * Returns the source address being used for the current transfer.
1514 *
1515 * \param base
1516 * The pointer to the hardware DMAC block.
1517 *
1518 * \param channel
1519 * The channel number.
1520 *
1521 * \return
1522 * Returns the pointer to the source of transfer.
1523 *
1524 * \funcusage
1525 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Channel_GetCurrentSrcAddress
1526 *
1527 *******************************************************************************/
Cy_DMAC_Channel_GetCurrentSrcAddress(DMAC_Type const * base,uint32_t channel)1528 __STATIC_INLINE void * Cy_DMAC_Channel_GetCurrentSrcAddress(DMAC_Type const * base, uint32_t channel)
1529 {
1530 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1531
1532 return ((void *)(DMAC_CH_DESCR_SRC(base, channel)));
1533 }
1534
1535
1536 /*******************************************************************************
1537 * Function Name: Cy_DMAC_Channel_GetCurrentDstAddress
1538 ****************************************************************************//**
1539 *
1540 * Returns the destination address being used for the current transfer.
1541 *
1542 * \param base
1543 * The pointer to the hardware DMAC block.
1544 *
1545 * \param channel
1546 * The channel number.
1547 *
1548 * \return
1549 * Returns the pointer to the destination of transfer.
1550 *
1551 * \funcusage
1552 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Channel_GetCurrentSrcAddress
1553 *
1554 *******************************************************************************/
Cy_DMAC_Channel_GetCurrentDstAddress(DMAC_Type const * base,uint32_t channel)1555 __STATIC_INLINE void * Cy_DMAC_Channel_GetCurrentDstAddress(DMAC_Type const * base, uint32_t channel)
1556 {
1557 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1558
1559 return ((void *)(DMAC_CH_DESCR_DST(base, channel)));
1560 }
1561
1562
1563 /*******************************************************************************
1564 * Function Name: Cy_DMAC_Channel_GetCurrentXloopIndex
1565 ****************************************************************************//**
1566 *
1567 * Returns the current transfer X-loop index.
1568 *
1569 * \param base
1570 * The pointer to the hardware DMAC block.
1571 *
1572 * \param channel
1573 * The channel number.
1574 *
1575 * \return
1576 * Returns the current transfer X-loop index.
1577 *
1578 * \funcusage
1579 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Channel_GetCurrentloopIndex
1580 *
1581 *******************************************************************************/
Cy_DMAC_Channel_GetCurrentXloopIndex(DMAC_Type const * base,uint32_t channel)1582 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetCurrentXloopIndex(DMAC_Type const * base, uint32_t channel)
1583 {
1584 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1585
1586 return (_FLD2VAL(DMAC_CH_V2_IDX_X, DMAC_CH_IDX(base, channel)));
1587 }
1588
1589
1590 /*******************************************************************************
1591 * Function Name: Cy_DMAC_Channel_GetCurrentYloopIndex
1592 ****************************************************************************//**
1593 *
1594 * Returns the current transfer X-loop index.
1595 *
1596 * \param base
1597 * The pointer to the hardware DMAC block.
1598 *
1599 * \param channel
1600 * The channel number.
1601 *
1602 * \return
1603 * Returns the current transfer X-loop index.
1604 *
1605 * \funcusage
1606 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Channel_GetCurrentloopIndex
1607 *
1608 *******************************************************************************/
Cy_DMAC_Channel_GetCurrentYloopIndex(DMAC_Type const * base,uint32_t channel)1609 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetCurrentYloopIndex(DMAC_Type const * base, uint32_t channel)
1610 {
1611 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1612
1613 return (_FLD2VAL(DMAC_CH_V2_IDX_Y, DMAC_CH_IDX(base, channel)));
1614 }
1615
1616
1617 /*******************************************************************************
1618 * Function Name: Cy_DMAC_Channel_GetCurrentDescriptor
1619 ****************************************************************************//**
1620 *
1621 * Returns the descriptor that is active in the channel.
1622 *
1623 * \param base
1624 * The pointer to the hardware DMAC block.
1625 *
1626 * \param channel
1627 * The channel number.
1628 *
1629 * \return
1630 * The pointer to the descriptor associated with the channel.
1631 *
1632 * \funcusage
1633 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_Deinit
1634 *
1635 *******************************************************************************/
Cy_DMAC_Channel_GetCurrentDescriptor(DMAC_Type const * base,uint32_t channel)1636 __STATIC_INLINE cy_stc_dmac_descriptor_t * Cy_DMAC_Channel_GetCurrentDescriptor(DMAC_Type const * base, uint32_t channel)
1637 {
1638 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1639
1640 return ((cy_stc_dmac_descriptor_t*)(DMAC_CH_CURR(base, channel)));
1641 }
1642
1643
1644 /*******************************************************************************
1645 * Function Name: Cy_DMAC_Channel_GetInterruptStatus
1646 ****************************************************************************//**
1647 *
1648 * Returns the interrupt status of the specified channel.
1649 *
1650 * \param base
1651 * The pointer to the hardware DMAC block.
1652 *
1653 * \param channel
1654 * The channel number.
1655 *
1656 * \return
1657 * The interrupt status, see \ref group_dmac_macros_interrupt_masks.
1658 *
1659 * \funcusage
1660 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_GetInterruptStatus
1661 *
1662 *******************************************************************************/
Cy_DMAC_Channel_GetInterruptStatus(DMAC_Type const * base,uint32_t channel)1663 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetInterruptStatus(DMAC_Type const * base, uint32_t channel)
1664 {
1665 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1666
1667 return (DMAC_CH_INTR(base, channel));
1668 }
1669
1670
1671 /*******************************************************************************
1672 * Function Name: Cy_DMAC_Channel_ClearInterrupt
1673 ****************************************************************************//**
1674 *
1675 * Clears the interrupt status of the specified channel.
1676 *
1677 * \param base
1678 * The pointer to the hardware DMAC block.
1679 *
1680 * \param channel
1681 * The channel number.
1682 *
1683 * \param interrupt
1684 * The interrupt mask, see \ref group_dmac_macros_interrupt_masks.
1685 *
1686 * \funcusage
1687 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_ClearInterrupt
1688 *
1689 *******************************************************************************/
Cy_DMAC_Channel_ClearInterrupt(DMAC_Type * base,uint32_t channel,uint32_t interrupt)1690 __STATIC_INLINE void Cy_DMAC_Channel_ClearInterrupt(DMAC_Type * base, uint32_t channel, uint32_t interrupt)
1691 {
1692 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1693 CY_ASSERT_L2(CY_DMAC_IS_INTR_MASK_VALID(interrupt));
1694
1695 DMAC_CH_INTR(base, channel) = interrupt;
1696 /* This dummy reading is necessary here. It provides a guarantee that interrupt is cleared at returning from this function. */
1697 (void) DMAC_CH_INTR(base, channel);
1698 }
1699
1700
1701 /*******************************************************************************
1702 * Function Name: Cy_DMAC_Channel_SetInterrupt
1703 ****************************************************************************//**
1704 *
1705 * Sets the interrupt for the specified channel.
1706 *
1707 * \param base
1708 * The pointer to the hardware DMAC block.
1709 *
1710 * \param channel
1711 * The channel number.
1712 *
1713 * \param interrupt
1714 * The interrupt mask. See \ref group_dmac_macros_interrupt_masks.
1715 *
1716 * \funcusage
1717 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_SetInterruptMask
1718 *
1719 *******************************************************************************/
Cy_DMAC_Channel_SetInterrupt(DMAC_Type * base,uint32_t channel,uint32_t interrupt)1720 __STATIC_INLINE void Cy_DMAC_Channel_SetInterrupt(DMAC_Type * base, uint32_t channel, uint32_t interrupt)
1721 {
1722 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1723 CY_ASSERT_L2(CY_DMAC_IS_INTR_MASK_VALID(interrupt));
1724
1725 DMAC_CH_INTR_SET(base, channel) = interrupt;
1726 }
1727
1728
1729 /*******************************************************************************
1730 * Function Name: Cy_DMAC_Channel_GetInterruptMask
1731 ****************************************************************************//**
1732 *
1733 * Returns the interrupt mask value of the specified channel.
1734 *
1735 * \param base
1736 * The pointer to the hardware DMAC block.
1737 *
1738 * \param channel
1739 * The channel number.
1740 *
1741 * \return
1742 * The interrupt mask value. See \ref group_dmac_macros_interrupt_masks.
1743 *
1744 * \funcusage
1745 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_SetInterruptMask
1746 *
1747 *******************************************************************************/
Cy_DMAC_Channel_GetInterruptMask(DMAC_Type const * base,uint32_t channel)1748 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetInterruptMask(DMAC_Type const * base, uint32_t channel)
1749 {
1750 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1751
1752 return (DMAC_CH_INTR_MASK(base, channel));
1753 }
1754
1755
1756 /*******************************************************************************
1757 * Function Name: Cy_DMAC_Channel_SetInterruptMask
1758 ****************************************************************************//**
1759 *
1760 * Sets an interrupt mask value for the specified channel.
1761 *
1762 * \param base
1763 * The pointer to the hardware DMAC block.
1764 *
1765 * \param channel
1766 * The channel number.
1767 *
1768 * \param interrupt
1769 * The interrupt mask, see \ref group_dmac_macros_interrupt_masks.
1770 *
1771 * \funcusage
1772 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_SetInterruptMask
1773 *
1774 *******************************************************************************/
Cy_DMAC_Channel_SetInterruptMask(DMAC_Type * base,uint32_t channel,uint32_t interrupt)1775 __STATIC_INLINE void Cy_DMAC_Channel_SetInterruptMask(DMAC_Type * base, uint32_t channel, uint32_t interrupt)
1776 {
1777 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1778 CY_ASSERT_L2(CY_DMAC_IS_INTR_MASK_VALID(interrupt));
1779 DMAC_CH_INTR_MASK(base, channel) = interrupt;
1780 }
1781
1782
1783 /*******************************************************************************
1784 * Function Name: Cy_DMAC_Channel_GetInterruptStatusMasked
1785 ****************************************************************************//**
1786 *
1787 * Returns the logical AND of the corresponding INTR and INTR_MASK fields
1788 * in a single-load operation.
1789 *
1790 * \param base
1791 * The pointer to the hardware DMAC block.
1792 *
1793 * \param channel
1794 * The channel number.
1795 *
1796 * \return
1797 * The masked interrupt status. See \ref group_dmac_macros_interrupt_masks.
1798 *
1799 * \funcusage
1800 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_ClearInterrupt
1801 *
1802 *******************************************************************************/
Cy_DMAC_Channel_GetInterruptStatusMasked(DMAC_Type const * base,uint32_t channel)1803 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetInterruptStatusMasked(DMAC_Type const * base, uint32_t channel)
1804 {
1805 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1806
1807 return (DMAC_CH_INTR_MASKED(base, channel));
1808 }
1809
1810 /** \} group_dmac_channel_functions */
1811
1812 /** \} group_dmac_functions */
1813
1814 CY_MISRA_BLOCK_END('MISRA C-2012 Rule 10.8')
1815
1816 #if defined(__cplusplus)
1817 }
1818 #endif
1819
1820 #endif /* CY_IP_M4CPUSS_DMAC, CY_IP_MXAHBDMAC */
1821
1822 #endif /* !defined (CY_DMAC_H) */
1823
1824 /** \} group_dmac */
1825
1826
1827 /* [] END OF FILE */
1828
