1 /***************************************************************************//**
2 * \file cy_crypto_core_hw_v2.h
3 * \version 2.90
4 *
5 * \brief
6 * This file provides constants and function prototypes
7 * for the Vector Unit functions in the Crypto block driver.
8 *
9 ********************************************************************************
10 * \copyright
11 * Copyright (c) (2020-2022), Cypress Semiconductor Corporation (an Infineon company) or
12 * an affiliate of Cypress Semiconductor Corporation.
13 * SPDX-License-Identifier: Apache-2.0
14 *
15 * Licensed under the Apache License, Version 2.0 (the "License");
16 * you may not use this file except in compliance with the License.
17 * You may obtain a copy of the License at
18 *
19 * http://www.apache.org/licenses/LICENSE-2.0
20 *
21 * Unless required by applicable law or agreed to in writing, software
22 * distributed under the License is distributed on an "AS IS" BASIS,
23 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
24 * See the License for the specific language governing permissions and
25 * limitations under the License.
26 *******************************************************************************/
27
28
29 #if !defined (CY_CRYPTO_CORE_HW_V2_H)
30 #define CY_CRYPTO_CORE_HW_V2_H
31
32 #include "cy_crypto_core_hw.h"
33
34 #if defined(CY_IP_MXCRYPTO) && defined(CY_CRYPTO_CFG_HW_V2_ENABLE)
35
36 #if defined(__cplusplus)
37 extern "C" {
38 #endif
39
40 CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 11.3', 3, \
41 'CRYPTO_Type will typecast to either CRYPTO_V1_Type or CRYPTO_V2_Type but not both on PDL initialization based on the target device at compile time.')
42
43 /*
44 Register buffer block identifiers:
45 "0": block0[127:0] = reg_buff[0*128+127:0*128]
46 "1": block1[127:0] = reg_buff[1*128+127:1*128]
47 "2": block2[127:0] = reg_buff[2*128+127:2*128]
48 "3": block3[127:0] = reg_buff[3*128+127:3*128]
49 "4": block4[127:0] = reg_buff[4*128+127:4*128]
50 "5": block5[127:0] = reg_buff[5*128+127:5*128]
51 "6": block6[127:0] = reg_buff[6*128+127:6*128]
52 "7": block7[127:0] = reg_buff[7*128+127:7*128]
53 "8": load FIFO 0
54 "9": load FIFO 1
55 "12": store FIFO
56 */
57
58 #define CY_CRYPTO_V2_RB_BLOCK0 (0u)
59 #define CY_CRYPTO_V2_RB_BLOCK1 (1u)
60 #define CY_CRYPTO_V2_RB_BLOCK2 (2u)
61 #define CY_CRYPTO_V2_RB_BLOCK3 (3u)
62 #define CY_CRYPTO_V2_RB_BLOCK4 (4u)
63 #define CY_CRYPTO_V2_RB_BLOCK5 (5u)
64 #define CY_CRYPTO_V2_RB_BLOCK6 (6u)
65 #define CY_CRYPTO_V2_RB_BLOCK7 (7u)
66
67 #define CY_CRYPTO_V2_RB_FF_LOAD0 (8u)
68 #define CY_CRYPTO_V2_RB_FF_LOAD1 (9u)
69 #define CY_CRYPTO_V2_RB_FF_STORE (12u)
70
71 #define CY_CRYPTO_V2_RB_KEY0 (CY_CRYPTO_V2_RB_BLOCK4)
72 #define CY_CRYPTO_V2_RB_KEY1 (CY_CRYPTO_V2_RB_BLOCK5)
73 #define CY_CRYPTO_V2_RB_KEY2 (CY_CRYPTO_V2_RB_BLOCK6)
74 #define CY_CRYPTO_V2_RB_KEY3 (CY_CRYPTO_V2_RB_BLOCK7)
75
76 #define CY_CRYPTO_V2_FF_START_OPC (0x70u)
77 #define CY_CRYPTO_V2_FF_CONTINUE_OPC (0x71u)
78 #define CY_CRYPTO_V2_FF_STOP_OPC (0x72u)
79
80 #define CY_CRYPTO_V2_RB_CLEAR_OPC (0x64u)
81 #define CY_CRYPTO_V2_RB_SWAP_OPC (0x65u)
82 #define CY_CRYPTO_V2_RB_XOR_OPC (0x66u)
83 #define CY_CRYPTO_V2_RB_STORE_OPC (0x67u)
84 #define CY_CRYPTO_V2_RB_BYTE_SET_OPC (0x68u)
85
86 #define CY_CRYPTO_V2_BLOCK_MOV_OPC (0x40u)
87 #define CY_CRYPTO_V2_BLOCK_XOR_OPC (0x41u)
88 #define CY_CRYPTO_V2_BLOCK_SET_OPC (0x42u)
89 #define CY_CRYPTO_V2_BLOCK_CMP_OPC (0x43u)
90
91 #define CY_CRYPTO_V2_BLOCK_GCM_OPC (0x57u)
92
93 #define CY_CRYPTO_V2_AES_OPC (0x50u)
94 #define CY_CRYPTO_V2_AES_INV_OPC (0x51u)
95
96 #define CY_CRYPTO_V2_CHACHA_OPC (0x56u)
97
98 #define CY_CRYPTO_V2_SHA1_OPC (0x69u)
99 #define CY_CRYPTO_V2_SHA2_256_OPC (0x6au)
100 #define CY_CRYPTO_V2_SHA2_512_OPC (0x6bu)
101 #define CY_CRYPTO_V2_SHA3_OPC (0x6cu)
102
103 #define CY_CRYPTO_V2_CRC_OPC (0x58u)
104
105 #define CY_CRYPTO_V2_DES_OPC (0x52u)
106 #define CY_CRYPTO_V2_DES_INV_OPC (0x53u)
107 #define CY_CRYPTO_V2_TDES_OPC (0x54u)
108 #define CY_CRYPTO_V2_TDES_INV_OPC (0x55u)
109
110 #define CY_CRYPTO_V2_SYNC_OPC (0x7fu)
111
112 #define CY_CRYPTO_MERGE_BYTES(a, b, c, d) (uint32_t)( \
113 (((uint32_t)((uint32_t)(a) & 0xffu)) << 24u) | \
114 (((uint32_t)((uint32_t)(b) & 0xffu)) << 16u) | \
115 (((uint32_t)((uint32_t)(c) & 0xffu)) << 8u) | \
116 (((uint32_t)((uint32_t)(d) & 0xffu))) )
117
118 #define CY_CRYPTO_SEL_BYTE3(a) (((a) >> 24u) & 0xffu)
119 #define CY_CRYPTO_SEL_BYTE2(a) (((a) >> 16u) & 0xffu)
120 #define CY_CRYPTO_SEL_BYTE1(a) (((a) >> 8u) & 0xffu)
121 #define CY_CRYPTO_SEL_BYTE0(a) (((a) >> 0u) & 0xffu)
122
Cy_Crypto_Core_V2_FFLoad0Sync(CRYPTO_Type * base)123 __STATIC_INLINE void Cy_Crypto_Core_V2_FFLoad0Sync(CRYPTO_Type *base)
124 {
125 /* Wait until the FIFO_LOAD0 operations is complete */
126 while (0uL != _FLD2VAL(CRYPTO_V2_LOAD0_FF_STATUS_BUSY, REG_CRYPTO_LOAD0_FF_STATUS(base)))
127 {
128 }
129 }
130
Cy_Crypto_Core_V2_FFLoad1Sync(CRYPTO_Type * base)131 __STATIC_INLINE void Cy_Crypto_Core_V2_FFLoad1Sync(CRYPTO_Type *base)
132 {
133 /* Wait until the FIFO_LOAD1 operations is complete */
134 while (0uL != _FLD2VAL(CRYPTO_V2_LOAD1_FF_STATUS_BUSY, REG_CRYPTO_LOAD1_FF_STATUS(base)))
135 {
136 }
137 }
138
Cy_Crypto_Core_V2_FFStoreSync(CRYPTO_Type * base)139 __STATIC_INLINE void Cy_Crypto_Core_V2_FFStoreSync(CRYPTO_Type *base)
140 {
141 /* Wait until the FIFO_STORE operations is complete */
142 while (0uL != _FLD2VAL(CRYPTO_V2_STORE_FF_STATUS_BUSY, REG_CRYPTO_STORE_FF_STATUS(base)))
143 {
144 }
145 }
146
Cy_Crypto_Core_V2_Sync(CRYPTO_Type * base)147 __STATIC_INLINE void Cy_Crypto_Core_V2_Sync(CRYPTO_Type *base)
148 {
149 /* Wait until the instruction is complete */
150 while (0uL != (REG_CRYPTO_STATUS(base)))
151 {
152 }
153 }
154
Cy_Crypto_Core_V2_FFStart(CRYPTO_Type * base,uint32_t ff_idx,const uint8_t * p_mem,uint32_t size)155 __STATIC_INLINE void Cy_Crypto_Core_V2_FFStart(CRYPTO_Type *base,
156 uint32_t ff_idx, const uint8_t* p_mem, uint32_t size)
157 {
158 /* Check whether FIFO has enough space for 1 instruction */
159 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 3u))
160 {
161 }
162
163 REG_CRYPTO_INSTR_FF_WR(base) = ((uint32_t)CY_CRYPTO_V2_FF_START_OPC << CY_CRYPTO_OPCODE_POS) |
164 (ff_idx << CY_CRYPTO_RSRC0_SHIFT);
165 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t) p_mem;
166 REG_CRYPTO_INSTR_FF_WR(base) = size;
167 }
168
Cy_Crypto_Core_V2_FFContinue(CRYPTO_Type * base,uint32_t ff_idx,const uint8_t * p_mem,uint32_t size)169 __STATIC_INLINE void Cy_Crypto_Core_V2_FFContinue(CRYPTO_Type *base,
170 uint32_t ff_idx, const uint8_t* p_mem, uint32_t size)
171 {
172 /* Check whether FIFO has enough space for 1 instruction */
173 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 3u))
174 {
175 }
176
177 /* Wait for previous loading has been completed. */
178 (CY_CRYPTO_V2_RB_FF_LOAD0 == ff_idx) ? Cy_Crypto_Core_V2_FFLoad0Sync(base) : Cy_Crypto_Core_V2_FFLoad1Sync(base);
179
180 REG_CRYPTO_INSTR_FF_WR(base) = ((uint32_t)CY_CRYPTO_V2_FF_CONTINUE_OPC << CY_CRYPTO_OPCODE_POS) |
181 (ff_idx << CY_CRYPTO_RSRC0_SHIFT);
182 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t) p_mem;
183 REG_CRYPTO_INSTR_FF_WR(base) = size;
184 }
185
Cy_Crypto_Core_V2_FFStop(CRYPTO_Type * base,uint32_t ff_idx)186 __STATIC_INLINE void Cy_Crypto_Core_V2_FFStop(CRYPTO_Type *base, uint32_t ff_idx)
187 {
188 /* Check whether FIFO has enough space for 1 instruction */
189 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
190 {
191 }
192
193 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)(((uint32_t)CY_CRYPTO_V2_FF_STOP_OPC << CY_CRYPTO_OPCODE_POS) |
194 (ff_idx << CY_CRYPTO_RSRC0_SHIFT));
195 }
196
Cy_Crypto_Core_V2_BlockMov(CRYPTO_Type * base,uint32_t dst_idx,uint32_t src_idx,uint32_t size)197 __STATIC_INLINE void Cy_Crypto_Core_V2_BlockMov(CRYPTO_Type *base,
198 uint32_t dst_idx, uint32_t src_idx, uint32_t size)
199 {
200 /* Check whether FIFO has enough space for 1 instruction */
201 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
202 {
203 }
204
205 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)(((uint32_t)CY_CRYPTO_V2_BLOCK_MOV_OPC << CY_CRYPTO_OPCODE_POS)
206 | (size << CY_CRYPTO_RSRC16_SHIFT)
207 | (dst_idx << CY_CRYPTO_RSRC12_SHIFT)
208 | (src_idx << CY_CRYPTO_RSRC0_SHIFT));
209 }
210
Cy_Crypto_Core_V2_BlockMov_Reflect(CRYPTO_Type * base,uint32_t dst_idx,uint32_t src_idx,uint32_t size)211 __STATIC_INLINE void Cy_Crypto_Core_V2_BlockMov_Reflect(CRYPTO_Type *base,
212 uint32_t dst_idx, uint32_t src_idx, uint32_t size)
213 {
214 /* Check whether FIFO has enough space for 1 instruction */
215 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
216 {
217 }
218
219 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)(((uint32_t)CY_CRYPTO_V2_BLOCK_MOV_OPC << CY_CRYPTO_OPCODE_POS)
220 | (1UL << CY_CRYPTO_RSRC23_SHIFT)
221 | (size << CY_CRYPTO_RSRC16_SHIFT)
222 | (dst_idx << CY_CRYPTO_RSRC12_SHIFT)
223 | (src_idx << CY_CRYPTO_RSRC0_SHIFT));
224 }
225
Cy_Crypto_Core_V2_BlockSet(CRYPTO_Type * base,uint32_t dst_idx,uint8_t data,uint32_t size)226 __STATIC_INLINE void Cy_Crypto_Core_V2_BlockSet(CRYPTO_Type *base,
227 uint32_t dst_idx, uint8_t data, uint32_t size)
228 {
229 /* Check whether FIFO has enough space for 1 instruction */
230 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
231 {
232 }
233
234 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)(((uint32_t)CY_CRYPTO_V2_BLOCK_SET_OPC << CY_CRYPTO_OPCODE_POS)
235 | (size << CY_CRYPTO_RSRC16_SHIFT)
236 | (dst_idx << CY_CRYPTO_RSRC12_SHIFT)
237 | ((uint32_t)(data) << CY_CRYPTO_RSRC0_SHIFT));
238 }
239
Cy_Crypto_Core_V2_BlockCmp(CRYPTO_Type * base,uint32_t src0_idx,uint32_t src1_idx,uint32_t size)240 __STATIC_INLINE void Cy_Crypto_Core_V2_BlockCmp(CRYPTO_Type *base,
241 uint32_t src0_idx, uint32_t src1_idx, uint32_t size)
242 {
243 /* Check whether FIFO has enough space for 1 instruction */
244 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
245 {
246 }
247
248 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)(((uint32_t)CY_CRYPTO_V2_BLOCK_CMP_OPC << CY_CRYPTO_OPCODE_POS)
249 | (size << CY_CRYPTO_RSRC16_SHIFT)
250 | (src1_idx << CY_CRYPTO_RSRC4_SHIFT)
251 | (src0_idx << CY_CRYPTO_RSRC0_SHIFT));
252 }
253
Cy_Crypto_Core_V2_BlockXor(CRYPTO_Type * base,uint32_t dst_idx,uint32_t src0_idx,uint32_t src1_idx,uint32_t size)254 __STATIC_INLINE void Cy_Crypto_Core_V2_BlockXor(CRYPTO_Type *base,
255 uint32_t dst_idx, uint32_t src0_idx, uint32_t src1_idx, uint32_t size)
256 {
257 /* Check whether FIFO has enough space for 1 instruction */
258 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
259 {
260 }
261
262 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)(((uint32_t)CY_CRYPTO_V2_BLOCK_XOR_OPC << CY_CRYPTO_OPCODE_POS)
263 | (size << CY_CRYPTO_RSRC16_SHIFT)
264 | (dst_idx << CY_CRYPTO_RSRC12_SHIFT)
265 | (src1_idx << CY_CRYPTO_RSRC4_SHIFT)
266 | (src0_idx << CY_CRYPTO_RSRC0_SHIFT));
267 }
268
Cy_Crypto_Core_V2_BlockGcm(CRYPTO_Type * base)269 __STATIC_INLINE void Cy_Crypto_Core_V2_BlockGcm(CRYPTO_Type *base)
270 {
271 /* Check whether FIFO has enough space for 1 instruction */
272 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
273 {
274 }
275
276 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)((uint32_t)CY_CRYPTO_V2_BLOCK_GCM_OPC << CY_CRYPTO_OPCODE_POS);
277 }
278
Cy_Crypto_Core_V2_Run(CRYPTO_Type * base,uint32_t opc)279 __STATIC_INLINE void Cy_Crypto_Core_V2_Run(CRYPTO_Type *base, uint32_t opc)
280 {
281 /* Check whether FIFO has enough space for 1 instruction */
282 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
283 {
284 }
285
286 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)((opc & 0xFFUL) << CY_CRYPTO_OPCODE_POS);
287 }
288
Cy_Crypto_Core_V2_RBClear(CRYPTO_Type * base)289 __STATIC_INLINE void Cy_Crypto_Core_V2_RBClear(CRYPTO_Type *base)
290 {
291 /* Check whether FIFO has enough space for 1 instruction */
292 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
293 {
294 }
295
296 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)((uint32_t)CY_CRYPTO_V2_RB_CLEAR_OPC << CY_CRYPTO_OPCODE_POS);
297 }
298
Cy_Crypto_Core_V2_RBSwap(CRYPTO_Type * base)299 __STATIC_INLINE void Cy_Crypto_Core_V2_RBSwap(CRYPTO_Type *base)
300 {
301 /* Check whether FIFO has enough space for 1 instruction */
302 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
303 {
304 }
305
306 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)((uint32_t)CY_CRYPTO_V2_RB_SWAP_OPC << CY_CRYPTO_OPCODE_POS);
307 }
308
Cy_Crypto_Core_V2_RBXor(CRYPTO_Type * base,uint32_t offset,uint32_t size)309 __STATIC_INLINE void Cy_Crypto_Core_V2_RBXor(CRYPTO_Type *base, uint32_t offset, uint32_t size)
310 {
311 /* Check whether FIFO has enough space for 1 instruction */
312 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
313 {
314 }
315
316 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)(((uint32_t)CY_CRYPTO_V2_RB_XOR_OPC << CY_CRYPTO_OPCODE_POS) |
317 (offset << CY_CRYPTO_RSRC8_SHIFT) |
318 (size << CY_CRYPTO_RSRC0_SHIFT));
319 }
320
Cy_Crypto_Core_V2_RBStore(CRYPTO_Type * base,uint32_t offset,uint32_t size)321 __STATIC_INLINE void Cy_Crypto_Core_V2_RBStore(CRYPTO_Type *base, uint32_t offset, uint32_t size)
322 {
323 /* Check whether FIFO has enough space for 1 instruction */
324 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
325 {
326 }
327
328 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)(((uint32_t)CY_CRYPTO_V2_RB_STORE_OPC << CY_CRYPTO_OPCODE_POS) |
329 (offset << CY_CRYPTO_RSRC8_SHIFT) |
330 (size << CY_CRYPTO_RSRC0_SHIFT));}
331
Cy_Crypto_Core_V2_RBSetByte(CRYPTO_Type * base,uint32_t offset,uint8_t byte)332 __STATIC_INLINE void Cy_Crypto_Core_V2_RBSetByte(CRYPTO_Type *base, uint32_t offset, uint8_t byte)
333 {
334 /* Check whether FIFO has enough space for 1 instruction */
335 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
336 {
337 }
338
339 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)(((uint32_t)CY_CRYPTO_V2_RB_BYTE_SET_OPC << CY_CRYPTO_OPCODE_POS) |
340 (offset << CY_CRYPTO_RSRC8_SHIFT) |
341 ((uint32_t)(byte) << CY_CRYPTO_RSRC0_SHIFT));
342 }
343
Cy_Crypto_Core_V2_RunAes(CRYPTO_Type * base)344 __STATIC_INLINE void Cy_Crypto_Core_V2_RunAes(CRYPTO_Type *base)
345 {
346 /* Check whether FIFO has enough space for 1 instruction */
347 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
348 {
349 }
350
351 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)((uint32_t)CY_CRYPTO_V2_AES_OPC << CY_CRYPTO_OPCODE_POS);
352 }
353
Cy_Crypto_Core_V2_RunAesInv(CRYPTO_Type * base)354 __STATIC_INLINE void Cy_Crypto_Core_V2_RunAesInv(CRYPTO_Type *base)
355 {
356 /* Check whether FIFO has enough space for 1 instruction */
357 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
358 {
359 }
360
361 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)((uint32_t)CY_CRYPTO_V2_AES_INV_OPC << CY_CRYPTO_OPCODE_POS);
362 }
363
Cy_Crypto_Core_V2_RunChacha(CRYPTO_Type * base,uint8_t roundNum)364 __STATIC_INLINE void Cy_Crypto_Core_V2_RunChacha(CRYPTO_Type *base, uint8_t roundNum)
365 {
366 /* Check whether FIFO has enough space for 1 instruction */
367 while(Cy_Crypto_Core_GetFIFOUsed(base) >= (CY_CRYPTO_INSTR_FIFODEPTH - 1u))
368 {
369 }
370
371 REG_CRYPTO_INSTR_FF_WR(base) = (uint32_t)(((uint32_t)CY_CRYPTO_V2_CHACHA_OPC << CY_CRYPTO_OPCODE_POS) |
372 ((uint32_t)(roundNum) << CY_CRYPTO_RSRC0_SHIFT));
373 }
374
375 CY_MISRA_BLOCK_END('MISRA C-2012 Rule 11.3')
376
377 #if defined(__cplusplus)
378 }
379 #endif
380
381 #endif /* defined(CY_IP_MXCRYPTO) && defined(CY_CRYPTO_CFG_HW_V2_ENABLE) */
382
383 #endif /* #if !defined (CY_CRYPTO_CORE_HW_V2_H) */
384
385
386 /* [] END OF FILE */
387
