1 /*
2  * Copyright 2021-2024 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef SPI_IP_TYPES_H
8 #define SPI_IP_TYPES_H
9 
10 /**
11 *   @file    Spi_Ip_Types.h
12 *
13 *   @brief   SPI IP driver types header file.
14 *   @details SPI IP driver types header file.
15 
16 *   @addtogroup SPI_IP_DRIVER Spi Ip Driver
17 *   @{
18 */
19 
20 #ifdef __cplusplus
21 extern "C"{
22 #endif
23 
24 
25 /*==================================================================================================
26 *                                        INCLUDE FILES
27 * 1) system and project includes
28 * 2) needed interfaces from external units
29 * 3) internal and external interfaces from this unit
30 ==================================================================================================*/
31 #include "Std_Types.h"
32 #include "Spi_Ip_Cfg.h"
33 
34 /*==================================================================================================
35 *                                 SOURCE FILE VERSION INFORMATION
36 ==================================================================================================*/
37 #define SPI_IP_TYPES_VENDOR_ID                    43
38 #define SPI_IP_TYPES_AR_RELEASE_MAJOR_VERSION     4
39 #define SPI_IP_TYPES_AR_RELEASE_MINOR_VERSION     7
40 #define SPI_IP_TYPES_AR_RELEASE_REVISION_VERSION  0
41 #define SPI_IP_TYPES_SW_MAJOR_VERSION             2
42 #define SPI_IP_TYPES_SW_MINOR_VERSION             0
43 #define SPI_IP_TYPES_SW_PATCH_VERSION             0
44 
45 /*==================================================================================================
46 *                                       FILE VERSION CHECKS
47 ==================================================================================================*/
48 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
49     /* Check if current file and StandardTypes header file are of the same Autosar version */
50     #if ((SPI_IP_TYPES_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \
51          (SPI_IP_TYPES_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION))
52     #error "AutoSar Version Numbers of Spi_Ip_Types.h and StandardTypes.h are different"
53     #endif
54 #endif
55 
56 /* Check if Spi_Ip_Types.h header file and Spi_Ip_Cfg.h configuration header file are of the same vendor */
57 #if (SPI_IP_TYPES_VENDOR_ID != SPI_IP_VENDOR_ID_CFG)
58     #error "Spi_Ip_Types.h and Spi_Ip_Cfg.h have different vendor IDs"
59 #endif
60     /* Check if Spi_Ip_Types.h header file and Spi_Ip_Cfg.h  configuration header file are of the same Autosar version */
61 #if ((SPI_IP_TYPES_AR_RELEASE_MAJOR_VERSION != SPI_IP_AR_RELEASE_MAJOR_VERSION_CFG) || \
62      (SPI_IP_TYPES_AR_RELEASE_MINOR_VERSION != SPI_IP_AR_RELEASE_MINOR_VERSION_CFG) || \
63      (SPI_IP_TYPES_AR_RELEASE_REVISION_VERSION != SPI_IP_AR_RELEASE_REVISION_VERSION_CFG))
64 #error "AutoSar Version Numbers of Spi_Ip_Types.h and Spi_Ip_Cfg.h are different"
65 #endif
66 /* Check if Spi_Ip_Types.h header file and Spi_Ip_Cfg.h configuration header file are of the same software version */
67 #if ((SPI_IP_TYPES_SW_MAJOR_VERSION != SPI_IP_SW_MAJOR_VERSION_CFG) || \
68      (SPI_IP_TYPES_SW_MINOR_VERSION != SPI_IP_SW_MINOR_VERSION_CFG) || \
69      (SPI_IP_TYPES_SW_PATCH_VERSION != SPI_IP_SW_PATCH_VERSION_CFG))
70 #error "Software Version Numbers of Spi_Ip_Types.h and Spi_Ip_Cfg.h are different"
71 #endif
72 /*==================================================================================================
73 *                                            CONSTANTS
74 ==================================================================================================*/
75 
76 /*==================================================================================================
77 *                                       DEFINES AND MACROS
78 ==================================================================================================*/
79 
80 /*==================================================================================================
81 *                                              ENUMS
82 ==================================================================================================*/
83 
84 /*==================================================================================================
85 *                                  STRUCTURES AND OTHER TYPEDEFS
86 ==================================================================================================*/
87 
88 /** @brief   Enum defining the possible events which triggers end of transfer callback.
89 *
90 * @implements Spi_Ip_EventType_enum
91 */
92 typedef enum
93 {
94     SPI_IP_EVENT_END_TRANSFER = 0, /**< The transfer is successfully done. */
95     SPI_IP_EVENT_FAULT = 1         /**< The transfer failed due to overflow/underflow. */
96 } Spi_Ip_EventType;
97 
98 /** @brief   Callback for all peripherals which supports SPI features. */
99 typedef void (*Spi_Ip_CallbackType)(uint8 Instance, Spi_Ip_EventType Event);
100 
101 /** @brief   Enum defining the possible transfer modes.
102 *
103 * @implements Spi_Ip_ModeType_enum
104 */
105 typedef enum
106 {
107     SPI_IP_POLLING = 0, /**< For polling mode the application must call periodically Spi_Ip_ManageBuffers after asynchronous transfers. */
108     SPI_IP_INTERRUPT   /**< For interrupt mode the application doesn't need to perform any additional operations after asynchronous transfers.
109                             The application must enable the interrupt requests and install the right callbacks. */
110 } Spi_Ip_ModeType;
111 
112 /** @brief   Enum defining the possible states of hardware unit.
113  * @implements Spi_Ip_HwStatusType_enum
114 */
115 typedef enum
116 {
117    SPI_IP_UNINIT = 0u, /**< Module is not initialized. */
118    SPI_IP_IDLE = 1u, /**< Module is not used. */
119    SPI_IP_BUSY = 2u,   /**< A transfer is in progress. */
120    SPI_IP_FAULT = 3u   /**< During last transfer a fault occurred. */
121 } Spi_Ip_HwStatusType;
122 
123 /** @brief   Enum defining the possible return types.
124 *
125 * @implements Spi_Ip_StatusType_enum
126 */
127 typedef enum
128 {
129    SPI_IP_STATUS_SUCCESS = 0u, /**< Successful operation. */
130    SPI_IP_STATUS_FAIL    = 1u, /**< Failed operation. */
131    SPI_IP_FIFO_ERROR     = 2u, /**< Overflow or underflow error. */
132    SPI_IP_TIMEOUT        = 3u  /**< Timeout error. */
133 } Spi_Ip_StatusType;
134 
135 /** @brief   Structure defining some parameters often change of the spi bus. */
136 typedef struct
137 {
138    uint8 FrameSize;    /**< Frame size configured */
139    boolean Lsb;    /**< Transfer LSB first or MSB first */
140    uint32 DefaultData;  /**< Default data to send when TxBuffer is NULL_PTR */
141 } Spi_Ip_DeviceParamsType;
142 
143 /** @brief   Structure defining the parameters of the spi bus. */
144 typedef struct
145 {
146    uint8 Instance; /**< Instance of the hardware unit. */
147    #if (SPI_IP_DUAL_CLOCK_MODE == STD_ON)
148    uint32 Ctar[2u];         /**< CTAR register which contains clocking and frame size configuration. */
149    #else
150    uint32 Ctar;         /**< CTAR register which contains clocking and frame size configuration. */
151    #endif
152    uint32 Ctare;        /**< CTARE registers which contains frame size configuration. */
153    uint16 PushrCmd;     /**< PUSHR CMD Fifo register which contains CS and continuos mode. */
154    Spi_Ip_DeviceParamsType * DeviceParams; /**< Contain configuration for bit order, frame size, default transmit data. */
155 } Spi_Ip_ExternalDeviceType;
156 
157 #if (SPI_IP_DUAL_CLOCK_MODE == STD_ON)
158 /**
159 * @brief   Specifies the Clock Modes.
160 */
161 typedef enum
162 {
163     SPI_IP_NORMAL_CLOCK = 0,        /**< @brief Clock reference is from SpiClockRef. */
164     SPI_IP_ALTERNATE_CLOCK          /**< @brief Clock reference is from SpiAlternateClockRef. */
165 }Spi_Ip_DualClockModeType;
166 #endif
167 
168 #if ((SPI_IP_DMA_USED == STD_ON) && (SPI_IP_ENABLE_DMAFASTTRANSFER_SUPPORT == STD_ON))
169 /** @brief   Structure defining transmition command needed for Dma Fast transfer. */
170 typedef struct
171 {
172    uint16 DmaFastPushrCmd;   /**< PUSHR CMD Fifo register which contains CS and continuos mode. */
173    uint16 DmaFastPushrCmdLast;   /**< PUSHR CMD Fifo register which contains CS and disable continuos mode. */
174    uint32 DefaultData;  /**< Default data to send when TxBuffer is NULL_PTR */
175 } Spi_Ip_CmdDmaFastType;
176 
177 /** @brief   Structure defining information needed for Dma Fast transfer session.
178 * @implements Spi_Ip_FastTransferType_struct
179 */
180 typedef struct
181 {
182     const Spi_Ip_ExternalDeviceType *ExternalDevice; /**< Point to external device configuration */
183     const uint8* TxBuffer;  /**< Store pointer for Tx buffer */
184     uint8* RxBuffer;  /**< Store pointer for Rx buffer */
185     uint32 DefaultData;  /**< Default data to send when TxBuffer is NULL_PTR */
186     uint16 Length;  /**< Number of bytes to be sent */
187     boolean KeepCs;  /**< Keep CS signal after transfer session completed */
188 } Spi_Ip_FastTransferType;
189 #endif
190 
191 /** @brief   Structure defining information needed for SPI driver initialization. */
192 typedef struct
193 {
194    uint8 Instance; /**< Instance of the hardware unit. */
195    uint32  Mcr; /**< Select master/slave. */
196    #if (SPI_IP_SLAVE_SUPPORT == STD_ON)
197    boolean SlaveMode;
198    #endif
199    #if (SPI_IP_DMA_USED == STD_ON)
200    boolean DmaUsed;    /**< DMA is used or not */
201    uint8   TxDmaChannel;    /**< Id of TX DMA channel for transmition */
202    uint8   TxCmdDmaChannel;    /**< Id of CMD DMA channel for transmition */
203    uint8 NumTxCmdDmaSGId;  /**< Number of TCD Scatter Gather for CMD DMA channel */
204    const uint8 *TxCmdDmaSGId;    /**< Point to list of TCD Scatter Gather Id for CMD DMA channel */
205    uint8   RxDmaChannel;    /**< Id of RX DMA channel for receive */
206    #if (SPI_IP_ENABLE_DMAFASTTRANSFER_SUPPORT == STD_ON)
207    uint8 MaxNumOfFastTransfer; /**< Maximum number of transfers in Dma Fast */
208    Spi_Ip_CmdDmaFastType *CmdDmaFast; /**< Point to list of PUSH command used in Dma Fast transfer */
209    uint8 NumberRxSG; /**< Number of TCD Scatter Gather for Rx DMA channel used in Dma Fast transfer */
210    const uint8 *TxDmaFastSGId; /**< Point to list of TCD Scatter Gather Id for Tx DMA channel used in Dma Fast transfer */
211    const uint8 *RxDmaFastSGId; /**< Point to list of TCD Scatter Gather Id for Rx DMA channel used in Dma Fast transfer */
212    #endif
213    #endif
214    Spi_Ip_ModeType TransferMode; /**< Transfer mode for HWunit */
215    uint8 StateIndex; /**< State of current transfer  */
216 } Spi_Ip_ConfigType;
217 
218 /** @brief   Structure defining information needed for internal state of the driver. */
219 typedef struct
220 {
221    #if (SPI_IP_DUAL_CLOCK_MODE == STD_ON)
222    Spi_Ip_DualClockModeType ClockMode; /**< Store current clock mode for HWunit */
223    #endif
224    Spi_Ip_ModeType TransferMode; /**< Store current transfer mode for HWunit */
225    Spi_Ip_HwStatusType Status; /**< 0 = available, 1 = busy, 2 = fail due to overflow or underflow */
226    uint8* RxBuffer;  /**< Store pointer for Rx buffer */
227    const uint8* TxBuffer;  /**< Store pointer for Tx buffer */
228    Spi_Ip_CallbackType Callback;  /**< Store pointer for call back function */
229    uint16 RxIndex;  /**< Store current Rx index to receive data in Rx buffer */
230    uint16 TxIndex;  /**< Store current Tx index to transmit data in Tx buffer */
231    uint16 ExpectedFifoReads;    /**< Store number of frames needs to be receive for current transfer */
232    uint16 ExpectedFifoWrites;   /**< Store number of frames needs to be transmit for current transfer */
233    uint16 ExpectedCmdFifoWrites;   /**< Store number of frames needs to be transmit for current transfer */
234    uint16 PushrCmd;   /**< PUSHR CMD Fifo register which contains CS and continuos mode. */
235    boolean KeepCs;   /**< Keep CS signal after tranfers completed. */
236    uint16 CurrentTxFifoSlot;   /**< Number of TX FIFO slots are current available. */
237    uint16 Pushr0Repeat; /**< Number of times to write PushrCmds[0] to FIFO >*/
238    uint16 Pushr0RepeatIndex; /**< Counter for Pushr0Repeat >*/
239    uint16 PushrCmds[3]; /**< Pushr Cmds to be written to FIFO >*/
240    uint16 DTCPValue[3]; /**< Values of DTCP to be written in CTARE0-3 >*/
241    uint16 NbCmds; /**< Number of different Cmds >*/
242    uint16 NbCmdsIndex; /**< Counter for NbCmds >*/
243    const Spi_Ip_ConfigType *PhyUnitConfig;
244    const Spi_Ip_ExternalDeviceType *ExternalDevice;
245 } Spi_Ip_StateStructureType;
246 
247 typedef struct
248 {
249    boolean KeepCs; /**< Keep CS asserted after the next transfer */
250    Spi_Ip_DeviceParamsType *DeviceParams; /**< Device params to be updated. If null, device params are not updated */
251 } Spi_Ip_TransferAdjustmentType;
252 
253 /*==================================================================================================
254 *                                  GLOBAL VARIABLE DECLARATIONS
255 ==================================================================================================*/
256 
257 /*==================================================================================================
258 *                                       FUNCTION PROTOTYPES
259 ==================================================================================================*/
260 
261 #ifdef __cplusplus
262 }
263 #endif
264 
265 /** @} */
266 
267 #endif /*SPI_IP_TYPES*/
268