1 /*
2 * Copyright 2021-2022 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6 /**
7 * @file Clock_Ip_Selector.c
8 * @version 0.9.0
9 *
10 * @brief CLOCK driver implementations.
11 * @details CLOCK driver implementations.
12 *
13 * @addtogroup CLOCK_DRIVER Clock Ip Driver
14 * @{
15 */
16
17
18 #ifdef __cplusplus
19 extern "C"{
20 #endif
21
22
23 /*==================================================================================================
24 * INCLUDE FILES
25 * 1) system and project includes
26 * 2) needed interfaces from external units
27 * 3) internal and external interfaces from this unit
28 ==================================================================================================*/
29
30 #include "Clock_Ip_Private.h"
31
32 /*==================================================================================================
33 SOURCE FILE VERSION INFORMATION
34 ==================================================================================================*/
35 #define CLOCK_IP_SELECTOR_VENDOR_ID_C 43
36 #define CLOCK_IP_SELECTOR_AR_RELEASE_MAJOR_VERSION_C 4
37 #define CLOCK_IP_SELECTOR_AR_RELEASE_MINOR_VERSION_C 7
38 #define CLOCK_IP_SELECTOR_AR_RELEASE_REVISION_VERSION_C 0
39 #define CLOCK_IP_SELECTOR_SW_MAJOR_VERSION_C 0
40 #define CLOCK_IP_SELECTOR_SW_MINOR_VERSION_C 9
41 #define CLOCK_IP_SELECTOR_SW_PATCH_VERSION_C 0
42
43 /*==================================================================================================
44 * FILE VERSION CHECKS
45 ==================================================================================================*/
46 /* Check if Clock_Ip_Selector.c file and Clock_Ip_Private.h file are of the same vendor */
47 #if (CLOCK_IP_SELECTOR_VENDOR_ID_C != CLOCK_IP_PRIVATE_VENDOR_ID)
48 #error "Clock_Ip_Selector.c and Clock_Ip_Private.h have different vendor ids"
49 #endif
50
51 /* Check if Clock_Ip_Selector.c file and Clock_Ip_Private.h file are of the same Autosar version */
52 #if ((CLOCK_IP_SELECTOR_AR_RELEASE_MAJOR_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION) || \
53 (CLOCK_IP_SELECTOR_AR_RELEASE_MINOR_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION) || \
54 (CLOCK_IP_SELECTOR_AR_RELEASE_REVISION_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION) \
55 )
56 #error "AutoSar Version Numbers of Clock_Ip_Selector.c and Clock_Ip_Private.h are different"
57 #endif
58
59 /* Check if Clock_Ip_Selector.c file and Clock_Ip_Private.h file are of the same Software version */
60 #if ((CLOCK_IP_SELECTOR_SW_MAJOR_VERSION_C != CLOCK_IP_PRIVATE_SW_MAJOR_VERSION) || \
61 (CLOCK_IP_SELECTOR_SW_MINOR_VERSION_C != CLOCK_IP_PRIVATE_SW_MINOR_VERSION) || \
62 (CLOCK_IP_SELECTOR_SW_PATCH_VERSION_C != CLOCK_IP_PRIVATE_SW_PATCH_VERSION) \
63 )
64 #error "Software Version Numbers of Clock_Ip_Selector.c and Clock_Ip_Private.h are different"
65 #endif
66 /*==================================================================================================
67 * LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
68 ==================================================================================================*/
69
70 /*==================================================================================================
71 * LOCAL MACROS
72 ==================================================================================================*/
73
74 /*==================================================================================================
75 * LOCAL CONSTANTS
76 ==================================================================================================*/
77
78 /*==================================================================================================
79 * LOCAL VARIABLES
80 ==================================================================================================*/
81
82 /*==================================================================================================
83 * GLOBAL CONSTANTS
84 ==================================================================================================*/
85
86 /*==================================================================================================
87 * GLOBAL VARIABLES
88 ==================================================================================================*/
89
90 /*==================================================================================================
91 * GLOBAL FUNCTION PROTOTYPES
92 ==================================================================================================*/
93 /* Clock start section code */
94 #define MCU_START_SEC_CODE
95
96 #include "Mcu_MemMap.h"
97
98 #ifdef CLOCK_IP_MC_ME_AE_GS_S_SYSCLK
99 void Clock_Ip_ResetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const *Config);
100 void Clock_Ip_SetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const *Config);
101 #endif
102
103 /*==================================================================================================
104 * LOCAL FUNCTION PROTOTYPES
105 ==================================================================================================*/
106
107 static void Clock_Ip_CallbackSelectorEmpty(Clock_Ip_SelectorConfigType const* Config);
108
109 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CLK_SW_SWIP
110 static void Clock_Ip_ResetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config);
111 static void Clock_Ip_SetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config);
112 #endif
113
114 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CS_GRIP
115 static void Clock_Ip_SetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config);
116 static void Clock_Ip_ResetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config);
117 #endif
118
119 #ifdef CLOCK_IP_GPR_X_CLKOUT_SEL_MUXSEL
120 static void Clock_Ip_ResetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const *Config);
121 static void Clock_Ip_SetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const *Config);
122 #endif
123
124 #ifdef CLOCK_IP_MC_ME_AE_GS_S_SYSCLK
125 static void Clock_Ip_ResetMcMeAeGssSysclk(Clock_Ip_SelectorConfigType const *Config);
126 static void Clock_Ip_SetMcMeAeGssSysclk(Clock_Ip_SelectorConfigType const *Config);
127 #endif
128
129 /* Clock stop section code */
130 #define MCU_STOP_SEC_CODE
131
132 #include "Mcu_MemMap.h"
133 /*==================================================================================================
134 * LOCAL FUNCTIONS
135 ==================================================================================================*/
136 /* Clock start section code */
137 #define MCU_START_SEC_CODE
138
139 #include "Mcu_MemMap.h"
140
Clock_Ip_CallbackSelectorEmpty(Clock_Ip_SelectorConfigType const * Config)141 static void Clock_Ip_CallbackSelectorEmpty(Clock_Ip_SelectorConfigType const* Config)
142 {
143 (void)Config;
144 /* No implementation */
145 }
146
147 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CLK_SW_SWIP
148 /* Reset MC_CGM_m_MUX_n[CSC] register */
Clock_Ip_ResetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const * Config)149 static void Clock_Ip_ResetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config)
150 {
151
152 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
153 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
154
155 uint32 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
156
157 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC |= MC_CGM_MUX_CSC_SAFE_SW_MASK;
158 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC &= ~SelectorMask;
159 }
160
161 /* Set MC_CGM_m_MUX_n[CSC] register */
Clock_Ip_SetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const * Config)162 static void Clock_Ip_SetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config)
163 {
164
165 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
166 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
167 uint32 SelectorValue = Clock_Ip_au16SelectorEntryHardwareValue[Config->Value]; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
168
169 uint32 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
170 uint32 SelectorShift = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueShift;
171
172 uint32 RegValue;
173 boolean TimeoutOccurred = FALSE;
174 uint32 StartTime;
175 uint32 ElapsedTime;
176 uint32 TimeoutTicks;
177
178 /* Do not configure mux if it is already set to the selector value from configuration.*/
179 if (SelectorValue != ((Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & SelectorMask) >> SelectorShift))
180 {
181 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
182 do
183 {
184 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
185 }
186 while((MC_CGM_MUX_CSS_SWIP_IN_PROGRESS == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_SWIP_MASK)) && (FALSE == TimeoutOccurred));
187
188 if (FALSE == TimeoutOccurred)
189 {
190 RegValue = Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC;
191 RegValue &= ~SelectorMask;
192 RegValue |= (SelectorValue << SelectorShift) & SelectorMask;
193 RegValue |= (MC_CGM_MUX_CSC_CLK_SW_MASK); /* Clock switch operation is requested */
194 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC = RegValue;
195
196 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
197 /* Wait for CLK_SW to auto-clear */
198 do
199 {
200 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
201 } /* No safe clock switch operation was requested. */
202 while((CLOCK_IP_MC_CGM_MUX_CSS_CLK_SW_NOT_REQUESTED == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_CLK_SW_MASK)) && (FALSE == TimeoutOccurred));
203
204 if (FALSE == TimeoutOccurred)
205 {
206 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
207 /* Wait for acknowledge to be cleared. */
208 do
209 {
210 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
211 }
212 while((MC_CGM_MUX_CSS_SWIP_IN_PROGRESS == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_SWIP_MASK)) && (FALSE == TimeoutOccurred) );
213
214 if (FALSE == TimeoutOccurred)
215 {
216 /* Check the switch status. */
217 if (CLOCK_IP_MC_CGM_MUX_CSS_SWTRG_SUCCEEDED != ((Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_SWTRG_MASK) >> MC_CGM_MUX_0_CSS_SWTRG_SHIFT))
218 {
219 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_CLOCK_MUX_SWITCH_ERROR, Config->Name);
220 }
221 }
222 else
223 {
224 /* Report timeout error */
225 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
226 }
227 }
228 else
229 {
230 /* Report timeout error */
231 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
232 }
233 }
234 else {
235
236 /* Report timeout error */
237 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
238 }
239 }
240 }
241 #endif
242
243 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CS_GRIP
Clock_Ip_ResetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const * Config)244 static void Clock_Ip_ResetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config)
245 {
246 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
247 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
248 uint32 SelectorResetValue = Clock_Ip_au8SoftwareMuxResetValue[Config->Name]; /* Hw value corresponding to software mux reset. */
249
250 uint32 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
251 uint32 SelectorShift = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueShift;
252
253 uint32 RegValue;
254 boolean TimeoutOccurred = FALSE;
255 uint32 StartTime;
256 uint32 ElapsedTime;
257 uint32 TimeoutTicks;
258
259 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC |= (MC_CGM_MUX_CSC_CG_MASK | MC_CGM_MUX_CSC_FCG_MASK);
260
261 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
262 do
263 {
264 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
265 }
266 while ((MC_CGM_MUX_CSS_CS_TRANSPARENT == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_CS_MASK)) && (FALSE == TimeoutOccurred));
267
268 if (FALSE == TimeoutOccurred)
269 {
270 /* Set the reset value for this mux. */
271 RegValue = Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC;
272 RegValue &= ~SelectorMask;
273 RegValue |= (SelectorResetValue << SelectorShift) & SelectorMask;
274 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC = RegValue;
275
276 /* Clear CG and FCG bit after set the SELCTL bit */
277 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC &= ~(MC_CGM_MUX_CSC_FCG_MASK | MC_CGM_MUX_CSC_CG_MASK);
278 }
279 }
Clock_Ip_SetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const * Config)280 static void Clock_Ip_SetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config)
281 {
282
283 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
284 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
285 uint32 SelectorValue = Clock_Ip_au16SelectorEntryHardwareValue[Config->Value]; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
286
287 uint32 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
288 uint32 SelectorShift = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueShift;
289
290 uint32 RegValue;
291 boolean TimeoutOccurred = FALSE;
292 uint32 StartTime;
293 uint32 ElapsedTime;
294 uint32 TimeoutTicks;
295
296 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC |= (MC_CGM_MUX_CSC_CG_MASK | MC_CGM_MUX_CSC_FCG_MASK);
297
298 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
299 do
300 {
301 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
302 }
303 while ((MC_CGM_MUX_CSS_CS_TRANSPARENT == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_CS_MASK)) && (FALSE == TimeoutOccurred));
304
305 if (FALSE == TimeoutOccurred)
306 {
307 /* Configure clock source. */
308 RegValue = Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC;
309 RegValue &= ~SelectorMask;
310 RegValue |= (SelectorValue << SelectorShift) & SelectorMask;
311 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC = RegValue;
312
313 /* Clear CG and FCG bit after set the SELCTL bit */
314 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC &= ~(MC_CGM_MUX_CSC_FCG_MASK | MC_CGM_MUX_CSC_CG_MASK);
315
316 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
317 /* Wait until the output clock is ungated. */
318 do
319 {
320 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
321 }
322 while (((Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_CS_MASK) != MC_CGM_MUX_CSS_CS_TRANSPARENT) && (FALSE == TimeoutOccurred));
323
324 if (TRUE == TimeoutOccurred)
325 {
326 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_CLOCK_MUX_SWITCH_ERROR, Config->Name);
327 }
328 }
329 else
330 {
331 /* Report timeout error */
332 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
333 }
334 }
335 #endif
336
337
338 #ifdef CLOCK_IP_GPR_X_CLKOUT_SEL_MUXSEL
339 /* No implementation */
Clock_Ip_ResetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const * Config)340 static void Clock_Ip_ResetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const *Config)
341 {
342 (void)Config;
343 /* No implementation for reset value */
344 }
345
346 /* Set GPR_m_CLKOUTnSEL[MUXSEL] register */
Clock_Ip_SetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const * Config)347 static void Clock_Ip_SetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const *Config)
348 {
349
350 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
351 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
352 uint32 SelectorValue = Clock_Ip_au16SelectorEntryClkoutHardwareValue[Config->Value]; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
353
354 uint32 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
355 uint32 SelectorShift = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueShift;
356
357 uint32 RegValue;
358
359 RegValue = *Clock_Ip_apxGprClkout[Instance][SelectorIndex];
360 RegValue &= ~SelectorMask;
361 RegValue |= (SelectorValue << SelectorShift) & SelectorMask;
362 *Clock_Ip_apxGprClkout[Instance][SelectorIndex] = RegValue;
363 }
364 #endif
365
366
367 #ifdef CLOCK_IP_MC_ME_AE_GS_S_SYSCLK
368 /* Reset IP_MC_ME_AE[SAFE_MC] register */
Clock_Ip_ResetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const * Config)369 void Clock_Ip_ResetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const *Config)
370 {
371 uint32 PowerModeIndexIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_POWER_MODE_INDEX];
372
373 Clock_Ip_apxSystemClock->POWER_MODE_CONFIG[PowerModeIndexIndex] &= ~MC_ME_AE_GS_S_SYSCLK_MASK;
374 }
375 /* Set IP_MC_ME_AE[SAFE_MC] register */
Clock_Ip_SetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const * Config)376 void Clock_Ip_SetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const *Config)
377 {
378 uint32 SelectorValue = Clock_Ip_au16SelectorEntryAeHardwareValue[Config->Value]; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
379 uint32 PowerModeIndexIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_POWER_MODE_INDEX];
380 uint32 McMeAeCurrentMode = 0U;
381
382 uint32 regValue;
383 boolean TimeoutOccurred = FALSE;
384 uint32 StartTime;
385 uint32 ElapsedTime;
386 uint32 TimeoutTicks;
387
388 regValue = Clock_Ip_apxSystemClock->POWER_MODE_CONFIG[PowerModeIndexIndex];;
389 regValue &= ~MC_ME_AE_GS_S_SYSCLK_MASK;
390 regValue |= MC_ME_AE_GS_S_SYSCLK(SelectorValue);
391
392 McMeAeCurrentMode = IP_MC_ME_AE->GS & MC_ME_AE_GS_S_CURRENT_MODE_MASK;
393 Clock_Ip_apxSystemClock->POWER_MODE_CONFIG[PowerModeIndexIndex] = regValue;
394
395 /* Enter key */
396 IP_MC_ME_AE->MCTL = McMeAeCurrentMode | 0x5AF0U;
397 IP_MC_ME_AE->MCTL = McMeAeCurrentMode | 0xA50FU;
398
399 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
400 do
401 {
402 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
403 }
404 while ((MC_ME_AE_TRANSITION_IS_ON_GOING == (IP_MC_ME_AE->GS & MC_ME_AE_GS_S_MTRANS_MASK)) && (FALSE == TimeoutOccurred));
405
406 if (TRUE == TimeoutOccurred)
407 {
408 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_CLOCK_MUX_SWITCH_ERROR, Config->Name);
409 }
410 }
411 #endif
412
413 #ifdef CLOCK_IP_MC_ME_AE_GS_S_SYSCLK
Clock_Ip_ResetMcMeAeGssSysclk(Clock_Ip_SelectorConfigType const * Config)414 static void Clock_Ip_ResetMcMeAeGssSysclk(Clock_Ip_SelectorConfigType const *Config)
415 {
416 #ifdef CLOCK_IP_ENABLE_USER_MODE_SUPPORT
417 #if (STD_ON == CLOCK_IP_ENABLE_USER_MODE_SUPPORT)
418 OsIf_Trusted_Call1param(Clock_Ip_ResetMcMeAeGssSysclk_TrustedCall,(Config));
419 #else
420 Clock_Ip_ResetMcMeAeGssSysclk_TrustedCall(Config);
421 #endif
422 #endif /* CLOCK_IP_ENABLE_USER_MODE_SUPPORT */
423 }
Clock_Ip_SetMcMeAeGssSysclk(Clock_Ip_SelectorConfigType const * Config)424 static void Clock_Ip_SetMcMeAeGssSysclk(Clock_Ip_SelectorConfigType const *Config)
425 {
426 #ifdef CLOCK_IP_ENABLE_USER_MODE_SUPPORT
427 #if (STD_ON == CLOCK_IP_ENABLE_USER_MODE_SUPPORT)
428 OsIf_Trusted_Call1param(Clock_Ip_SetMcMeAeGssSysclk_TrustedCall,(Config));
429 #else
430 Clock_Ip_SetMcMeAeGssSysclk_TrustedCall(Config);
431 #endif
432 #endif /* CLOCK_IP_ENABLE_USER_MODE_SUPPORT */
433 }
434 #endif
435
436 /*==================================================================================================
437 * GLOBAL FUNCTIONS
438 ==================================================================================================*/
439 /* Clock stop section code */
440 #define MCU_STOP_SEC_CODE
441
442 #include "Mcu_MemMap.h"
443
444 /*==================================================================================================
445 * GLOBAL CONSTANTS
446 ==================================================================================================*/
447
448 /* Clock start constant section data */
449 #define MCU_START_SEC_CONST_UNSPECIFIED
450
451 #include "Mcu_MemMap.h"
452
453 const Clock_Ip_SelectorCallbackType Clock_Ip_axSelectorCallbacks[CLOCK_IP_SELECTOR_CALLBACKS_COUNT] =
454 {
455 {
456 Clock_Ip_CallbackSelectorEmpty, /* Reset */
457 Clock_Ip_CallbackSelectorEmpty, /* Set */
458 },
459 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CLK_SW_SWIP
460 {
461 Clock_Ip_ResetCgmXCscCssClkswSwip, /* Reset */
462 Clock_Ip_SetCgmXCscCssClkswSwip, /* Set */
463 },
464 #endif
465
466 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CS_GRIP
467 {
468 Clock_Ip_ResetCgmXCscCssCsGrip, /* Reset */
469 Clock_Ip_SetCgmXCscCssCsGrip, /* Set */
470 },
471 #endif
472
473 #ifdef CLOCK_IP_GPR_X_CLKOUT_SEL_MUXSEL
474 {
475 Clock_Ip_ResetGprXClkoutSelMuxsel, /* Reset */
476 Clock_Ip_SetGprXClkoutSelMuxsel, /* Set */
477 },
478 #endif
479
480 #ifdef CLOCK_IP_MC_ME_AE_GS_S_SYSCLK
481 {
482 Clock_Ip_ResetMcMeAeGssSysclk, /* Reset */
483 Clock_Ip_SetMcMeAeGssSysclk, /* Set */
484 },
485 #endif
486
487 };
488
489 /* Clock stop constant section data */
490 #define MCU_STOP_SEC_CONST_UNSPECIFIED
491
492 #include "Mcu_MemMap.h"
493
494
495
496 #ifdef __cplusplus
497 }
498 #endif
499
500 /** @} */
501
