1 /*
2  * Copyright 2021-2024 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 /**
8 *   @file CanEXCEL_Ip_HwAccess.c
9 *
10 *   @addtogroup CanEXCEL
11 *   @{
12 */
13 
14 #include "CanEXCEL_Ip_HwAccess.h"
15 #include "SchM_Can_43_CANEXCEL.h"
16 
17 /*==================================================================================================
18 *                              SOURCE FILE VERSION INFORMATION
19 ==================================================================================================*/
20 #define CANEXCEL_IP_HWACCESS_VENDOR_ID_C                      43
21 #define CANEXCEL_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_C       4
22 #define CANEXCEL_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_C       7
23 #define CANEXCEL_IP_HWACCESS_AR_RELEASE_REVISION_VERSION_C    0
24 #define CANEXCEL_IP_HWACCESS_SW_MAJOR_VERSION_C               2
25 #define CANEXCEL_IP_HWACCESS_SW_MINOR_VERSION_C               0
26 #define CANEXCEL_IP_HWACCESS_SW_PATCH_VERSION_C               0
27 /*==================================================================================================
28 *                                     FILE VERSION CHECKS
29 ==================================================================================================*/
30 /* Check if current file and CanEXCEL_Ip_HwAccess.h are of the same vendor */
31 #if (CANEXCEL_IP_HWACCESS_VENDOR_ID_C != CANEXCEL_IP_HWACCESS_VENDOR_ID_H)
32     #error "CanEXCEL_Ip_HwAccess.c and CanEXCEL_Ip_HwAccess.h have different vendor ids"
33 #endif
34 /* Check if current file and CanEXCEL_Ip_HwAccess.h are of the same Autosar version */
35 #if ((CANEXCEL_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_C    != CANEXCEL_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_H) || \
36      (CANEXCEL_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_C    != CANEXCEL_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_H) || \
37      (CANEXCEL_IP_HWACCESS_AR_RELEASE_REVISION_VERSION_C != CANEXCEL_IP_HWACCESS_AR_RELEASE_REVISION_VERSION_H) \
38 )
39     #error "AutoSar Version Numbers of CanEXCEL_Ip_HwAccess.c and CanEXCEL_Ip_HwAccess.h are different"
40 #endif
41 /* Check if current file and CanEXCEL_Ip_HwAccess.h are of the same Software version */
42 #if ((CANEXCEL_IP_HWACCESS_SW_MAJOR_VERSION_C != CANEXCEL_IP_HWACCESS_SW_MAJOR_VERSION_H) || \
43      (CANEXCEL_IP_HWACCESS_SW_MINOR_VERSION_C != CANEXCEL_IP_HWACCESS_SW_MINOR_VERSION_H) || \
44      (CANEXCEL_IP_HWACCESS_SW_PATCH_VERSION_C != CANEXCEL_IP_HWACCESS_SW_PATCH_VERSION_H) \
45 )
46     #error "Software Version Numbers of CanEXCEL_Ip_HwAccess.c and CanEXCEL_Ip_HwAccess.h are different"
47 #endif
48 
49 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
50     /* Check if current file and SchM_Can_43_CANEXCEL.h header file are of the same version */
51     #if ((CANEXCEL_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_C    !=  SCHM_CAN_43_CANEXCEL_AR_RELEASE_MAJOR_VERSION) || \
52         (CANEXCEL_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_C     !=  SCHM_CAN_43_CANEXCEL_AR_RELEASE_MINOR_VERSION) \
53 )
54         #error "AUTOSAR Version Numbers of CanEXCEL_Ip_HwAccess.c and SchM_Can_43_CANEXCEL.h are different"
55     #endif
56 #endif
57 
58 /*==================================================================================================
59 *                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
60 ==================================================================================================*/
61 
62 /*==================================================================================================
63 *                                       LOCAL MACROS
64 ==================================================================================================*/
65 /* CAN FD extended data length DLC encoding */
66 #define CANXL_IP_DLC_VALUE_12_BYTES              9U
67 #define CANXL_IP_DLC_VALUE_16_BYTES              10U
68 #define CANXL_IP_DLC_VALUE_20_BYTES              11U
69 #define CANXL_IP_DLC_VALUE_24_BYTES              12U
70 #define CANXL_IP_DLC_VALUE_32_BYTES              13U
71 #define CANXL_IP_DLC_VALUE_48_BYTES              14U
72 #define CANXL_IP_DLC_VALUE_64_BYTES              15U
73 
74 /*==================================================================================================
75 *                                      GLOBAL VARIABLES
76 ==================================================================================================*/
77 
78 #define CAN_43_CANEXCEL_START_SEC_CODE
79 #include "Can_43_CANEXCEL_MemMap.h"
80 
81 /*FUNCTION**********************************************************************
82  *
83  * Function Name : CanXL_SetMDQueueConfigs
84  * Description   : Sets the Message Descriptors Queue Depth and Watermark Level
85  *
86  *END**************************************************************************/
CanXL_SetMDQueueConfigs(CANXL_GRP_CONTROL_Type * base,const Canexcel_Ip_QueueConf * pConfigs)87 void CanXL_SetMDQueueConfigs(CANXL_GRP_CONTROL_Type * base, const Canexcel_Ip_QueueConf * pConfigs)
88 {
89     uint8 i,j=0U;
90     for (i=0U;i < CANXL_GRP_CONTROL_FIFOCTRLREQ_COUNT; i++)
91     {
92         base->FIFOCTRL[i] = CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH1(pConfigs[j].mdQueueDepth) | CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH2(pConfigs[j+1u].mdQueueDepth) |
93                             CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM1(pConfigs[j].mdQueueWatermark) | CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM2(pConfigs[j+1u].mdQueueWatermark);
94         j=j+2u;
95     }
96 }
97 /*FUNCTION**********************************************************************
98  *
99  * Function Name : CanXL_GetMDQueueDepth
100  * Description   : Get the Message Descriptor Queue Depth
101  *
102  *END**************************************************************************/
CanXL_GetMDQueueDepth(const CANXL_GRP_CONTROL_Type * base,const uint8 MDindex)103 uint8 CanXL_GetMDQueueDepth(const CANXL_GRP_CONTROL_Type * base,const uint8 MDindex)
104 {
105     uint8 retValue = 0;
106     /* Devide MDIndex to 32U in order to determine the group of the register */
107     if (0U == ((MDindex >> 4U) % 2U))
108     {
109         retValue = (uint8)(base->FIFOCTRL[MDindex>>5U]&CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH1_MASK);
110     }
111     else
112     {
113         retValue = (uint8)((base->FIFOCTRL[MDindex>>5U]&CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH2_MASK)>>CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH2_SHIFT);
114     }
115     return retValue;
116 }
117 /*FUNCTION**********************************************************************
118  *
119  * Function Name : CanXL_SetErrIntCmd
120  * Description   : Enable the error interrupts.
121  * This function will enable Error interrupt.
122  *
123  *END**************************************************************************/
CanXL_SetErrIntCmd(CANXL_SIC_Type * base,canxl_int_type_t errType,boolean enable)124 void CanXL_SetErrIntCmd(CANXL_SIC_Type * base, canxl_int_type_t errType, boolean enable)
125 {
126     uint32 temp = (uint32)errType;
127     SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_06();
128     if (enable)
129     {
130         base->SYSIE |= temp;
131     }
132     else
133     {
134         base->SYSIE &= (~temp);
135     }
136     SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_06();
137 }
138 /*FUNCTION**********************************************************************
139  *
140  * Function Name: CAN_ComputeDLCValue
141  * Description  : Computes the DLC field value, given a payload size (in bytes).
142  * This is compatible only for Classical CAN Format (FDF=0) and CAN FD Format (FDF=1
143  * and XLF=0), for CAN XL Format (FDF=1 and XLF=1) is size is DLC+1 value
144  *END**************************************************************************/
CAN_ComputeDLCValue(uint8 payloadSize)145 uint8 CAN_ComputeDLCValue(uint8 payloadSize)
146 {
147     uint32 ret = 0xFFU;                   /* 0,  1,  2,  3,  4,  5,  6,  7,  8, */
148     static const uint8 payload_code[65] = {0U, 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U,
149                                            /* 9 to 12 payload have DLC Code 12 Bytes */
150                                            CANXL_IP_DLC_VALUE_12_BYTES, CANXL_IP_DLC_VALUE_12_BYTES, CANXL_IP_DLC_VALUE_12_BYTES, CANXL_IP_DLC_VALUE_12_BYTES,
151                                            /* 13 to 16 payload have DLC Code 16 Bytes */
152                                            CANXL_IP_DLC_VALUE_16_BYTES, CANXL_IP_DLC_VALUE_16_BYTES, CANXL_IP_DLC_VALUE_16_BYTES, CANXL_IP_DLC_VALUE_16_BYTES,
153                                            /* 17 to 20 payload have DLC Code 20 Bytes */
154                                            CANXL_IP_DLC_VALUE_20_BYTES, CANXL_IP_DLC_VALUE_20_BYTES, CANXL_IP_DLC_VALUE_20_BYTES, CANXL_IP_DLC_VALUE_20_BYTES,
155                                            /* 21 to 24 payload have DLC Code 24 Bytes */
156                                            CANXL_IP_DLC_VALUE_24_BYTES, CANXL_IP_DLC_VALUE_24_BYTES, CANXL_IP_DLC_VALUE_24_BYTES, CANXL_IP_DLC_VALUE_24_BYTES,
157                                            /* 25 to 32 payload have DLC Code 32 Bytes */
158                                            CANXL_IP_DLC_VALUE_32_BYTES, CANXL_IP_DLC_VALUE_32_BYTES, CANXL_IP_DLC_VALUE_32_BYTES, CANXL_IP_DLC_VALUE_32_BYTES,
159                                            CANXL_IP_DLC_VALUE_32_BYTES, CANXL_IP_DLC_VALUE_32_BYTES, CANXL_IP_DLC_VALUE_32_BYTES, CANXL_IP_DLC_VALUE_32_BYTES,
160                                            /* 33 to 48 payload have DLC Code 48 Bytes */
161                                            CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES,
162                                            CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES,
163                                            CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES,
164                                            CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES,
165                                            /* 49 to 64 payload have DLC Code 64 Bytes */
166                                            CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES,
167                                            CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES,
168                                            CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES,
169                                            CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES
170                                           };
171     if (payloadSize <= 64U)
172     {
173         ret = payload_code[payloadSize];
174     }
175     else
176     {
177         /* The argument is not a valid payload size will return 0xFF*/
178     }
179     return (uint8)ret;
180 }
181 /*FUNCTION**********************************************************************
182  *
183  * Function Name: CAN_ComputePayloadSizeHw
184  * Description  : Computes the a payload size (in bytes), given a DLC field value.
185  * This is used for Classical and FD Frame types.
186  *END**************************************************************************/
CAN_ComputePayloadSizeHw(uint8 dlcValue)187 static uint8 CAN_ComputePayloadSizeHw(uint8 dlcValue)
188 {
189     uint8 ret = 8U;
190 
191     if (dlcValue <= 8U)
192     {
193         ret = dlcValue;
194     }
195     else
196     {
197         switch (dlcValue)
198         {
199             case CANXL_IP_DLC_VALUE_12_BYTES:
200                 ret = 12U;
201                 break;
202             case CANXL_IP_DLC_VALUE_16_BYTES:
203                 ret = 16U;
204                 break;
205             case CANXL_IP_DLC_VALUE_20_BYTES:
206                 ret = 20U;
207                 break;
208             case CANXL_IP_DLC_VALUE_24_BYTES:
209                 ret = 24U;
210                 break;
211             case CANXL_IP_DLC_VALUE_32_BYTES:
212                 ret = 32U;
213                 break;
214             case CANXL_IP_DLC_VALUE_48_BYTES:
215                 ret = 48U;
216                 break;
217             case CANXL_IP_DLC_VALUE_64_BYTES:
218                 ret = 64U;
219                 break;
220             default:
221                 /* The argument is not a valid DLC size */
222                 break;
223         }
224     }
225     return ret;
226 }
227 /*FUNCTION**********************************************************************
228  *
229  * Function Name : CanXL_SoftReset
230  * Description   : Execute a SoftReset of the CANEXCEL Hw
231  *
232  *END**************************************************************************/
CanXL_SoftReset(CANXL_SIC_Type * base)233 Canexcel_Ip_StatusType CanXL_SoftReset(CANXL_SIC_Type * base)
234 {
235     uint32 timeStart = 0U;
236     uint32 timeElapsed = 0U;
237     Canexcel_Ip_StatusType returnResult = CANEXCEL_STATUS_SUCCESS;
238     uint32 uS2Ticks = OsIf_MicrosToTicks(CANEXCEL_IP_TIMEOUT_DURATION, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
239     base->SYSMC = CANXL_SIC_SYSMC_SOFRST_MASK;
240     timeStart = OsIf_GetCounter(CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
241     while ((base->SYSMC & CANXL_SIC_SYSMC_SOFRST_MASK) == CANXL_SIC_SYSMC_SOFRST_MASK)
242     {
243         timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
244         if (timeElapsed >= uS2Ticks)
245         {
246             returnResult = CANEXCEL_STATUS_TIMEOUT;
247             break;
248         }
249     }
250     return returnResult;
251 }
252 
253 /*FUNCTION**********************************************************************
254  *
255  * Function Name : CanXL_ClearRAM
256  * Description   : Clears CANEXCEL memory positions that require initialization.
257  *
258  *END**************************************************************************/
CanXL_ClearRAM(const CANEXCEL_StructType * CANXL,uint8 instance)259 void CanXL_ClearRAM(const CANEXCEL_StructType * CANXL, uint8 instance)
260 {
261    uint16 idx;
262    CANXL_MSG_DESCRIPTORS_Type * base_Msg_Desc = CANXL->EXL_MSGD[instance];
263    for (idx=0u; idx < CANXL_MSG_DESCRIPTORS_MSGDSC_COUNT; idx++)
264    {
265 #if   (CANEXCEL_IP_FEATURE_HAS_MSGDESC_RXCTRL_MODE == (STD_ON))
266        /* Set as Invalid Config Rx Msg Descriptor */
267        base_Msg_Desc->MSGDSC[idx].CTRL.RXCTRL = CANXL_MSG_DESCRIPTORS_RXCTRL_MODE_MASK;
268 #endif
269        base_Msg_Desc->MSGDSC[idx].CFG1.MDFLT1FD = 0U;
270        base_Msg_Desc->MSGDSC[idx].CFG2.MDFLT2FD = 0U;
271        base_Msg_Desc->MSGDSC[idx].LSTPNT.RXLSTPTR = 0U;
272        for (uint8 i=0;i<16u;i++)
273        {
274            /* Initialize the msg descriptor reserved space */
275            base_Msg_Desc->MSGDSC[idx].RESERVED_0[i] = 0U;
276        }
277    }
278    /* Clear the filter bank check the size in device reg as CANXL_IP_FILTER_BANK_SIZE */
279    volatile uint32 * ptr = (volatile uint32 *)&CANXL->EXL_FILTER[instance]->AFCFG0;
280    for (idx = 0u; idx <= (uint16)(CANXL_IP_FILTER_BANK_SIZE/4U); idx++)
281    {
282        ptr[idx] = 0U;
283    }
284    /* Clear and initilize RXFIFO memory */
285    CANXL_RXFIFO_Type * base_RxFifo = CANXL->EXL_RXFIFO[instance];
286    base_RxFifo->RXFFCTR = 0U;
287    for (idx = 0u; idx < CANXL_RXFIFO_RXFFPOINTERAR_COUNT; idx++)
288    {
289        base_RxFifo->RXFMBP[idx] = 0U;
290    }
291    base_RxFifo->SECAM = 0U;
292    base_RxFifo->SECAV = 0U;
293    base_RxFifo->AFCFG = 0U;
294    base_RxFifo->VAMRCFG = 0U;
295    base_RxFifo->SAMRCFG = 0U;
296    base_RxFifo->AAMRCFG = 0U;
297    base_RxFifo->ACPTIDMR = 0U;
298    for (idx = 0u; idx < CANXL_RXFIFO_VCANACPTFLTAR_COUNT; idx++)
299    {
300        base_RxFifo->VAFLT[idx] = 0U;
301    }
302    for (idx = 0u; idx < CANXL_RXFIFO_SDUACPTFLTAR_COUNT; idx++)
303    {
304        base_RxFifo->SAFLT[idx] = 0U;
305    }
306    for (idx = 0u; idx < CANXL_RXFIFO_ADDRACPTFLTAR_COUNT; idx++)
307    {
308        base_RxFifo->ADDRACPTFLTAR[idx].AAFLTL = 0U;
309        base_RxFifo->ADDRACPTFLTAR[idx].AAFLTH = 0U;
310    }
311    for (idx = 0u; idx < CANXL_RXFIFO_IDACPTFLTAR_COUNT; idx++)
312    {
313        base_RxFifo->IDACPTFLTAR[idx].IDAFLTL = 0U;
314        base_RxFifo->IDACPTFLTAR[idx].IDAFLTH = 0U;
315    }
316 }
317 
318 /*FUNCTION**********************************************************************
319  *
320  * Function Name : CANXL_EnterFreezeMode
321  * Description   : Enter the freeze mode.
322  *
323  *END**************************************************************************/
CanXL_EnterFreezeMode(CANXL_SIC_Type * base)324 Canexcel_Ip_StatusType CanXL_EnterFreezeMode(CANXL_SIC_Type * base)
325 {
326     uint32 timeStart = 0U;
327     uint32 timeElapsed = 0U;
328     uint32 uS2Ticks = OsIf_MicrosToTicks(CANEXCEL_IP_TIMEOUT_DURATION, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
329     Canexcel_Ip_StatusType returnResult = CANEXCEL_STATUS_SUCCESS;
330     boolean lowPower =  FALSE;
331 
332     /* Start critical section: implementation depends on integrator */
333     if ((CANXL_SIC_SYSS_FRZACKF_MASK == (base->SYSS & CANXL_SIC_SYSS_FRZACKF_MASK)) && (0U == (base->SYSMC & CANXL_SIC_SYSMC_FRZREQ_MASK)))
334     {
335         if (((base->SYSS & CANXL_SIC_SYSS_LPMACKF_MASK) != 0U) && (CANXL_SIC_SYSMC_LPMREQ_MASK == (base->SYSMC & CANXL_SIC_SYSMC_LPMREQ_MASK)))
336         {
337             lowPower = TRUE;
338             /* Exit low Power Mode to allow Freeze Enter Mode */
339             base->SYSS = CANXL_SIC_SYSS_LPMACKF_MASK;
340             SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01();
341             base->SYSMC &= ~CANXL_SIC_SYSMC_LPMREQ_MASK;
342             SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01();
343             timeStart = OsIf_GetCounter(CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
344             while (0U == (base->SYSS & CANXL_SIC_SYSS_LPMACKF_MASK))
345             {
346                 timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
347                 if (timeElapsed >= uS2Ticks)
348                 {
349                     returnResult = CANEXCEL_STATUS_TIMEOUT;
350                     break;
351                 }
352             }
353         }
354         /* Request Freeze Enter Mode */
355         base->SYSS = CANXL_SIC_SYSS_FRZACKF_MASK;
356         SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01();
357         base->SYSMC |= CANXL_SIC_SYSMC_FRZREQ_MASK;
358         SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01();
359     }
360     if (CANEXCEL_STATUS_SUCCESS == returnResult)
361     {
362         timeElapsed = 0U;
363         timeStart = OsIf_GetCounter(CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
364         while (0U == (base->SYSS & CANXL_SIC_SYSS_FRZACKF_MASK))
365         {
366             timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
367             if (timeElapsed >= uS2Ticks)
368             {
369                 returnResult = CANEXCEL_STATUS_TIMEOUT;
370                 break;
371             }
372         }
373     }
374 
375     if ((CANEXCEL_STATUS_SUCCESS == returnResult) && (TRUE == lowPower))
376     {
377         base->SYSS = CANXL_SIC_SYSS_LPMACKF_MASK;
378         SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01();
379         base->SYSMC |= CANXL_SIC_SYSMC_LPMREQ_MASK;
380         SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01();
381         timeElapsed = 0U;
382         timeStart = OsIf_GetCounter(CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
383         while (0U == (base->SYSS & CANXL_SIC_SYSS_LPMACKF_MASK))
384         {
385             timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
386             if (timeElapsed >= uS2Ticks)
387             {
388                 returnResult = CANEXCEL_STATUS_TIMEOUT;
389                 break;
390             }
391         }
392     }
393     return returnResult;
394 }
395 
396 /*FUNCTION**********************************************************************
397  *
398  * Function Name : CANXL_ExitFreezeMode
399  * Description   : Exit the freeze mode.
400  *
401  *END**************************************************************************/
CanXL_ExitFreezeMode(CANXL_SIC_Type * base)402 Canexcel_Ip_StatusType CanXL_ExitFreezeMode(CANXL_SIC_Type * base)
403 {
404     uint32 timeStart = 0U;
405     uint32 timeElapsed = 0U;
406     uint32 uS2Ticks = OsIf_MicrosToTicks(CANEXCEL_IP_TIMEOUT_DURATION, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
407     Canexcel_Ip_StatusType returnResult = CANEXCEL_STATUS_SUCCESS;
408     boolean lowPower =  FALSE;
409     if ((base->SYSS & CANXL_SIC_SYSS_FRZACKF_MASK) != 0U)
410     {
411         if ((base->SYSS & CANXL_SIC_SYSS_LPMACKF_MASK) == CANXL_SIC_SYSS_LPMACKF_MASK)
412         {
413             lowPower = TRUE;
414             base->SYSS = CANXL_SIC_SYSS_LPMACKF_MASK;
415             /* Exit low Power Mode to allow Freeze Exit Mode */
416             SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_02();
417             base->SYSMC &= ~CANXL_SIC_SYSMC_LPMREQ_MASK;
418             SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_02();
419             timeStart = OsIf_GetCounter(CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
420             while (0U == (base->SYSS & CANXL_SIC_SYSS_LPMACKF_MASK))
421             {
422                 timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
423                 if (timeElapsed >= uS2Ticks)
424                 {
425                     returnResult = CANEXCEL_STATUS_TIMEOUT;
426                     break;
427                 }
428             }
429         }
430     }
431     if (CANEXCEL_STATUS_SUCCESS == returnResult)
432     {
433         base->SYSS = CANXL_SIC_SYSS_FRZACKF_MASK;
434         /* Request exit Freeze Mode */
435         SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_02();
436         base->SYSMC &= ~CANXL_SIC_SYSMC_FRZREQ_MASK;
437         SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_02();
438         timeElapsed = 0U;
439         timeStart = OsIf_GetCounter(CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
440         while (0U == (base->SYSS & CANXL_SIC_SYSS_FRZACKF_MASK))
441         {
442             timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
443             if (timeElapsed >= uS2Ticks)
444             {
445                 returnResult = CANEXCEL_STATUS_TIMEOUT;
446                 break;
447             }
448         }
449     }
450     if ((CANEXCEL_STATUS_SUCCESS == returnResult) && (TRUE == lowPower))
451     {
452         base->SYSS = CANXL_SIC_SYSS_LPMACKF_MASK;
453         SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_02();
454         base->SYSMC |= CANXL_SIC_SYSMC_LPMREQ_MASK;
455         SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_02();
456         timeElapsed = 0U;
457         timeStart = OsIf_GetCounter(CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
458         while (0U == (base->SYSS & CANXL_SIC_SYSS_LPMACKF_MASK))
459         {
460             timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
461             if (timeElapsed >= uS2Ticks)
462             {
463                 returnResult = CANEXCEL_STATUS_TIMEOUT;
464                 break;
465             }
466         }
467     }
468     return returnResult;
469 }
470 /*FUNCTION**********************************************************************
471  *
472  * Function Name : CanXL_GetDescControlStatus
473  * Description   : Returns the Contol Lock status for Message Descriptor
474  *END**************************************************************************/
CanXL_GetDescControlStatus(const CANXL_DSC_CONTROL_Type * base,uint8 descNo)475 Canexcel_Ip_DesCntStatus CanXL_GetDescControlStatus(const CANXL_DSC_CONTROL_Type * base, uint8 descNo)
476 {
477     Canexcel_Ip_DesCntStatus status = CANEXCEL_DESCNTSTATUS_INVALID;
478     switch ((base->DSCMBCTRLAR[descNo].DCSTA & (CANXL_DSC_CONTROL_DCSTA_HWLOCK_MASK | CANXL_DSC_CONTROL_DCSTA_SYSLOCK_MASK))>>CANXL_DSC_CONTROL_DCSTA_HWLOCK_SHIFT)
479     {
480         case 0U:
481             status = CANEXCEL_DESCNTSTATUS_UNLOCKED;
482             break;
483         case 1U:
484             status = CANEXCEL_DESCNTSTATUS_LOCKED_HW;
485             break;
486         case 2U:
487             status = CANEXCEL_DESCNTSTATUS_LOCKED_SYS;
488             break;
489         default:
490             status = CANEXCEL_DESCNTSTATUS_INVALID;
491             break;
492     }
493     return status;
494 }
495 
496 /*FUNCTION**********************************************************************
497  *
498  * Function Name : CanXL_SetOperationMode
499  * Description   : Enable a CanEXCEL operation mode.
500  * This function will enable one of the modes listed in Canexcel_Ip_ModesType.
501  *
502  *END**************************************************************************/
CanXL_SetOperationMode(CANXL_SIC_Type * base,Canexcel_Ip_ModesType mode)503 void CanXL_SetOperationMode(CANXL_SIC_Type * base, Canexcel_Ip_ModesType mode)
504 {
505     switch (mode)
506     {
507         case CANEXCEL_NORMAL_MODE:
508             base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_LOM_MASK) | CANXL_SIC_BCFG2_LOM(0U);
509             base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_LPB_MASK) | CANXL_SIC_BCFG2_LPB(0U);
510             break;
511         case CANEXCEL_LISTEN_ONLY_MODE:
512             base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_LOM_MASK) | CANXL_SIC_BCFG2_LOM(1U);;
513             break;
514         case CANEXCEL_LOOPBACK_MODE:
515             base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_LPB_MASK) | CANXL_SIC_BCFG2_LPB(1U);
516             base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_LOM_MASK) | CANXL_SIC_BCFG2_LOM(0U);
517             base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_TMSE_MASK);
518             /* Enable Self Reception */
519             CanXL_SetSelfReception(base, TRUE);
520             break;
521         default:
522             /* Should not get here */
523             break;
524     }
525 }
526 
527 /*FUNCTION**********************************************************************
528  *
529  * Function Name : CanXL_DeserializeRevUint32
530  * Description   : Combine the user's data into a word
531  *END**************************************************************************/
CanXL_DeserializeRevUint32(const uint8 * Buffer)532 static inline uint32 CanXL_DeserializeRevUint32(const uint8 * Buffer)
533 {
534     uint32 value = 0;
535     /* the endianness type for the payload is litle-endian */
536     value |= (uint32)Buffer[3] << 24U;
537     value |= (uint32)Buffer[2] << 16U;
538     value |= (uint32)Buffer[1] << 8U;
539     value |= (uint32)Buffer[0];
540 
541     return value;
542 }
543 
544 /*FUNCTION**********************************************************************
545  *
546  * Function Name : CanXL_SetTxMsgBuffData
547  * Description   : Copy the data in the Tx Message Buffer location, based on the frame length
548  *END**************************************************************************/
CanXL_SetTxMsgBuffData(const Canexcel_Ip_DataInfoType * info,const uint8 * data,uint8 * MB)549 void CanXL_SetTxMsgBuffData(const Canexcel_Ip_DataInfoType * info, const uint8 * data, uint8 * MB)
550 {
551     volatile uint32 * Mb_Data_32 = (volatile uint32 *)MB;
552     const uint32 * MsgData_32 = (const uint32*)data;
553     uint16 idx;
554 
555     /* Check if the buffer address is word aligned */
556     if (((uint32)MsgData_32 & 0x3U) != 0U)
557     {
558         for (idx = 0u; idx< (info->dataLength & ~3U); idx +=4u)
559         {
560             Mb_Data_32[idx >> 2U] = CanXL_DeserializeRevUint32(&data[idx]);
561         }
562     }
563     else
564     {
565         for (idx = 0u; idx< (info->dataLength & ~3U); idx +=4u)
566         {
567             * Mb_Data_32 = * MsgData_32;
568             Mb_Data_32++;
569             MsgData_32++;
570         }
571     }
572 
573     for (; idx < info->dataLength; idx++)
574     {
575         MB[idx] =  data[idx];
576     }
577 
578     if (CANEXCEL_FD_FRAME == info->frame)
579     {
580         uint8 dlcValue = CAN_ComputeDLCValue((uint8)(info->dataLength));
581         uint8 calcValue = CAN_ComputePayloadSizeHw(dlcValue);
582         for (idx = info->dataLength; idx<calcValue; idx++)
583         {
584             MB[idx] = info->fd_padding;
585         }
586     }
587 }
588 /*FUNCTION**********************************************************************
589  *
590  * Function Name : CanXL_EnableInterrupts
591  * Description   : Enable configured Interrupts for CanExcel controller
592  *END**************************************************************************/
CanXL_EnableInterrupts(CANXL_SIC_Type * base)593 void CanXL_EnableInterrupts(CANXL_SIC_Type * base)
594 {
595     base->SYSMDHICFG = CANXL_SIC_SYSMDHICFG_TXDCFGHI0_0_MASK | CANXL_SIC_SYSMDHICFG_TXDCFGHI0_1_MASK | CANXL_SIC_SYSMDHICFG_TXDCFGHI0_2_MASK | CANXL_SIC_SYSMDHICFG_TXDCFGHI0_3_MASK |
596                        CANXL_SIC_SYSMDHICFG_RXDCFGHI0_0_MASK | CANXL_SIC_SYSMDHICFG_RXDCFGHI0_1_MASK | CANXL_SIC_SYSMDHICFG_RXDCFGHI0_2_MASK | CANXL_SIC_SYSMDHICFG_RXDCFGHI0_3_MASK;
597 }
598 /*FUNCTION**********************************************************************
599  *
600  * Function Name : CanXL_DisableInterrupts
601  * Description   : Disable configured Interrupts for CanExcel controller
602  *END**************************************************************************/
CanXL_DisableInterrupts(CANXL_SIC_Type * base)603 void CanXL_DisableInterrupts(CANXL_SIC_Type * base)
604 {
605     base->SYSMDHICFG = 0U;
606 }
607 /*FUNCTION**********************************************************************
608  *
609  * Function Name : CanXL_ResetImaskBuff (uses in Canexcel_Ip_Init function only)
610  * Description   : Reset Imask Buffers.
611  *
612  *END**************************************************************************/
CanXL_ResetImaskBuff(CANXL_GRP_CONTROL_Type * base)613 void CanXL_ResetImaskBuff(CANXL_GRP_CONTROL_Type * base)
614 {
615     uint8 ImaskCnt = 0U;
616     for (ImaskCnt = 0U; ImaskCnt < CANXL_GRP_CONTROL_MSGIMASKARRAY_COUNT; ImaskCnt++)
617     {
618         base->MSGIMASK[ImaskCnt] = 0U;
619     }
620 }
621 
622 /*FUNCTION**********************************************************************
623  *
624  * Function Name : CanXL_ConfigCtrlOptions
625  * Description   : configure controller depending on options
626  * note: Protocol exception should not be enabled with XL frame support.
627  *
628  *END**************************************************************************/
CanXL_ConfigCtrlOptions(CANXL_SIC_Type * base,uint32 u32Options)629 Canexcel_Ip_StatusType CanXL_ConfigCtrlOptions(CANXL_SIC_Type * base, uint32 u32Options)
630 {
631     Canexcel_Ip_StatusType status = CANEXCEL_STATUS_SUCCESS;
632     if (((base->BCFG2 & CANXL_SIC_BCFG2_XLEN_MASK) != 0U) && ((u32Options & CANXL_IP_PROTOCOL_EXCEPTION_U32) != 0U))
633     {
634         status = CANEXCEL_STATUS_ERROR;
635     }
636     else
637     {
638         /* Set protocol Exception, PEXCE must be cleared when BCFG2[XLEN] is set. */
639         if ((u32Options & CANXL_IP_PROTOCOL_EXCEPTION_U32) != 0U)
640         {
641             /* 1b - Protocol exception feature enabled */
642             base->BCFG2 |=  CANXL_SIC_BCFG2_PEXCE_MASK;
643         }
644         else
645         {
646             /* 0b - Protocol exception feature disabled */
647             base->BCFG2 &=  (~CANXL_SIC_BCFG2_PEXCE_MASK);
648         }
649     }
650     if ((u32Options & CANXL_IP_ROM_U32) != 0U)
651     {
652         base->BCFG2 |= CANXL_SIC_BCFG2_ROM_MASK;
653     }
654     else
655     {
656         base->BCFG2 &= (~CANXL_SIC_BCFG2_ROM_MASK);
657     }
658     if ((u32Options & CANXL_IP_TX_ERROR_RESPONSE_U32) != 0U)
659     {
660         base->BCFG2 |= CANXL_SIC_BCFG2_TFER_MASK;
661     }
662     else
663     {
664         base->BCFG2 &= (~CANXL_SIC_BCFG2_TFER_MASK);
665     }
666 
667     if ((u32Options & CANXL_IP_BUSOFF_RECOVERY_U32) != 0U)
668     {
669         /* 0b - Automatic bus-off recovery is enabled */
670         base->BCFG1 &= (~CANXL_SIC_BCFG1_ABRDIS_MASK);
671     }
672     else
673     {
674         /* 1b - Automatic bus-off recovery is disabled */
675         base->BCFG1 |= CANXL_SIC_BCFG1_ABRDIS_MASK;
676     }
677 
678     if ((u32Options & CANXL_IP_EDGE_FILTER_U32) != 0U)
679     {
680         /* 0b - Edge Filter is enabled */
681         base->BCFG2 &= (~CANXL_SIC_BCFG2_EDFLTDIS_MASK);
682     }
683     else
684     {
685         /* 1b - Edge Filter is disabled */
686         base->BCFG2 |= CANXL_SIC_BCFG2_EDFLTDIS_MASK;
687     }
688 
689     if ((u32Options & CANXL_IP_XLER_U32) != 0U)
690     {
691         base->BCFG2 |= CANXL_SIC_BCFG2_XLER_MASK;
692     }
693     else
694     {
695         base->BCFG2 &= (~CANXL_SIC_BCFG2_XLER_MASK);
696     }
697     return status;
698 }
699 /*FUNCTION**********************************************************************
700  *
701  * Function Name : CanXL_ConfigAccAddr
702  * Description   : Config the Acceptance Address Filter for RxFIFO
703  *END**************************************************************************/
CanXL_ConfigAccAddr(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterID_ADDR * filter,uint8 filtIdx)704 void CanXL_ConfigAccAddr(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterID_ADDR * filter, uint8 filtIdx)
705 {
706     uint32 mask = 1UL << (filtIdx%32U);
707     if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
708     {
709         /* Enable Range Filter operation */
710         base->AAMRCFG |= mask;
711     }
712     else
713     {    /* Enable Mask Filter operation */
714         base->AAMRCFG &= (~mask);
715     }
716     base->ADDRACPTFLTAR[filtIdx].AAFLTH = filter->idAddrFilterH;
717     base->ADDRACPTFLTAR[filtIdx].AAFLTL = filter->idAddrFilterL;
718 }
719 /*FUNCTION**********************************************************************
720  *
721  * Function Name : CanXL_ConfigIDFilter
722  * Description   : Config the ID Filter for RxFIFO
723  *END**************************************************************************/
CanXL_ConfigIDFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterID_ADDR * filter,uint8 filtIdx)724 void CanXL_ConfigIDFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterID_ADDR * filter, uint8 filtIdx)
725 {
726     uint32 mask = 1UL << (filtIdx%32U);
727     if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
728     {
729         /* Enable Range Filter operation */
730         base->ACPTIDMR |= mask;
731     }
732     else
733     {    /* Enable Mask Filter operation */
734         base->ACPTIDMR &= (~mask);
735     }
736     base->IDACPTFLTAR[filtIdx].IDAFLTH = filter->idAddrFilterH;
737     base->IDACPTFLTAR[filtIdx].IDAFLTL = filter->idAddrFilterL;
738 }
739 /*FUNCTION**********************************************************************
740  *
741  * Function Name : CanXL_ConfigSDUFilter
742  * Description   : Config the SDU Filter for RxFIFO
743  *END**************************************************************************/
CanXL_ConfigSDUFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter,uint8 filtIdx)744 void CanXL_ConfigSDUFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx)
745 {
746     uint32 mask = 1UL << (filtIdx%32U);
747     if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
748     {
749         /* Enable Range Filter operation */
750         base->SAMRCFG |= mask;
751     }
752     else
753     {    /* Enable Mask Filter operation */
754         base->SAMRCFG &= (~mask);
755     }
756     /* Div the register selection to 2, this register is composed form a pair of SDU filter */
757     base->SAFLT[filtIdx>>2U] = 0U;
758     if (0U == (filtIdx % 2U))
759     {
760         base->SAFLT[filtIdx>>1U] |= CANXL_RXFIFO_SAFLT_SDUa_H(filter->sduVcanFilterH) | CANXL_RXFIFO_SAFLT_SDUa_L(filter->sduVcanFilterL);
761     }
762     else
763     {
764         base->SAFLT[filtIdx>>1U] |= CANXL_RXFIFO_SAFLT_SDUb_H(filter->sduVcanFilterH) | CANXL_RXFIFO_SAFLT_SDUb_L(filter->sduVcanFilterL);
765     }
766 }
767 /*FUNCTION**********************************************************************
768  *
769  * Function Name : CanXL_ConfigVCANFilter
770  * Description   : Config the VCAN Filter for RxFIFO
771  *END**************************************************************************/
CanXL_ConfigVCANFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter,uint8 filtIdx)772 void CanXL_ConfigVCANFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx)
773 {
774     uint32 mask = 1UL << (filtIdx%32U);
775     if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
776     {
777         /* Enable Range Filter operation */
778         base->VAMRCFG |= mask;
779     }
780     else
781     {    /* Enable Mask Filter operation */
782         base->VAMRCFG &= (~mask);
783     }
784     /* Div the register selection to 2, this register is composed form a pair of SDU filter */
785     base->VAFLT[filtIdx>>2U] = 0U;
786     if (0U == (filtIdx % 2U))
787     {
788         base->VAFLT[filtIdx>>1U] |= CANXL_RXFIFO_VAFLT_VCANa_H(filter->sduVcanFilterH) | CANXL_RXFIFO_VAFLT_VCANa_L(filter->sduVcanFilterL);
789     }
790     else
791     {
792         base->VAFLT[filtIdx>>1U] |= CANXL_RXFIFO_VAFLT_VCANb_H(filter->sduVcanFilterH) | CANXL_RXFIFO_VAFLT_VCANb_L(filter->sduVcanFilterL);
793     }
794 }
795 /*FUNCTION**********************************************************************
796  *
797  * Function Name : CanXL_ConfigAccAddrFilterBank
798  * Description   : Config the Acceptance Address Filter as Accept for MessageDescriptor in FilterBanks
799  *END**************************************************************************/
CanXL_ConfigAccAddrFilterBank(CANXL_FILTER_BANK_Type * base,uint8 bank,const Canexcel_Ip_RxFifoFilterID_ADDR * filter,uint8 filtIdx)800 void CanXL_ConfigAccAddrFilterBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterID_ADDR * filter, uint8 filtIdx)
801 {
802     uint32 mask = 1UL << (filtIdx%32U);
803     typedef struct {
804         uint32 AAFLTx_L;
805         uint32 AAFLTx_H;
806     } AddrFilterAAType;
807     if (0U == bank)
808     {
809         /* MISRA Rule 11.3: When detected for casting integer pointers to integer pointers of different size: This operation is allowed, as it does not lead to incompatible alignment. */
810         volatile AddrFilterAAType * FilterStr = (volatile AddrFilterAAType *)&base->AAFLT0_0L;
811         if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
812         {
813             /* Enable Range Filter operation */
814             base->AAMRCFG0 |= mask;
815         }
816         else
817         {    /* Enable Mask Filter operation */
818             base->AAMRCFG0 &= (~mask);
819         }
820         FilterStr[filtIdx].AAFLTx_L = filter->idAddrFilterL;
821         FilterStr[filtIdx].AAFLTx_H = filter->idAddrFilterH;
822     }
823     else
824     {
825         volatile AddrFilterAAType * FilterStr = (volatile AddrFilterAAType *)&base->AAFLT1_0L;
826         if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
827         {
828             /* Enable Range Filter operation */
829             base->AAMRCFG1 |= mask;
830         }
831         else
832         {    /* Enable Mask Filter operation */
833             base->AAMRCFG1 &= (~mask);
834         }
835         FilterStr[filtIdx].AAFLTx_L = filter->idAddrFilterL;
836         FilterStr[filtIdx].AAFLTx_H = filter->idAddrFilterH;
837     }
838 }
839 /*FUNCTION**********************************************************************
840  *
841  * Function Name : CanXL_ConfigAccAddrRejectBank
842  * Description   : Config the Acceptance Address Filter as Reject for MessageDescriptor in FilterBanks
843  *END**************************************************************************/
CanXL_ConfigAccAddrRejectBank(CANXL_FILTER_BANK_Type * base,uint8 bank,const Canexcel_Ip_RxFifoFilterID_ADDR * filter,uint8 filtIdx)844 void CanXL_ConfigAccAddrRejectBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterID_ADDR * filter, uint8 filtIdx)
845 {
846     uint32 mask = 1UL << (filtIdx%32U);
847     typedef struct {
848         uint32 ARFLTx_L;
849         uint32 ARFLTx_H;
850     } AddrFilterType;
851     if (0U == bank)
852     {
853         volatile AddrFilterType * FilterStr = (volatile AddrFilterType *)&base->ARFLT0_0L;
854         if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
855         {
856             /* Enable Range Filter operation */
857             base->ARMRCFG0 |= mask;
858         }
859         else
860         {    /* Enable Mask Filter operation */
861             base->ARMRCFG0 &= (~mask);
862         }
863         FilterStr[filtIdx].ARFLTx_L = filter->idAddrFilterL;
864         FilterStr[filtIdx].ARFLTx_H = filter->idAddrFilterH;
865     }
866     else
867     {
868         volatile AddrFilterType * FilterStr = (volatile AddrFilterType *)&base->ARFLT1_0L;
869         if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
870         {
871             /* Enable Range Filter operation */
872             base->ARMRCFG1 |= mask;
873         }
874         else
875         {    /* Enable Mask Filter operation */
876             base->ARMRCFG1 &= (~mask);
877         }
878         FilterStr[filtIdx].ARFLTx_L = filter->idAddrFilterL;
879         FilterStr[filtIdx].ARFLTx_H = filter->idAddrFilterH;
880     }
881 }
882 /*FUNCTION**********************************************************************
883  *
884  * Function Name : CanXL_ConfigSDUFilterBank
885  * Description   : Config the SDU Filter as Accept for MessageDescriptor in FilterBanks
886  *END**************************************************************************/
CanXL_ConfigSDUFilterBank(CANXL_FILTER_BANK_Type * base,uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter,uint8 filtIdx)887 void CanXL_ConfigSDUFilterBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx)
888 {
889     uint32 mask = 1UL << (filtIdx%32U);
890     if (0U == bank)
891     {
892         if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
893         {
894             /* Enable Range Filter operation */
895             base->SAMRCFG0 |= mask;
896         }
897         else
898         {    /* Enable Mask Filter operation */
899             base->SAMRCFG0 &= (~mask);
900         }
901         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
902         volatile uint32 * SAFLT = (volatile uint32 *)&base->SAFLT0_0;
903         if (0U == (filtIdx % 2U))
904         {
905             SAFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_SAFLT0_0_SDUa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SAFLT0_0_SDUa_L(filter->sduVcanFilterL);
906         }
907         else
908         {
909             SAFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_SAFLT0_0_SDUb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SAFLT0_0_SDUb_L(filter->sduVcanFilterL);
910         }
911     }
912     else
913     {
914         if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
915         {
916             /* Enable Range Filter operation */
917             base->SAMRCFG1 |= mask;
918         }
919         else
920         {    /* Enable Mask Filter operation */
921             base->SAMRCFG1 &= (~mask);
922         }
923         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
924         volatile uint32 * SAFLT = (volatile uint32 *)&base->SAFLT1_0;
925         if (0U == (filtIdx % 2U))
926         {
927             SAFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_SAFLT1_0_SDUa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SAFLT1_0_SDUa_L(filter->sduVcanFilterL);
928         }
929         else
930         {
931             SAFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_SAFLT1_0_SDUb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SAFLT1_0_SDUb_L(filter->sduVcanFilterL);
932         }
933     }
934 }
935 /*FUNCTION**********************************************************************
936  *
937  * Function Name : CanXL_ConfigSDURejectBank
938  * Description   : Config the SDU Filter as Reject for MessageDescriptor in FilterBanks
939  *END**************************************************************************/
CanXL_ConfigSDURejectBank(CANXL_FILTER_BANK_Type * base,uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter,uint8 filtIdx)940 void CanXL_ConfigSDURejectBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx)
941 {
942     uint32 mask = 1UL << (filtIdx%32U);
943     if (0U == bank)
944     {
945         if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
946         {
947             /* Enable Range Filter operation */
948             base->SRMRCFG0 |= mask;
949         }
950         else
951         {    /* Enable Mask Filter operation */
952             base->SRMRCFG0 &= (~mask);
953         }
954         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
955         volatile uint32 * SRFLT = (volatile uint32 *)&base->SRFLT0_0;
956         if (0U == (filtIdx % 2U))
957         {
958             SRFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_SRFLT0_0_SDUa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SRFLT0_0_SDUa_L(filter->sduVcanFilterL);
959         }
960         else
961         {
962             SRFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_SRFLT0_0_SDUb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SRFLT0_0_SDUb_L(filter->sduVcanFilterL);
963         }
964     }
965     else
966     {
967         if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
968         {
969             /* Enable Range Filter operation */
970             base->SRMRCFG1 |= mask;
971         }
972         else
973         {    /* Enable Mask Filter operation */
974             base->SRMRCFG1 &= (~mask);
975         }
976         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
977         volatile uint32 * SRFLT = (volatile uint32 *)&base->SRFLT1_0;
978         if (0U == (filtIdx % 2U))
979         {
980             SRFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_SRFLT1_0_SDUa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SRFLT1_0_SDUa_L(filter->sduVcanFilterL);
981         }
982         else
983         {
984             SRFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_SRFLT1_0_SDUb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SRFLT1_0_SDUb_L(filter->sduVcanFilterL);
985         }
986     }
987 }
988 /*FUNCTION**********************************************************************
989  *
990  * Function Name : CanXL_ConfigVCANFilterBank
991  * Description   : Config the VCAN Filter as Accept for MessageDescriptor in FilterBanks
992  *END**************************************************************************/
CanXL_ConfigVCANFilterBank(CANXL_FILTER_BANK_Type * base,uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter,uint8 filtIdx)993 void CanXL_ConfigVCANFilterBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx)
994 {
995     uint32 mask = 1UL << (filtIdx%32U);
996     if (0U == bank)
997     {
998         if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
999         {
1000             /* Enable Range Filter operation */
1001             base->VAMRCFG0 |= mask;
1002         }
1003         else
1004         {    /* Enable Mask Filter operation */
1005             base->VAMRCFG0 &= (~mask);
1006         }
1007         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
1008         volatile uint32 * VAFLT = (volatile uint32 *)&base->VAFLT0_0;
1009         if (0U == (filtIdx % 2U))
1010         {
1011             VAFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_VAFLT0_0_VCANa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VAFLT0_0_VCANa_L(filter->sduVcanFilterL);
1012         }
1013         else
1014         {
1015             VAFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_VAFLT0_0_VCANb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VAFLT0_0_VCANb_L(filter->sduVcanFilterL);
1016         }
1017     }
1018     else
1019     {
1020         if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
1021         {
1022             /* Enable Range Filter operation */
1023             base->VAMRCFG1 |= mask;
1024         }
1025         else
1026         {    /* Enable Mask Filter operation */
1027             base->VAMRCFG1 &= (~mask);
1028         }
1029         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
1030         volatile uint32 * VAFLT = (volatile uint32 *)&base->VAFLT1_0;
1031         if (0U == (filtIdx % 2U))
1032         {
1033             VAFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_VAFLT1_0_VCANa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VAFLT1_0_VCANa_L(filter->sduVcanFilterL);
1034         }
1035         else
1036         {
1037             VAFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_VAFLT1_0_VCANb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VAFLT1_0_VCANb_L(filter->sduVcanFilterL);
1038         }
1039     }
1040 }
1041 /*FUNCTION**********************************************************************
1042  *
1043  * Function Name : CanXL_ConfigVCANRejectBank
1044  * Description   : Config the VCAN Filter as Reject for MessageDescriptor in FilterBanks
1045  *END**************************************************************************/
CanXL_ConfigVCANRejectBank(CANXL_FILTER_BANK_Type * base,uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter,uint8 filtIdx)1046 void CanXL_ConfigVCANRejectBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx)
1047 {
1048     uint32 mask = 1UL << (filtIdx%32U);
1049     if (0U == bank)
1050     {
1051         if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
1052         {
1053             /* Enable Range Filter operation */
1054             base->VRMRCFG0 |= mask;
1055         }
1056         else
1057         {    /* Enable Mask Filter operation */
1058             base->VRMRCFG0 &= (~mask);
1059         }
1060         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
1061         volatile uint32 * VRFLT = (volatile uint32 *)&base->VRFLT0_0;
1062         if (0U == (filtIdx % 2U))
1063         {
1064             VRFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_VRFLT0_0_VCANa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VRFLT0_0_VCANa_L(filter->sduVcanFilterL);
1065         }
1066         else
1067         {
1068             VRFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_VRFLT0_0_VCANb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VRFLT0_0_VCANb_L(filter->sduVcanFilterL);
1069         }
1070     }
1071     else
1072     {
1073         if (CANEXCEL_IP_RX_FIFO_RANGE_FILTER == filter->filterType)
1074         {
1075             /* Enable Range Filter operation */
1076             base->VRMRCFG1 |= mask;
1077         }
1078         else
1079         {    /* Enable Mask Filter operation */
1080             base->VRMRCFG1 &= (~mask);
1081         }
1082         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
1083         volatile uint32 * VRFLT = (volatile uint32 *)&base->VRFLT1_0;
1084         if (0U == (filtIdx % 2U))
1085         {
1086             VRFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_VRFLT1_0_VCANa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VRFLT1_0_VCANa_L(filter->sduVcanFilterL);
1087         }
1088         else
1089         {
1090             VRFLT[filtIdx>>1U] |= CANXL_FILTER_BANK_VRFLT1_0_VCANb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VRFLT1_0_VCANb_L(filter->sduVcanFilterL);
1091         }
1092     }
1093 }
1094 
1095 #define CAN_43_CANEXCEL_STOP_SEC_CODE
1096 #include "Can_43_CANEXCEL_MemMap.h"
1097 
1098 /** @} */
1099 
1100