1 /*******************************************************************************
2 * \file cy_trigmux.h
3 * \version 1.70
4 *
5 *  This file provides constants and parameter values for the Trigger multiplexer driver.
6 *
7 ********************************************************************************
8 * \copyright
9 * Copyright (c) (2016-2022), Cypress Semiconductor Corporation (an Infineon company) or
10 * an affiliate of Cypress Semiconductor Corporation.
11 *
12 * Licensed under the Apache License, Version 2.0 (the "License");
13 * you may not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 *     http://www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an "AS IS" BASIS,
20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 *******************************************************************************/
24 
25 /**
26 * \addtogroup group_trigmux
27 * \{
28 * The trigger multiplexer provides access to the multiplexer that selects a set
29 * of trigger output signals from different peripheral blocks to route them to the
30 * specific trigger input of another peripheral block.
31 *
32 * The functions and other declarations used in this driver are in cy_trigmux.h.
33 * You can include cy_pdl.h to get access to all functions
34 * and declarations in the PDL.
35 *
36 * The TrigMux driver is based on the trigger multiplexer's hardware block.
37 * The Trigger multiplexer block consists of multiple trigger multiplexers.
38 * These trigger multiplexers are grouped in trigger groups. All the trigger
39 * multiplexers in the trigger group share similar input options.
40 *
41 * For PERI_ver1:
42 * The trigger multiplexer groups are either reduction multiplexers or distribution
43 * multiplexers. The figure below illustrates a generic trigger multiplexer block
44 * implementation with a reduction multiplexer layer of N trigger groups and a
45 * distribution multiplexer layer of M trigger groups.
46 * \image html trigmux_architecture.png
47 * The reduction multiplexer groups have input options that are the trigger outputs
48 * coming from the different peripheral blocks and the reduction multiplexer groups
49 * route them to intermediate signals. The distribution multiplexer groups have input
50 * options from these intermediate signals and route them back to multiple peripheral
51 * blocks as their trigger inputs.
52 *
53 * For PERI_ver2:
54 * The trigger multiplexer groups structure is flat - all the groups are essentially
55 * distribution multiplexers (there are no any intermediate trigger signals), so the
56 * structure is simpler in comparison with PERI_ver1, however a bit less flexible.
57 * Additionally there are another type of trigger interconnections: one-to-one
58 * trigger lines. These are not multiplexers, only single trigger wires from/to
59 * the dedicated peripherals. Multiple groups of one-to-one trigger lines
60 * significantly improve the whole triggering interconnect system flexibility.
61 *
62 * The trigger architecture of the PSoC device is explained in the technical reference
63 * manual (TRM). Refer to the TRM to better understand the trigger multiplexer routing
64 * architecture available.
65 *
66 * \section group_trigmux_section_Configuration_Considerations Configuration Considerations
67 *
68 * For PERI_ver1:
69 * To route a trigger signal from one peripheral in the PSoC
70 * to another, the user must configure a reduction multiplexer and a distribution
71 * multiplexer. The \ref Cy_TrigMux_Connect is used to configure a trigger multiplexer connection.
72 * The user will need two calls of this API, one for the reduction multiplexer and another
73 * for the distribution multiplexer, to achieve the trigger connection from a source
74 * peripheral to a destination peripheral.
75 *
76 * For PERI_ver2:
77 * To route a trigger signal from one peripheral in the PSoC device to another, the user can configure
78 * either a trigger multiplexer using \ref Cy_TrigMux_Connect or a one-to-one trigger line
79 * using \ref Cy_TrigMux_Select. Only one function call is required to connect one peripheral
80 * to another (unlike for PERI_ver1).
81 *
82 * The Cy_TrigMux_Connect() function has two main parameters, inTrig and outTrig that
83 * refer to the input and output trigger lines connected using the multiplexer.
84 * These parameters are represented in the following format:<br>
85 * For PERI_ver1:
86 * \image html trigmux_parameter_30.png
87 * For PERI_ver2:
88 * \image html trigmux_parameter_30_2.png
89 * In addition, the \ref Cy_TrigMux_Connect function also has an invert and trigger type parameter.
90 * Refer to the API reference for a detailed description of this parameter.
91 * All the constants associated with the different trigger signals in the system
92 * (input and output) are defined as constants in the device configuration header file.
93 *
94 * For PERI_ver1:
95 * The constants for TrigMux in the device configuration header file are divided into four
96 * types based on the signal being input/output and being part of a reduction/distribution
97 * trigger multiplexer.
98 *
99 * The four types of the input/output parameters are:
100 * 1) The parameters for the reduction multiplexer's inputs (input signals of TrigMux);
101 * 2) The parameters for the reduction multiplexer's outputs (intermediate signals);
102 * 3) The parameters for the distribution multiplexer's inputs (intermediate signals);
103 * 4) The parameters for the distribution multiplexer's outputs (output signals of TrigMux).
104 *
105 * For PERI_ver2:
106 * There are two types of TrigMux signal definitions in the device configuration header:
107 * 1) The parameters for the trigger interconnection system input signals.
108 * 2) The parameters for the trigger interconnection system output signals.
109 * Also there are separate groups of trigger multiplexer input/outputs and groups of
110 * trigger one-to-one line input/outputs.
111 *
112 * Refer to the TRM for a more detailed description of this architecture and different options.
113 *
114 * The steps to connect one peripheral block to the other:
115 *
116 * For PERI_ver1:
117 * Step 1. Find the trigger group number in the Trigger Group Inputs section of the device
118 * configuration header file that corresponds to the output of the source peripheral block.
119 * For example, TRIG11_IN_TCPWM0_TR_OVERFLOW0 (see \ref group_trigmux_red_in_enums and the diagram
120 * at the top of this section) input of the Reduction multiplexers belongs to Trigger Group 11.
121 *
122 * Step 2. Find the trigger group number in the Trigger Group Outputs section of the device
123 * configuration header file that corresponds to the input of the destination peripheral block.
124 * For example, TRIG0_OUT_CPUSS_DW0_TR_IN0 (see \ref group_trigmux_dst_out_enums) output of the
125 * Distribution multiplexer belongs to Trigger Group 0.
126 *
127 * Step 3. Find the same trigger group number in the Trigger Group Inputs section of the
128 * device configuration header file that corresponds to the trigger group number found in
129 * Step 1. Select the Reduction multiplexer output that can be connected to the trigger group
130 * found in Step 2. For example, TRIG0_IN_TR_GROUP11_OUTPUT0 (see \ref group_trigmux_dst_in_enums)
131 * means that Reduction Multiplexer Output 0 of Trigger Group 11 can be connected to
132 * Trigger Group 0.
133 *
134 * Step 4. Find the same trigger group number in the Trigger Group Outputs section of the
135 * device configuration header file that corresponds to the trigger group number found in Step 2.
136 * Select the distribution multiplexer input that can be connected to the trigger group found
137 * in Step 1. For example, TRIG11_OUT_TR_GROUP0_INPUT9 (see \ref group_trigmux_red_out_enums)
138 * means that the Distribution Multiplexer Input 9 of Trigger Group 0 can be connected to the
139 * output of the Reduction multiplexer in Trigger Group 11 found in Step 3.
140 *
141 * Step 5. Call Cy_TrigMux_Connect() API twice: the first call - with the constants for the
142 * inTrig and outTrig parameters found in Steps 1 and Step 4, the second call - with the
143 * constants for the inTrig and outTrig parameters found in Steps 2 and Step 3.
144 * For example:
145 * \snippet trigmux/snippet/main.c snippet_Cy_TrigMux_PERI_ver1
146 *
147 * For PERI_ver2:
148 * Step 1. Find the trigger group number in the Trigger Group Inputs section of the device
149 * configuration header file that corresponds to the output of the source peripheral block.
150 * For example, TRIG_IN_MUX_0_TCPWM0_TR_OVERFLOW0 (see \ref group_trigmux_in_enums) TrigMux
151 * input belongs to Trigger Group 0. It is the same TCPWM0 counter 0 overflow output
152 * (as in the example for PERI_ver1).
153 *
154 * Step 2. Find the same trigger group number in the Trigger Group Outputs section of the
155 * device configuration header file that corresponds to the trigger group number found in
156 * Step 1. Select the TrigMux output that can be connected to the destination peripheral block.
157 * For example, TRIG_OUT_MUX_0_PDMA0_TR_IN0 (see \ref group_trigmux_out_enums) means that the
158 * trigger multiplexer Output 0 of Trigger Group 0 can be connected to the DW0 channel 0 trigger
159 * input (the same DMA channel as mentioned in the example for PERI_ver1).
160 *
161 * Step 3. Call Cy_TrigMux_Connect() API once:
162 * \snippet trigmux/snippet/main.c snippet_Cy_TrigMux_PERI_ver2
163 *
164 * \section group_trigmux_more_information More Information
165 * For more information on the TrigMux peripheral, refer to the technical reference manual (TRM).
166 *
167 * \section group_trigmux_Changelog Changelog
168 * <table class="doxtable">
169 *   <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
170 *   <tr>
171 *     <td>1.70</td>
172 *     <td>Updated \ref Cy_TrigMux_SwTrigger and \ref Cy_TrigMux_Connect APIs.</td>
173 *     <td>Performance enhancement and bug fixes.</td>
174 *   </tr>
175 *   <tr>
176 *     <td>1.60.1</td>
177 *     <td>Updated \ref Cy_TrigMux_SwTrigger API.</td>
178 *     <td>Coverity error fixes.</td>
179 *   </tr>
180 *   <tr>
181 *     <td>1.60</td>
182 *     <td>Updated Cy_TrigMux_SwTrigger API and added CY_TRIGMUX_INTRIG_MASK macro.</td>
183 *     <td>Support for CAT1D Devices added.</td>
184 *   </tr>
185 *   <tr>
186 *     <td>1.50</td>
187 *     <td>Updated driver to support the CAT1C family of devices.</td>
188 *     <td>Added new family of devices.</td>
189 *   </tr>
190 *   <tr>
191 *     <td>1.40</td>
192 *     <td>Fixed MISRA violation.</td>
193 *     <td>MISRA compliance.</td>
194 *   </tr>
195 *   <tr>
196 *     <td rowspan="2">1.30</td>
197 *     <td>Minor bug fixes.</td>
198 *     <td>Keep device specific changes under a compile time device flag.</td>
199 *   </tr>
200 *   <tr>
201 *     <td>Added new device support.</td>
202 *     <td>Added new family of device.</td>
203 *   </tr>
204 *   <tr>
205 *     <td>1.20.3</td>
206 *     <td>Minor documentation updates.</td>
207 *     <td>Removed MISRA 2004 compliance details and verified MISRA 2012 compliance.</td>
208 *   </tr>
209 *   <tr>
210 *     <td>1.20.2</td>
211 *     <td>Minor documentation updates.</td>
212 *     <td>Documentation enhancement.</td>
213 *   </tr>
214 *   <tr>
215 *     <td>1.20.1</td>
216 *     <td>Documentation is extended/improved.</td>
217 *     <td>Enhancement based on usability feedback.</td>
218 *   </tr>
219 *   <tr>
220 *     <td rowspan="3">1.20</td>
221 *     <td>Flattened the organization of the driver source code into the single source directory and the single include directory.</td>
222 *     <td>Driver library directory-structure simplification.</td>
223 *   </tr>
224 *   <tr>
225 *     <td>Added new API functions:
226 *         - \ref Cy_TrigMux_Select
227 *         - \ref Cy_TrigMux_Deselect
228 *         - \ref Cy_TrigMux_SetDebugFreeze
229 *
230 *         Modified the \ref Cy_TrigMux_SwTrigger API function logic.
231 *     </td>
232 *     <td>New devices support.</td>
233 *   </tr>
234 *   <tr>
235 *     <td>Added register access layer. Use register access macros instead
236 *         of direct register access using dereferenced pointers.</td>
237 *     <td>Makes register access device-independent, so that the PDL does
238 *         not need to be recompiled for each supported part number.</td>
239 *   </tr>
240 *   <tr>
241 *     <td>1.10.1</td>
242 *     <td>Renamed the internal macro in Cy_TrigMux_Connect()
243 *          function to CY_TRIGMUX_IS_TRIGTYPE_VALID.</td>
244 *     <td></td>
245 *   </tr>
246 *   <tr>
247 *     <td>1.10</td>
248 *     <td>The input/output bit in the trigLine parameter of the
249 *         Cy_TrigMux_SwTrigger() function is changed to 30.<br>
250 *         The invert parameter type is changed to bool.<br>
251 *         Added input parameter validation to the API functions.</td>
252 *     <td></td>
253 *   </tr>
254 *   <tr>
255 *     <td>1.0</td>
256 *     <td>Initial version</td>
257 *     <td></td>
258 *   </tr>
259 * </table>
260 *
261 * \defgroup group_trigmux_macros Macros
262 * \defgroup group_trigmux_functions Functions
263 * \defgroup group_trigmux_enums Enumerated Types
264 * \{
265 *  \defgroup group_trigmux_red_enums Reduction Trigger Mutiplexers
266 *  \{
267 *   \defgroup group_trigmux_red_in_enums Reduction Trigger Mutiplexer Inputs
268 *   \defgroup group_trigmux_red_out_enums Reduction Trigger Mutiplexer Outputs
269 *  \}
270 *  \defgroup group_trigmux_dst_enums Distribution Trigger Mutiplexers
271 *  \{
272 *   \defgroup group_trigmux_dst_in_enums Distribution Trigger Mutiplexer Inputs
273 *   \defgroup group_trigmux_dst_out_enums Distribution Trigger Mutiplexer Outputs
274 *  \}
275 *  \defgroup group_trigmux_in_enums Trigger Mutiplexer Inputs
276 *  \defgroup group_trigmux_out_enums Trigger Mutiplexer Outputs
277 *  \defgroup group_trigmux_1to1_enums One-To-One Trigger Lines
278 * \}
279 */
280 
281 #if !defined(CY_TRIGMUX_H)
282 #define CY_TRIGMUX_H
283 
284 #include "cy_device.h"
285 
286 #if defined (CY_IP_MXSPERI) || defined (CY_IP_MXPERI)
287 
288 #include "cy_syslib.h"
289 
290 #if defined(__cplusplus)
291 extern "C" {
292 #endif
293 CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 14.3', 4, \
294 'CY_PERI_V1 is not available for CAT1B devices.')
295 /******************************************************************************
296  * Macros
297  *****************************************************************************/
298 
299 /**
300 * \addtogroup group_trigmux_macros
301 * \{
302 */
303 
304 /** The driver major version */
305 #define CY_TRIGMUX_DRV_VERSION_MAJOR       1
306 
307 /** The driver minor version */
308 #define CY_TRIGMUX_DRV_VERSION_MINOR       70
309 
310 /** TRIGMUX PDL ID */
311 #define CY_TRIGMUX_ID                       CY_PDL_DRV_ID(0x33UL) /**< The trigger multiplexer driver identifier */
312 
313 /** Values for the cycles parameter in the \ref Cy_TrigMux_SwTrigger() function */
314 #define CY_TRIGGER_INFINITE                 (255UL) /**< The trigger will be active until the user clears it or a hardware deactivates it. */
315 #define CY_TRIGGER_DEACTIVATE               (0UL)   /**< Use this parameter value to deactivate the trigger. */
316 #define CY_TRIGGER_TWO_CYCLES               (2UL)   /**< The only valid cycles number value for PERI_ver2. */
317 
318 /** \} group_trigmux_macros */
319 
320 /** \cond BWC macros */
321 #define CY_TR_MUX_TR_INV_ENABLE            (0x01u)
322 #define CY_TR_MUX_TR_INV_DISABLE           (0x00u)
323 #define CY_TR_ACTIVATE_DISABLE             (0x00u)
324 #define CY_TR_ACTIVATE_ENABLE              (0x01u)
325 #define CY_TR_GROUP_MASK                   (0x0F00u)
326 #define CY_TR_MASK                         (0x007Fu)
327 #define CY_TR_GROUP_SHIFT                  (0x08u)
328 #define CY_TR_OUT_CTL_MASK                 (0x40000000uL)
329 #define CY_TR_OUT_CTL_SHIFT                (30u)
330 #define CY_TR_PARAM_MASK                   (CY_TR_OUT_CTL_MASK | CY_TR_GROUP_MASK | CY_TR_MASK)
331 #define CY_TR_CYCLES_MIN                   (0u)
332 #define CY_TR_CYCLES_MAX                   (255u)
333 /** \endcond */
334 
335 /** \cond INTERNAL */
336 #define CY_TRIGMUX_IS_TRIGTYPE_VALID(trigType)  (((trigType) == TRIGGER_TYPE_EDGE) || \
337                                                  ((trigType) == TRIGGER_TYPE_LEVEL))
338 
339 #define CY_TRIGMUX_V1_IS_CYCLES_VALID(cycles)   (CY_TRIGGER_INFINITE >= (cycles))
340 #define CY_TRIGMUX_V2_IS_CYCLES_VALID(cycles)   ((CY_TRIGGER_DEACTIVATE == (cycles)) || \
341                                                  (CY_TRIGGER_TWO_CYCLES == (cycles)) || \
342                                                  (CY_TRIGGER_INFINITE   == (cycles)))
343 #define CY_TRIGMUX_IS_CYCLES_VALID(cycles)      ((CY_PERI_V1 && CY_TRIGMUX_V1_IS_CYCLES_VALID(cycles)) || \
344                                                                 CY_TRIGMUX_V2_IS_CYCLES_VALID(cycles))
345 
346 # if defined (CY_IP_MXSPERI) && (CY_IP_MXSPERI_INSTANCES == 2)
347 #define CY_TRIGMUX_INTRIG_MASK                  (PERI_TR_CMD_GROUP_SEL_Msk | PERI_TR_GR_TR_OUT_CTL_TR_SEL_Msk | PERI_INSTANCE_1_IDENT_Msk)
348 #else
349 #define CY_TRIGMUX_INTRIG_MASK                  (PERI_TR_CMD_GROUP_SEL_Msk | PERI_TR_GR_TR_OUT_CTL_TR_SEL_Msk)
350 #endif /* (CY_IP_MXSPERI) && (CY_IP_MXSPERI_INSTANCES==2) */
351 #define CY_TRIGMUX_IS_INTRIG_VALID(inTrg)       (0UL == ((inTrg) & (uint32_t)~CY_TRIGMUX_INTRIG_MASK))
352 
353 # if defined (CY_IP_MXSPERI) && (CY_IP_MXSPERI_INSTANCES == 2)
354 #define CY_TRIGMUX_OUTTRIG_MASK                 (PERI_TR_CMD_OUT_SEL_Msk | PERI_TR_CMD_GROUP_SEL_Msk | CY_PERI_TR_CTL_SEL_Msk | PERI_INSTANCE_1_IDENT_Msk)
355 #else
356 #define CY_TRIGMUX_OUTTRIG_MASK                 (PERI_TR_CMD_OUT_SEL_Msk | PERI_TR_CMD_GROUP_SEL_Msk | CY_PERI_TR_CTL_SEL_Msk)
357 #endif /* (CY_IP_MXSPERI) && (CY_IP_MXSPERI_INSTANCES==2) */
358 #define CY_TRIGMUX_IS_OUTTRIG_VALID(outTrg)     ((0UL == ((outTrg) & (uint32_t)~CY_TRIGMUX_OUTTRIG_MASK)) && \
359                                                  (0UL != ((outTrg) & PERI_TR_CMD_OUT_SEL_Msk)))
360 
361 #define CY_TRIGMUX_ONETRIG_MASK                 (PERI_V2_TR_CMD_OUT_SEL_Msk | PERI_V2_TR_CMD_GROUP_SEL_Msk | CY_PERI_TR_CTL_SEL_Msk)
362 
363 #if defined (CY_IP_MXSPERI) || (CY_IP_MXPERI_VERSION >= 3)
364 #define CY_TRIGMUX_ONETRIG_GR_START                0x10UL /* trigger 1-1 group [16-31] */
365 #define CY_TRIGMUX_IS_ONETRIG_VALID(oneTrg)     ((0UL == ((oneTrg) & (uint32_t)~CY_TRIGMUX_ONETRIG_MASK)) && \
366                                                  (0UL != ((oneTrg) & PERI_V2_TR_CMD_OUT_SEL_Msk)) && \
367                                                  (0UL != (_FLD2VAL(PERI_V2_TR_CMD_GROUP_SEL, oneTrg) & (uint32_t)CY_TRIGMUX_ONETRIG_GR_START)))
368 #else
369 #define CY_TRIGMUX_IS_ONETRIG_VALID(oneTrg)     ((0UL == ((oneTrg) & (uint32_t)~CY_TRIGMUX_ONETRIG_MASK)) && \
370                                                  (0UL != ((oneTrg) & PERI_V2_TR_CMD_OUT_SEL_Msk)) && \
371                                                  (0UL != ((oneTrg) & (PERI_V2_TR_CMD_GROUP_SEL_Msk & (uint32_t)~PERI_TR_CMD_GROUP_SEL_Msk))))
372 #endif
373 
374 # if defined (CY_IP_MXSPERI) && (CY_IP_MXSPERI_INSTANCES == 2U)
375 #define CY_TRIGMUX_TRIGLINE_MASK                (PERI_TR_CMD_OUT_SEL_Msk | CY_PERI_TR_CMD_GROUP_SEL_Msk | CY_PERI_TR_CTL_SEL_Msk | PERI_INSTANCE_1_IDENT_Msk)
376 #else
377 #define CY_TRIGMUX_TRIGLINE_MASK                (PERI_TR_CMD_OUT_SEL_Msk | CY_PERI_TR_CMD_GROUP_SEL_Msk | CY_PERI_TR_CTL_SEL_Msk)
378 #endif /* (CY_IP_MXSPERI) && (CY_IP_MXSPERI_INSTANCES == 2U) */
379 #define CY_TRIGMUX_IS_TRIGLINE_VALID(trgLn)     (0U == ((trgLn) & (uint32_t)~CY_TRIGMUX_TRIGLINE_MASK))
380 
381 #if defined (CY_IP_MXSPERI) && (CY_IP_MXSPERI_INSTANCES == 2U)
382 #define CY_TRIGMUX1_TR_CTL(outTrig)   (PERI1_TR_GR_TR_CTL(_FLD2VAL(CY_PERI_TR_CMD_GROUP_SEL, outTrig), _FLD2VAL(CY_PERI_TR_CTL_SEL, outTrig)))
383 #endif
384 #define CY_TRIGMUX_TR_CTL(outTrig)    (PERI_TR_GR_TR_CTL(_FLD2VAL(CY_PERI_TR_CMD_GROUP_SEL, outTrig), _FLD2VAL(CY_PERI_TR_CTL_SEL, outTrig)))
385 
386 /** \endcond */
387 
388 /**
389 * \addtogroup group_trigmux_enums
390 * \{
391 */
392 
393 /******************************************************************************
394  * Enumerations
395  *****************************************************************************/
396 
397 /** The TRIGMUX error codes. */
398 typedef enum
399 {
400     CY_TRIGMUX_SUCCESS = 0x0UL,                                             /**< Successful */
401     CY_TRIGMUX_BAD_PARAM = CY_TRIGMUX_ID | CY_PDL_STATUS_ERROR | 0x1UL,     /**< One or more invalid parameters */
402     CY_TRIGMUX_INVALID_STATE = CY_TRIGMUX_ID | CY_PDL_STATUS_ERROR | 0x2UL  /**< Operation not set up or is in an improper state */
403 } cy_en_trigmux_status_t;
404 
405 /** \} group_trigmux_enums */
406 
407 /**
408 * \addtogroup group_trigmux_functions
409 * \{
410 */
411 
412 cy_en_trigmux_status_t Cy_TrigMux_Connect(uint32_t inTrig, uint32_t outTrig, bool invert, en_trig_type_t trigType);
413 __STATIC_INLINE cy_en_trigmux_status_t Cy_TrigMux_SwTrigger(uint32_t trigLine, uint32_t cycles);
414 cy_en_trigmux_status_t Cy_TrigMux_Select(uint32_t outTrig, bool invert, en_trig_type_t trigType);
415 cy_en_trigmux_status_t Cy_TrigMux_Deselect(uint32_t outTrig);
416 cy_en_trigmux_status_t Cy_TrigMux_SetDebugFreeze(uint32_t outTrig, bool enable);
417 
418 /** \} group_trigmux_functions */
419 
420 
421 /*******************************************************************************
422 * Function Name: Cy_TrigMux_SwTrigger
423 ****************************************************************************//**
424 *
425 * This function generates a software trigger on an input trigger line.
426 * All output triggers connected to this input trigger will be triggered.
427 * The function also verifies that there is no activated trigger before
428 * generating another activation.
429 *
430 * \param trigLine
431 * The input of the trigger mux.
432 * - Bit 30 represents if the signal is an input/output. When this bit is set,
433 *   the trigger activation is for an output trigger from the trigger multiplexer.
434 *   When this bit is reset, the trigger activation is for an input trigger to
435 *   the trigger multiplexer.<br>
436 * - For PERI_ver1 Bits 11:8 represent the trigger group selection.<br>
437 * - For PERI_ver2 Bits 12:8 represent the trigger group selection.<br>
438 * In case of output trigger line (bit 30 is set):<br>
439 * For PERI_ver1:
440 * - Bits 6:0 select the output trigger number in the trigger group.<br>
441 * For PERI_ver2:
442 * - Bits 7:0 select the output trigger number in the trigger group.<br>
443 * In case of input trigger line (bit 30 is unset):
444 * - Bits 7:0 select the input trigger signal for the trigger multiplexer.
445 *
446 * \param cycles
447 *  The number of "Clk_Peri" cycles during which the trigger remains activated.<br>
448 *  For PERI_ver1: The valid range of cycles is 1 ... 254.<br>
449 *  For PERI_ver2: The only valid value of cycles is 2 (\ref CY_TRIGGER_TWO_CYCLES).<br>
450 *  Also there are special values (supported with both PERI_ver1 and PERI_ver2):
451 *   - CY_TRIGGER_INFINITE - trigger remains activated until the user deactivates it by
452 *   calling this function with CY_TRIGGER_DEACTIVATE parameter.
453 *   - CY_TRIGGER_DEACTIVATE - this is used to deactivate the trigger activated by
454 *   calling this function with CY_TRIGGER_INFINITE parameter.
455 *
456 * \return status:
457 * - CY_TRIGMUX_SUCCESS: The trigger is successfully activated/deactivated.
458 * - CY_TRIGMUX_INVALID_STATE: The trigger is already activated/not active.
459 * - CY_TRIGMUX_BAD_PARAM: Some parameter is invalid.
460 *
461 * \funcusage
462 * \snippet trigmux/snippet/main.c snippet_Cy_TrigMux_SwTrigger
463 *
464 *******************************************************************************/
Cy_TrigMux_SwTrigger(uint32_t trigLine,uint32_t cycles)465 __STATIC_INLINE cy_en_trigmux_status_t Cy_TrigMux_SwTrigger(uint32_t trigLine, uint32_t cycles)
466 {
467     cy_en_trigmux_status_t retVal = CY_TRIGMUX_INVALID_STATE;
468 
469     CY_ASSERT_L2(CY_TRIGMUX_IS_TRIGLINE_VALID(trigLine));
470     CY_ASSERT_L2(CY_TRIGMUX_IS_CYCLES_VALID(cycles));
471 
472     if (CY_TRIGGER_DEACTIVATE != cycles)
473     {
474         /* Activate the trigger if it is not in the active state. */
475         if (PERI_TR_CMD_ACTIVATE_Msk != (PERI_TR_CMD & PERI_TR_CMD_ACTIVATE_Msk))
476         {
477 
478             uint32_t trCmd = (trigLine & (PERI_TR_CMD_TR_SEL_Msk |
479                                           PERI_TR_CMD_OUT_SEL_Msk |
480                                        CY_PERI_TR_CMD_GROUP_SEL_Msk)) |
481                                           PERI_TR_CMD_ACTIVATE_Msk;
482 
483             retVal = CY_TRIGMUX_SUCCESS;
484 
485             if (CY_PERI_V1 != 0U) /* mxperi_v1 */
486             {
487                 PERI_TR_CMD = trCmd | _VAL2FLD(PERI_TR_CMD_COUNT, cycles);
488             }
489             else if (CY_TRIGGER_TWO_CYCLES == cycles) /* mxperi_v2 or later, 2 cycles pulse */
490             {
491 #if defined(CY_IP_MXSPERI_INSTANCES) && (CY_IP_MXSPERI_INSTANCES == 2U)
492                 if (0UL != (trigLine & PERI_INSTANCE_1_IDENT_Msk))
493                 {
494                     PERI1_TR_CMD = trCmd | PERI_V2_TR_CMD_TR_EDGE_Msk;
495                 }
496                 else
497                 {
498                     PERI_TR_CMD = trCmd | PERI_V2_TR_CMD_TR_EDGE_Msk;
499                 }
500 #else
501                 PERI_TR_CMD = trCmd | PERI_V2_TR_CMD_TR_EDGE_Msk;
502 #endif
503             }
504             else if (CY_TRIGGER_INFINITE == cycles) /* mxperi_v2 or later, infinite activating */
505             {
506                 PERI_TR_CMD = trCmd;
507             }
508             else /* mxperi_v2 or later, invalid cycles value */
509             {
510                 retVal = CY_TRIGMUX_BAD_PARAM;
511             }
512         }
513     }
514     else
515     {
516         /* Forcibly deactivate the trigger if it is in the active state. */
517         if (PERI_TR_CMD_ACTIVATE_Msk == (PERI_TR_CMD & PERI_TR_CMD_ACTIVATE_Msk))
518         {
519             PERI_TR_CMD = 0UL;
520 
521             retVal = CY_TRIGMUX_SUCCESS;
522         }
523     }
524 
525     return retVal;
526 }
527 CY_MISRA_BLOCK_END('MISRA C-2012 Rule 14.3')
528 
529 #if defined(__cplusplus)
530 }
531 #endif
532 
533 #endif /* CY_IP_MXSPERI, CY_IP_MXPERI */
534 
535 #endif /* CY_TRIGMUX_H */
536 
537 /** \} group_trigmux */
538 
539 /* [] END OF FILE */
540