1 /***************************************************************************//**
2 * \file cy_sysanalog.h
3 * \version 2.10
4 *
5 * Header file for the system level analog reference driver.
6 *
7 ********************************************************************************
8 * \copyright
9 * Copyright 2017-2020 Cypress Semiconductor Corporation
10 * SPDX-License-Identifier: Apache-2.0
11 *
12 * Licensed under the Apache License, Version 2.0 (the "License");
13 * you may not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * http://www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an "AS IS" BASIS,
20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 *******************************************************************************/
24
25 /**
26 * \addtogroup group_sysanalog
27 * \{
28 *
29 * This driver provides an interface for configuring the Analog Reference (AREF),
30 * Low Power Oscillator (LpOsc), Deep Sleep Clock and Timer blocks
31 * and querying the INTR_CAUSE register of the Programmable Analog SubSystem (PASS) hardware block.
32 *
33 * The functions and other declarations used in this driver are in cy_sysanalog.h.
34 * You can include cy_pdl.h to get access to all functions
35 * and declarations in the PDL.
36 *
37 * \section group_pass_structure PASS block structure
38 *
39 * \image html passv2_diagram.png
40 * \image latex passv2_diagram.png
41 *
42 * The Programmable Analog SubSystem (PASS) hardware block contains a set of analog
43 * subblocks such as AREF, CTB, SAR, analog routing switches and others.
44 * In order to provide a firmware interface to PASS, subblocks are united into groups,
45 * which have their own drivers: SysAnalog, \ref group_ctb "CTB" and
46 * \ref group_sar "SAR".
47 *
48 * \section group_sysanalog_features SysAnalog Features Description
49 *
50 * SysAnalog driver includes the following features:
51 * - \ref group_sysanalog_aref
52 * - \ref group_sysanalog_lposc (Available only for PASS_ver2.)
53 * - \ref group_sysanalog_dpslp (Available only for PASS_ver2.)
54 * - \ref group_sysanalog_timer (Available only for PASS_ver2.)
55 *
56 * The following sections describe how to initialize driver features:
57 * - \ref group_sysanalog_aref_usage_init
58 * - \ref group_sysanalog_deepsleepinit
59 *
60 * \section group_sysanalog_aref AREF
61 *
62 * The AREF block has the following features:
63 *
64 * - Generates a voltage reference (VREF) from one of three sources:
65 * - Local 1.2 V reference (<b>low noise, optimized for analog performance</b>)
66 * - Reference from the SRSS (high noise, not recommended for analog performance)
67 * - An external pin
68 * - Generates a 1 uA "zero dependency to absolute temperature" (IZTAT) current reference
69 * that is independent of temperature variations. It can come from one of two sources:
70 * - Local reference (<b>low noise, optimized for analog performance</b>)
71 * - Reference from the SRSS (high noise, not recommended for analog performance)
72 * - Generates a "proportional to absolute temperature" (IPTAT) current reference
73 * - Option to enable local references in Deep Sleep mode
74 *
75 * The locally generated references are the recommended sources for blocks in the PASS because
76 * they have tighter accuracy, temperature stability, and lower noise than the SRSS references.
77 * The SRSS references can be used to save power if the low accuracy and higher noise can be tolerated.
78 *
79 * \image html aref_block_diagram.png
80 * \image latex aref_block_diagram.png
81 *
82 * The outputs of the AREF are consumed by multiple blocks in the PASS and by the CapSense (CSDv2) block.
83 * In some cases, these blocks have the option of using the references from the AREF. This selection would be
84 * in the respective drivers for these blocks. In some cases, these blocks require the references from the
85 * AREF to function.
86 *
87 * <table class="doxtable">
88 * <tr><th>AREF Output</th><th>\ref group_sar "SAR"</th><th>\ref group_ctdac "CTDAC"</th><th>\ref group_ctb "CTB"</th><th>CSDv2</th></tr>
89 * <tr>
90 * <td>VREF</td>
91 * <td>optional</td>
92 * <td>optional</td>
93 * <td>--</td>
94 * <td>optional</td>
95 * </tr>
96 * <tr>
97 * <td>IZTAT</td>
98 * <td><b>required</b></td>
99 * <td>--</td>
100 * <td>optional</td>
101 * <td>optional</td>
102 * </tr>
103 * <tr>
104 * <td>IPTAT</td>
105 * <td>--</td>
106 * <td>--</td>
107 * <td><b>required</b></td>
108 * <td>--</td>
109 * </tr>
110 * </table>
111 *
112 * This driver provides a function to query the INTR_CAUSE register of the PASS.
113 * There are two interrupts in the PASS:
114 *
115 * -# one global interrupt for all CTBs (up to 4)
116 * -# one global interrupt for all CTDACs (up to 4)
117 *
118 * Because the interrupts are global, the INTR_CAUSE register is needed to query which hardware instance
119 * triggered the interrupt.
120 *
121 * \subsection group_sysanalog_aref_usage_init AREF Configuration
122 *
123 * To configure the AREF, call \ref Cy_SysAnalog_Init and provide a pointer
124 * to the configuration structure, \ref cy_stc_sysanalog_config_t. Three predefined structures
125 * are provided in this driver to cover a majority of use cases:
126 *
127 * - \ref Cy_SysAnalog_Fast_Local <b>(recommended for analog performance)</b>
128 * - \ref Cy_SysAnalog_Fast_SRSS
129 * - \ref Cy_SysAnalog_Fast_External
130 *
131 * After initialization, call \ref Cy_SysAnalog_Enable to enable the hardware.
132 *
133 * ### Deep Sleep Operation
134 *
135 * The AREF current and voltage references can be enabled to operate in Deep Sleep mode
136 * with \ref Cy_SysAnalog_SetDeepSleepMode. There are four options for Deep Sleep operation:
137 *
138 * - \ref CY_SYSANALOG_DEEPSLEEP_DISABLE : Disable AREF IP block
139 * - \ref CY_SYSANALOG_DEEPSLEEP_IPTAT_1 : Enable IPTAT generator for fast wakeup from Deep Sleep mode. IPTAT outputs for CTBs are disabled.
140 * - \ref CY_SYSANALOG_DEEPSLEEP_IPTAT_2 : Enable IPTAT generator and IPTAT outputs for CTB
141 * - \ref CY_SYSANALOG_DEEPSLEEP_IPTAT_IZTAT_VREF : Enable all generators and outputs: IPTAT, IZTAT, and VREF
142 *
143 * Recall that the CTB requires the IPTAT reference. For the CTB to operate at the 1 uA current mode in Deep Sleep mode,
144 * the AREF must be enabled for \ref CY_SYSANALOG_DEEPSLEEP_IPTAT_IZTAT_VREF. For the CTB to operate at the 100 nA
145 * current mode in Deep Sleep mode, the AREF must be enabled for \ref CY_SYSANALOG_DEEPSLEEP_IPTAT_2 minimum. In this
146 * lower current mode, the AREF IPTAT must be redirected to the CTB IZTAT. See the high level function \ref
147 * Cy_CTB_SetCurrentMode in the CTB PDL driver.
148 *
149 * If the CTDAC is configured to use the VREF in Deep Sleep mode, the AREF must be enabled for \ref CY_SYSANALOG_DEEPSLEEP_IPTAT_IZTAT_VREF.
150 *
151 * \note
152 * The SRSS references are not available to the AREF in Deep Sleep mode. When operating
153 * in Deep Sleep mode, the local or external references must be selected.
154 *
155 * \section group_sysanalog_lposc Low Power Oscillator
156 * Features:
157 * - Internal PASS_ver2 8MHz oscillator which does not require any external components.
158 * - Can work in Deep Sleep power mode.
159 * - Can be used as a clock source for the Deep Sleep Clock.
160 *
161 * Low Power Oscillator clocking mode is configured by
162 * cy_stc_sysanalog_deep_sleep_config_t::lpOscDsMode configuration structure item, which
163 * should be passed as a parameter to \ref Cy_SysAnalog_DeepSleepInit function.
164 * See \ref group_sysanalog_functions_lposc for other Low Power Oscillator control functions.
165 *
166 * \section group_sysanalog_dpslp Deep Sleep Clock
167 * Features:
168 * - Internal PASS_ver2 deep sleep capable clock selector/divider
169 * - Can be used as clock source for CTB pump, SAR ADC and Timer
170 *
171 * Deep Sleep clock is configurable by cy_stc_sysanalog_deep_sleep_config_t::dsClkSource and
172 * cy_stc_sysanalog_deep_sleep_config_t::dsClkdivider configuration structure items,
173 * which should be passed as a parameter to \ref Cy_SysAnalog_DeepSleepInit function.
174 *
175 * \section group_sysanalog_timer Timer
176 * Features:
177 * - Internal PASS_ver2 16-bit down counting timer
178 * - Can be used to trigger one or few SAR ADCs
179 * - Can be clocked from
180 * - Peripheral Clock (CLK_PERI),
181 * - Low Frequency Clock (CLK_LF)
182 * - Deep Sleep Clock
183 * - If clocked from Deep Sleep Clock, timer can be used to trigger SAR ADC scans
184 * in Deep Sleep power mode.
185 *
186 * Timer is configurable by cy_stc_sysanalog_deep_sleep_config_t::timerClock
187 * and cy_stc_sysanalog_deep_sleep_config_t::timerPeriod configuration structure items,
188 * which should be passed as a parameter to \ref Cy_SysAnalog_DeepSleepInit function.
189 * Also see \ref group_sysanalog_functions_timer for other Timer configuration and control functions.
190 *
191 * \section group_sysanalog_deepsleepinit Low Power Oscillator, Deep Sleep Clock and Timer Configuration
192 * To configure Low Power Oscillator, Deep Sleep Clock and Timer blocks,
193 * call \ref Cy_SysAnalog_DeepSleepInit function and provide pointer to PASS block and pointer
194 * to the \ref cy_stc_sysanalog_deep_sleep_config_t configuration structure. In order to start
195 * Low Power Oscillator and Timer, call corresponding enable functions:
196 *
197 * \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_INIT_DS
198 *
199 * \section group_sysanalog_more_information More Information
200 *
201 * For more information on the AREF, Deep Sleep Clock and Timer, refer to the technical reference manual (TRM).
202 *
203 * \section group_sysanalog_changelog Changelog
204 * <table class="doxtable">
205 * <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
206 * <tr>
207 * <td>2.10</td>
208 * <td>The CY_SYSANALOG_STARTUP_NORMAL and Cy_SysAnalog_SetArefMode are deprecated.
209 * The HW is anyways initialized with the CY_SYSANALOG_STARTUP_FAST.</td>
210 * <td>User experience enhancement.</td>
211 * </tr>
212 * <tr>
213 * <td>2.0</td>
214 * <td>Added new features: LPOSC, DSCLK, TIMER.</td>
215 * <td>New silicon family support.</td>
216 * </tr>
217 * <tr>
218 * <td>1.10.1</td>
219 * <td>Minor documentation updates.</td>
220 * <td>Documentation enhancement.</td>
221 * </tr>
222 * <tr>
223 * <td rowspan="2">1.10</td>
224 * <td>Flattened the organization of the driver source code into the single
225 * source directory and the single include directory.
226 * </td>
227 * <td>Driver library directory-structure simplification.</td>
228 * </tr>
229 * <tr>
230 * <td>Added register access layer. Use register access macros instead
231 * of direct register access using dereferenced pointers.</td>
232 * <td>Makes register access device-independent, so that the PDL does
233 * not need to be recompiled for each supported part number.</td>
234 * </tr>
235 * <tr>
236 * <td>1.0</td>
237 * <td>Initial version</td>
238 * <td></td>
239 * </tr>
240 * </table>
241 *
242 * \defgroup group_sysanalog_macros Macros
243 * \defgroup group_sysanalog_functions Functions
244 * \{
245 * \defgroup group_sysanalog_functions_lposc Low Power Oscillator Functions
246 * \defgroup group_sysanalog_functions_timer Timer Functions
247 * \}
248 * \defgroup group_sysanalog_globals Global Variables
249 * \defgroup group_sysanalog_data_structures Data Structures
250 * \defgroup group_sysanalog_enums Enumerated Types
251 */
252
253 #if !defined(CY_SYSANALOG_H)
254 #define CY_SYSANALOG_H
255
256 #include "cy_device.h"
257
258 #ifdef CY_IP_MXS40PASS
259
260 #include <stdint.h>
261 #include <stdbool.h>
262 #include <stddef.h>
263
264 #include "cy_syslib.h"
265 #include "cy_syspm.h"
266
267 #if defined(__cplusplus)
268 extern "C" {
269 #endif
270
271 CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 11.3', 19, \
272 'PASS_Type will typecast to either PASS_V1_Type or PASS_V2_Type but not both on PDL initialization based on the target device at compile time.')
273
274 /** \addtogroup group_sysanalog_macros
275 * \{
276 */
277
278 /** Driver major version */
279 #define CY_SYSANALOG_DRV_VERSION_MAJOR 2
280
281 /** Driver minor version */
282 #define CY_SYSANALOG_DRV_VERSION_MINOR 10
283
284 /** PASS driver identifier */
285 #define CY_SYSANALOG_ID CY_PDL_DRV_ID(0x17u)
286
287
288 /** \cond INTERNAL */
289 #define CY_SYSANALOG_DEINIT (0UL) /**< De-init value for PASS register */
290 #define CY_SYSANALOG_DEFAULT_BIAS_SCALE (1UL << PASS_AREF_AREF_CTRL_AREF_BIAS_SCALE_Pos) /**< Default AREF bias current scale of 250 nA */
291
292 /**< Macros for conditions used in CY_ASSERT calls */
293 #define CY_SYSANALOG_DEEPSLEEP(deepSleep) (((deepSleep) == CY_SYSANALOG_DEEPSLEEP_DISABLE) \
294 || ((deepSleep) == CY_SYSANALOG_DEEPSLEEP_IPTAT_1) \
295 || ((deepSleep) == CY_SYSANALOG_DEEPSLEEP_IPTAT_2) \
296 || ((deepSleep) == CY_SYSANALOG_DEEPSLEEP_IPTAT_IZTAT_VREF))
297 #define CY_SYSANALOG_VREF(vref) (((vref) == CY_SYSANALOG_VREF_SOURCE_SRSS) \
298 || ((vref) == CY_SYSANALOG_VREF_SOURCE_LOCAL_1_2V) \
299 || ((vref) == CY_SYSANALOG_VREF_SOURCE_EXTERNAL))
300 #define CY_SYSANALOG_IZTAT(iztat) (((iztat) == CY_SYSANALOG_IZTAT_SOURCE_SRSS) || ((iztat) == CY_SYSANALOG_IZTAT_SOURCE_LOCAL))
301
302 /** \endcond */
303
304 /** \} group_sysanalog_macros */
305
306 /** \addtogroup group_sysanalog_enums
307 * \{
308 */
309
310 /******************************************************************************
311 * Enumerations
312 *****************************************************************************/
313
314 /** The AREF status/error code definitions */
315 typedef enum
316 {
317 CY_SYSANALOG_SUCCESS = 0x00UL, /**< Successful */
318 CY_SYSANALOG_BAD_PARAM = CY_SYSANALOG_ID | CY_PDL_STATUS_ERROR | 0x01UL, /**< Invalid input parameters */
319 CY_SYSANALOG_UNSUPPORTED = CY_SYSANALOG_ID | CY_PDL_STATUS_ERROR | 0x02UL /**< Unsupported feature */
320 }cy_en_sysanalog_status_t;
321
322 /** \cond Deprecated, left here for BWC, HW is anyways initialized with CY_SYSANALOG_STARTUP_FAST */
323 typedef enum
324 {
325 CY_SYSANALOG_STARTUP_NORMAL = 0UL,
326 CY_SYSANALOG_STARTUP_FAST = 1UL << PASS_AREF_AREF_CTRL_AREF_MODE_Pos
327 }cy_en_sysanalog_startup_t;
328 /** \endcond */
329
330 /** AREF voltage reference sources
331 *
332 * The voltage reference can come from three sources:
333 * - the locally generated 1.2 V reference
334 * - the SRSS which provides a 0.8 V reference (not available in Deep Sleep mode)
335 * - an external device pin
336 */
337 typedef enum
338 {
339 CY_SYSANALOG_VREF_SOURCE_SRSS = 0UL, /**< Use 0.8 V Vref from SRSS. Low accuracy high noise source that is not intended for analog subsystems. */
340 CY_SYSANALOG_VREF_SOURCE_LOCAL_1_2V = 1UL << PASS_AREF_AREF_CTRL_VREF_SEL_Pos, /**< Use locally generated 1.2 V Vref */
341 CY_SYSANALOG_VREF_SOURCE_EXTERNAL = 2UL << PASS_AREF_AREF_CTRL_VREF_SEL_Pos /**< Use externally supplied Vref */
342 }cy_en_sysanalog_vref_source_t;
343
344
345 /** AREF IZTAT sources
346 *
347 * The AREF generates a 1 uA "Zero dependency To Absolute Temperature" (IZTAT) current reference
348 * that is independent of temperature variations. It can come from one of two sources:
349 * - Local reference (1 uA)
350 * - Reference from the SRSS (250 nA that is gained by 4. Not available in Deep Sleep mode)
351 */
352 typedef enum
353 {
354 CY_SYSANALOG_IZTAT_SOURCE_SRSS = 0UL, /**< Use 250 nA IZTAT from SRSS and gain by 4 to output 1 uA*/
355 CY_SYSANALOG_IZTAT_SOURCE_LOCAL = 1UL << PASS_AREF_AREF_CTRL_IZTAT_SEL_Pos /**< Use locally generated 1 uA IZTAT */
356 }cy_en_sysanalog_iztat_source_t;
357
358 /** AREF Deep Sleep mode
359 *
360 * Configure what part of the AREF block is enabled in Deep Sleep mode.
361 * - Disable AREF IP block
362 * - Enable IPTAT generator for fast wakeup from Deep Sleep mode.
363 * IPTAT outputs for CTBs are disabled.
364 * - Enable IPTAT generator and IPTAT outputs for CTB
365 * - Enable all generators and outputs: IPTAT, IZTAT, and VREF
366 */
367 typedef enum
368 {
369 CY_SYSANALOG_DEEPSLEEP_DISABLE = 0UL, /**< Disable AREF IP block */
370 CY_SYSANALOG_DEEPSLEEP_IPTAT_1 = PASS_AREF_AREF_CTRL_DEEPSLEEP_ON_Msk | \
371 (1UL << PASS_AREF_AREF_CTRL_DEEPSLEEP_MODE_Pos), /**< Enable IPTAT generator for fast wakeup from Deep Sleep mode
372 IPTAT outputs for CTBs are disabled. */
373 CY_SYSANALOG_DEEPSLEEP_IPTAT_2 = PASS_AREF_AREF_CTRL_DEEPSLEEP_ON_Msk | \
374 (2UL << PASS_AREF_AREF_CTRL_DEEPSLEEP_MODE_Pos), /**< Enable IPTAT generator and IPTAT outputs for CTB */
375 CY_SYSANALOG_DEEPSLEEP_IPTAT_IZTAT_VREF = PASS_AREF_AREF_CTRL_DEEPSLEEP_ON_Msk | \
376 (3UL << PASS_AREF_AREF_CTRL_DEEPSLEEP_MODE_Pos) /**< Enable all generators and outputs: IPTAT, IZTAT, and VREF */
377 }cy_en_sysanalog_deep_sleep_t;
378
379 /** Interrupt cause sources
380 *
381 * Depending on the device, there may be interrupts from these PASS blocks:
382 * -# CTDAC (up to 4 instances)
383 * -# CTB(m) (up to 4 instances)
384 * -# SAR (up to 4 instances)
385 * -# FIFO (up to 4 instances)
386 *
387 * A device could potentially have more than one instance of CTB or CTDAC blocks.
388 * To find out which instance caused the interrupt, call
389 * \ref Cy_SysAnalog_GetIntrCauseExtended and compare the returned result with one of
390 * these enum values.
391 */
392 typedef enum
393 {
394 CY_SYSANALOG_INTR_CAUSE_CTB0 = PASS_INTR_CAUSE_CTB0_INT_Msk, /**< Interrupt cause mask for CTB0 */
395 CY_SYSANALOG_INTR_CAUSE_CTB1 = PASS_INTR_CAUSE_CTB1_INT_Msk, /**< Interrupt cause mask for CTB1 */
396 CY_SYSANALOG_INTR_CAUSE_CTB2 = PASS_INTR_CAUSE_CTB2_INT_Msk, /**< Interrupt cause mask for CTB2 */
397 CY_SYSANALOG_INTR_CAUSE_CTB3 = PASS_INTR_CAUSE_CTB3_INT_Msk, /**< Interrupt cause mask for CTB3 */
398 CY_SYSANALOG_INTR_CAUSE_CTDAC0 = PASS_INTR_CAUSE_CTDAC0_INT_Msk, /**< Interrupt cause mask for CTDAC0 */
399 CY_SYSANALOG_INTR_CAUSE_CTDAC1 = PASS_INTR_CAUSE_CTDAC1_INT_Msk, /**< Interrupt cause mask for CTDAC1 */
400 CY_SYSANALOG_INTR_CAUSE_CTDAC2 = PASS_INTR_CAUSE_CTDAC2_INT_Msk, /**< Interrupt cause mask for CTDAC2 */
401 CY_SYSANALOG_INTR_CAUSE_CTDAC3 = PASS_INTR_CAUSE_CTDAC3_INT_Msk, /**< Interrupt cause mask for CTDAC3 */
402 CY_SYSANALOG_INTR_CAUSE_SAR0 = PASS_V2_INTR_CAUSE_SAR0_INT_Msk, /**< Interrupt cause mask for SAR0. Available only for PASS_ver2. */
403 CY_SYSANALOG_INTR_CAUSE_SAR1 = PASS_V2_INTR_CAUSE_SAR1_INT_Msk, /**< Interrupt cause mask for SAR1. Available only for PASS_ver2. */
404 CY_SYSANALOG_INTR_CAUSE_SAR2 = PASS_V2_INTR_CAUSE_SAR2_INT_Msk, /**< Interrupt cause mask for SAR2. Available only for PASS_ver2. */
405 CY_SYSANALOG_INTR_CAUSE_SAR3 = PASS_V2_INTR_CAUSE_SAR3_INT_Msk, /**< Interrupt cause mask for SAR3. Available only for PASS_ver2. */
406 CY_SYSANALOG_INTR_CAUSE_FIFO0 = PASS_V2_INTR_CAUSE_FIFO0_INT_Msk, /**< Interrupt cause mask for FIFO0. Available only for PASS_ver2. */
407 CY_SYSANALOG_INTR_CAUSE_FIFO1 = PASS_V2_INTR_CAUSE_FIFO1_INT_Msk, /**< Interrupt cause mask for FIFO1. Available only for PASS_ver2. */
408 CY_SYSANALOG_INTR_CAUSE_FIFO2 = PASS_V2_INTR_CAUSE_FIFO2_INT_Msk, /**< Interrupt cause mask for FIFO2. Available only for PASS_ver2. */
409 CY_SYSANALOG_INTR_CAUSE_FIFO3 = PASS_V2_INTR_CAUSE_FIFO3_INT_Msk, /**< Interrupt cause mask for FIFO3. Available only for PASS_ver2. */
410 }cy_en_sysanalog_intr_cause_t;
411
412 /** Deep Sleep Clock selection
413 *
414 * Specifies Deep Sleep Clock source:
415 * - DSCLK is set to LPOSC
416 * - DSCLK is set to CLK_MF
417 */
418 typedef enum
419 {
420 CY_SYSANALOG_DEEPSLEEP_SRC_LPOSC = 0UL, /**< DSCLK is set to LPOSC */
421 CY_SYSANALOG_DEEPSLEEP_SRC_CLK_MF = 1UL /**< DSCLK is set to CLK_MF */
422 }cy_en_sysanalog_deep_sleep_clock_sel_t;
423
424 /** Deep Sleep clock divider
425 *
426 * Specifies Deep Sleep Clock divider.
427 * - Transparent mode, feed through selected clock source w/o dividing
428 * - Divide selected clock source by 2
429 * - Divide selected clock source by 4
430 * - Divide selected clock source by 8
431 * - Divide selected clock source by 16
432 */
433 typedef enum
434 {
435 CY_SYSANALOG_DEEPSLEEP_CLK_NO_DIV = 0UL, /**< Transparent mode, feed through selected clock source w/o dividing */
436 CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_2 = 1UL, /**< Divide selected clock source by 2 */
437 CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_4 = 2UL, /**< Divide selected clock source by 4 */
438 CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_8 = 3UL, /**< Divide selected clock source by 8 */
439 CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_16 = 4UL, /**< Divide selected clock source by 16 */
440 }cy_en_sysanalog_deep_sleep_clock_div_t;
441
442 /** Low Power Oscillator (LPOSC) modes
443 *
444 * Configures Low Power Oscillator mode in Deep Sleep.
445 * - LPOSC enabled by TIMER trigger
446 * - LPOSC always on in Deep Sleep
447 */
448 typedef enum
449 {
450 CY_SYSANALOG_LPOSC_DUTY_CYCLED = 0UL, /**< LPOSC enabled by TIMER trigger */
451 CY_SYSANALOG_LPOSC_ALWAYS_ON = 1UL /**< LPOSC always on in Deep Sleep */
452 }cy_en_sysanalog_lposc_deep_sleep_mode_t;
453
454 /** Timer clock */
455 typedef enum
456 {
457 CY_SYSANALOG_TIMER_CLK_PERI = 0UL, /**< Timer clocked from CLK_PERI */
458 CY_SYSANALOG_TIMER_CLK_DEEPSLEEP = 1UL, /**< Timer clocked from CLK_DPSLP */
459 CY_SYSANALOG_TIMER_CLK_LF = 2UL /**< Timer clocked from CLK_LF */
460 }cy_en_sysanalog_timer_clock_t;
461
462 /** \} group_sysanalog_enums */
463
464 /** \addtogroup group_sysanalog_data_structures
465 * \{
466 */
467
468 /***************************************
469 * Configuration Structures
470 ***************************************/
471
472 /** Structure to configure the entire AREF block */
473 typedef struct
474 {
475 /** \cond Deprecated, left here for BWC, HW is anyways initialized with CY_SYSANALOG_STARTUP_FAST */
476 cy_en_sysanalog_startup_t startup; /**< AREF normal or fast start */
477 /** \endcond */
478 cy_en_sysanalog_iztat_source_t iztat; /**< AREF 1uA IZTAT source: Local or SRSS */
479 cy_en_sysanalog_vref_source_t vref; /**< AREF Vref: Local, SRSS, or external pin */
480 cy_en_sysanalog_deep_sleep_t deepSleep; /**< AREF Deep Sleep mode */
481 }cy_stc_sysanalog_config_t;
482
483 /** Structure to configure PASS_ver2 Deep Sleep features such as Low Power Oscillator, Deep Sleep Clock, Timer */
484 typedef struct
485 {
486 cy_en_sysanalog_lposc_deep_sleep_mode_t lpOscDsMode; /**< Low Power Oscillator Deep Sleep mode */
487 cy_en_sysanalog_deep_sleep_clock_sel_t dsClkSource; /**< Deep Sleep Clock source select */
488 cy_en_sysanalog_deep_sleep_clock_div_t dsClkdivider; /**< Deep Sleep Clock divider */
489 cy_en_sysanalog_timer_clock_t timerClock; /**< Timer Clock source select */
490 uint32_t timerPeriod; /**< Timer period. Range 1..65536 */
491 }cy_stc_sysanalog_deep_sleep_config_t;
492
493 /** \} group_sysanalog_data_structures */
494
495 /** \addtogroup group_sysanalog_globals
496 * \{
497 */
498 /***************************************
499 * Global Constants
500 ***************************************/
501
502 /** Configure the AREF to use the local Vref and local IZTAT. Can be used with \ref Cy_SysAnalog_Init.
503 * Other configuration options are set to:
504 * - .startup = CY_PASS_AREF_MODE_FAST
505 * - .deepSleep = CY_PASS_AREF_DEEPSLEEP_DISABLE
506 */
507 extern const cy_stc_sysanalog_config_t Cy_SysAnalog_Fast_Local;
508
509 /** Configure the AREF to use the SRSS Vref and SRSS IZTAT. Can be used with \ref Cy_SysAnalog_Init.
510 * Other configuration options are set to:
511 * - .startup = CY_PASS_AREF_MODE_FAST
512 * - .deepSleep = CY_PASS_AREF_DEEPSLEEP_DISABLE
513 */
514 extern const cy_stc_sysanalog_config_t Cy_SysAnalog_Fast_SRSS;
515
516 /** Configure the AREF to use the external Vref and local IZTAT. Can be used with \ref Cy_SysAnalog_Init.
517 * Other configuration options are set to:
518 * - .startup = CY_PASS_AREF_MODE_FAST
519 * - .deepSleep = CY_PASS_AREF_DEEPSLEEP_DISABLE
520 */
521 extern const cy_stc_sysanalog_config_t Cy_SysAnalog_Fast_External;
522
523 /** \} group_sysanalog_globals */
524
525 /** \addtogroup group_sysanalog_functions
526 * \{
527 */
528
529 /***************************************
530 * Function Prototypes
531 ***************************************/
532
533 cy_en_sysanalog_status_t Cy_SysAnalog_Init(const cy_stc_sysanalog_config_t * config);
534 __STATIC_INLINE void Cy_SysAnalog_DeInit(void);
535 __STATIC_INLINE uint32_t Cy_SysAnalog_GetIntrCauseExtended(const PASS_Type * base);
536 __STATIC_INLINE void Cy_SysAnalog_SetDeepSleepMode(cy_en_sysanalog_deep_sleep_t deepSleep);
537 __STATIC_INLINE cy_en_sysanalog_deep_sleep_t Cy_SysAnalog_GetDeepSleepMode(void);
538 __STATIC_INLINE void Cy_SysAnalog_Enable(void);
539 __STATIC_INLINE void Cy_SysAnalog_Disable(void);
540 __STATIC_INLINE void Cy_SysAnalog_VrefSelect(cy_en_sysanalog_vref_source_t vref);
541 __STATIC_INLINE void Cy_SysAnalog_IztatSelect(cy_en_sysanalog_iztat_source_t iztat);
542 cy_en_sysanalog_status_t Cy_SysAnalog_DeepSleepInit(PASS_Type * base, const cy_stc_sysanalog_deep_sleep_config_t * config);
543
544 /**
545 * \addtogroup group_sysanalog_functions_lposc
546 * \{
547 */
548 __STATIC_INLINE void Cy_SysAnalog_LpOscEnable(PASS_Type * base);
549 __STATIC_INLINE void Cy_SysAnalog_LpOscDisable(PASS_Type * base);
550 /** \} */
551
552
553 /**
554 * \addtogroup group_sysanalog_functions_timer
555 * \{
556 */
557 __STATIC_INLINE void Cy_SysAnalog_TimerEnable(PASS_Type * base);
558 __STATIC_INLINE void Cy_SysAnalog_TimerDisable(PASS_Type * base);
559 __STATIC_INLINE void Cy_SysAnalog_TimerSetPeriod(PASS_Type * base, uint32_t periodVal);
560 __STATIC_INLINE uint32_t Cy_SysAnalog_TimerGetPeriod(const PASS_Type * base);
561 /** \} */
562
563
564 /*******************************************************************************
565 * Function Name: Cy_SysAnalog_DeInit
566 ****************************************************************************//**
567 *
568 * Reset AREF configuration back to power on reset defaults.
569 *
570 * \return None
571 *
572 * \funcusage
573 *
574 * \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_DEINIT
575 *
576 *******************************************************************************/
Cy_SysAnalog_DeInit(void)577 __STATIC_INLINE void Cy_SysAnalog_DeInit(void)
578 {
579 PASS_AREF_AREF_CTRL = CY_SYSANALOG_DEINIT;
580 }
581
582 /*******************************************************************************
583 * Function Name: Cy_SysAnalog_GetIntrCauseExtended
584 ****************************************************************************//**
585 *
586 * Return the PASS interrupt cause register value.
587 *
588 * Depending on the device, there may be interrupts from these PASS blocks:
589 * -# CTDAC (up to 4 instances)
590 * -# CTB(m) (up to 4 instances)
591 * -# SAR (up to 4 instances)
592 * -# FIFO (up to 4 instances)
593 *
594 * Compare this returned value with the enum values in \ref cy_en_sysanalog_intr_cause_t
595 * to determine which block caused/triggered the interrupt.
596 *
597 * \return uint32_t
598 * Interrupt cause register value.
599 *
600 * \funcusage
601 *
602 * \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_GET_INTR_CAUSE
603 *
604 *******************************************************************************/
Cy_SysAnalog_GetIntrCauseExtended(const PASS_Type * base)605 __STATIC_INLINE uint32_t Cy_SysAnalog_GetIntrCauseExtended(const PASS_Type * base)
606 {
607 return PASS_INTR_CAUSE(base);
608 }
609
610 /** \cond **********************************************************************
611 * Deprecated legacy function - do not use for new designs.
612 * Use Cy_SysAnalog_GetIntrCauseExtended instead.
613 *******************************************************************************/
Cy_SysAnalog_GetIntrCause(void)614 __STATIC_INLINE uint32_t Cy_SysAnalog_GetIntrCause(void)
615 {
616 uint32_t retVal = 0UL;
617
618 if (CY_PASS_V1)
619 {
620 retVal = ((uint32_t)CY_SYSANALOG_INTR_CAUSE_CTB0 |
621 (uint32_t)CY_SYSANALOG_INTR_CAUSE_CTB1 |
622 (uint32_t)CY_SYSANALOG_INTR_CAUSE_CTB2 |
623 (uint32_t)CY_SYSANALOG_INTR_CAUSE_CTB3 |
624 (uint32_t)CY_SYSANALOG_INTR_CAUSE_CTDAC0 |
625 (uint32_t)CY_SYSANALOG_INTR_CAUSE_CTDAC1 |
626 (uint32_t)CY_SYSANALOG_INTR_CAUSE_CTDAC2 |
627 (uint32_t)CY_SYSANALOG_INTR_CAUSE_CTDAC3) &
628 Cy_SysAnalog_GetIntrCauseExtended(CY_PASS_ADDR);
629 }
630
631 return (retVal);
632 } /** \endcond */
633
634 /*******************************************************************************
635 * Function Name: Cy_SysAnalog_SetDeepSleepMode
636 ****************************************************************************//**
637 *
638 * Set what parts of the AREF are enabled in Deep Sleep mode.
639 * - Disable AREF IP block
640 * - Enable IPTAT generator for fast wakeup from Deep Sleep mode.
641 * IPTAT outputs for CTBs are disabled.
642 * - Enable IPTAT generator and IPTAT outputs for CTB
643 * - Enable all generators and outputs: IPTAT, IZTAT, and VREF
644 *
645 * \note
646 * The SRSS references are not available to the AREF in Deep Sleep mode. When operating
647 * in Deep Sleep mode, the local or external references must be selected.
648 *
649 * \param deepSleep
650 * Select a value from \ref cy_en_sysanalog_deep_sleep_t
651 *
652 * \return None
653 *
654 * \funcusage
655 *
656 * \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_SET_DEEPSLEEP_MODE
657 *
658 *******************************************************************************/
Cy_SysAnalog_SetDeepSleepMode(cy_en_sysanalog_deep_sleep_t deepSleep)659 __STATIC_INLINE void Cy_SysAnalog_SetDeepSleepMode(cy_en_sysanalog_deep_sleep_t deepSleep)
660 {
661 CY_ASSERT_L3(CY_SYSANALOG_DEEPSLEEP(deepSleep));
662
663 PASS_AREF_AREF_CTRL = (PASS_AREF_AREF_CTRL & ~(PASS_AREF_AREF_CTRL_DEEPSLEEP_ON_Msk | PASS_AREF_AREF_CTRL_DEEPSLEEP_MODE_Msk)) | \
664 (uint32_t) deepSleep;
665 }
666
667 /*******************************************************************************
668 * Function Name: Cy_SysAnalog_GetDeepSleepMode
669 ****************************************************************************//**
670 *
671 * Return Deep Sleep mode configuration as set by \ref Cy_SysAnalog_SetDeepSleepMode
672 *
673 * \return
674 * A value from \ref cy_en_sysanalog_deep_sleep_t
675 *
676 * \funcusage
677 *
678 * \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_GET_DEEPSLEEP_MODE
679 *
680 *******************************************************************************/
Cy_SysAnalog_GetDeepSleepMode(void)681 __STATIC_INLINE cy_en_sysanalog_deep_sleep_t Cy_SysAnalog_GetDeepSleepMode(void)
682 {
683 return (cy_en_sysanalog_deep_sleep_t) (uint32_t) (PASS_AREF_AREF_CTRL & (PASS_AREF_AREF_CTRL_DEEPSLEEP_ON_Msk | PASS_AREF_AREF_CTRL_DEEPSLEEP_MODE_Msk));
684 }
685
686 /*******************************************************************************
687 * Function Name: Cy_SysAnalog_Enable
688 ****************************************************************************//**
689 *
690 * Enable the AREF hardware block.
691 *
692 * \return None
693 *
694 * \funcusage
695 *
696 * \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_ENABLE
697 *
698 *******************************************************************************/
Cy_SysAnalog_Enable(void)699 __STATIC_INLINE void Cy_SysAnalog_Enable(void)
700 {
701 PASS_AREF_AREF_CTRL |= PASS_AREF_AREF_CTRL_ENABLED_Msk;
702 }
703
704 /*******************************************************************************
705 * Function Name: Cy_SysAnalog_Disable
706 ****************************************************************************//**
707 *
708 * Disable the AREF hardware block.
709 *
710 * \return None
711 *
712 * \funcusage
713 *
714 * \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_DISABLE
715 *
716 *******************************************************************************/
Cy_SysAnalog_Disable(void)717 __STATIC_INLINE void Cy_SysAnalog_Disable(void)
718 {
719 PASS_AREF_AREF_CTRL &= ~PASS_AREF_AREF_CTRL_ENABLED_Msk;
720 }
721
722
723 /** \cond Deprecated, left here for BWC, always writes CY_SYSANALOG_STARTUP_FAST into the register */
Cy_SysAnalog_SetArefMode(cy_en_sysanalog_startup_t startup)724 __STATIC_INLINE void Cy_SysAnalog_SetArefMode(cy_en_sysanalog_startup_t startup)
725 {
726 CY_UNUSED_PARAMETER(startup);
727 PASS_AREF_AREF_CTRL |= (uint32_t)CY_SYSANALOG_STARTUP_FAST;
728 }
729 /** \endcond */
730
731
732 /*******************************************************************************
733 * Function Name: Cy_SysAnalog_VrefSelect
734 ****************************************************************************//**
735 *
736 * Set the source for the Vref. The Vref can come from:
737 * - the locally generated 1.2 V reference
738 * - the SRSS, which provides a 0.8 V reference (not available to the AREF in Deep Sleep mode)
739 * - an external device pin
740 *
741 * The locally generated reference has higher accuracy, more stability over temperature,
742 * and lower noise than the SRSS reference.
743 *
744 * \param vref
745 * Value from enum \ref cy_en_sysanalog_vref_source_t
746 *
747 * \return None
748 *
749 * \funcusage
750 *
751 * \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_VREF_SELECT
752 *
753 *******************************************************************************/
Cy_SysAnalog_VrefSelect(cy_en_sysanalog_vref_source_t vref)754 __STATIC_INLINE void Cy_SysAnalog_VrefSelect(cy_en_sysanalog_vref_source_t vref)
755 {
756 CY_ASSERT_L3(CY_SYSANALOG_VREF(vref));
757
758 PASS_AREF_AREF_CTRL = (PASS_AREF_AREF_CTRL & ~PASS_AREF_AREF_CTRL_VREF_SEL_Msk) | (uint32_t) vref;
759 }
760
761 /*******************************************************************************
762 * Function Name: Cy_SysAnalog_IztatSelect
763 ****************************************************************************//**
764 *
765 * Set the source for the 1 uA IZTAT. The IZTAT can come from:
766 * - the locally generated IZTAT
767 * - the SRSS (not available to the AREF in Deep Sleep mode)
768 *
769 * The locally generated reference has higher accuracy, more stability over temperature,
770 * and lower noise than the SRSS reference.
771 *
772 * \param iztat
773 * Value from enum \ref cy_en_sysanalog_iztat_source_t
774 *
775 * \return None
776 *
777 * \funcusage
778 *
779 * \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_IZTAT_SELECT
780 *
781 *******************************************************************************/
Cy_SysAnalog_IztatSelect(cy_en_sysanalog_iztat_source_t iztat)782 __STATIC_INLINE void Cy_SysAnalog_IztatSelect(cy_en_sysanalog_iztat_source_t iztat)
783 {
784 CY_ASSERT_L3(CY_SYSANALOG_IZTAT(iztat));
785
786 PASS_AREF_AREF_CTRL = (PASS_AREF_AREF_CTRL & ~PASS_AREF_AREF_CTRL_IZTAT_SEL_Msk) | (uint32_t) iztat;
787 }
788
789 /**
790 * \addtogroup group_sysanalog_functions_lposc
791 * \{
792 */
793
794 /*******************************************************************************
795 * Function Name: Cy_SysAnalog_LpOscEnable
796 ****************************************************************************//**
797 *
798 * Enables Low Power Oscillator in configured by \ref Cy_SysAnalog_DeepSleepInit
799 * mode.
800 *
801 * \param base Pointer to the PASS register structure.
802 *
803 * \return None
804 *
805 * \funcusage \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_LPOSC_ENABLE
806 *
807 *******************************************************************************/
Cy_SysAnalog_LpOscEnable(PASS_Type * base)808 __STATIC_INLINE void Cy_SysAnalog_LpOscEnable(PASS_Type * base)
809 {
810 if(!CY_PASS_V1)
811 {
812 PASS_LPOSC_CTRL(base) = PASS_LPOSC_V2_CTRL_ENABLED_Msk;
813 }
814 else
815 {
816 /* Low Power Oscillator feature is not supported on PASS_ver1 IP block. */
817 CY_ASSERT_L1(false);
818 }
819 }
820
821
822 /*******************************************************************************
823 * Function Name: Cy_SysAnalog_LpOscDisable
824 ****************************************************************************//**
825 *
826 * Disables the Low Power Oscillator.
827 *
828 * \param base Pointer to the PASS register structure.
829 *
830 * \return None
831 *
832 * \funcusage \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_LPOSC_DISABLE
833 *
834 *******************************************************************************/
Cy_SysAnalog_LpOscDisable(PASS_Type * base)835 __STATIC_INLINE void Cy_SysAnalog_LpOscDisable(PASS_Type * base)
836 {
837 if(!CY_PASS_V1)
838 {
839 PASS_LPOSC_CTRL(base) = 0UL;
840 }
841 }
842
843 /** \} */
844
845 /**
846 * \addtogroup group_sysanalog_functions_timer
847 * \{
848 */
849
850 /*******************************************************************************
851 * Function Name: Cy_SysAnalog_TimerEnable
852 ****************************************************************************//**
853 *
854 * Enable the analog subsystem timer in configured by
855 * \ref Cy_SysAnalog_DeepSleepInit mode.
856 *
857 * \param base Pointer to the PASS register structure.
858 *
859 * \return None
860 *
861 * \funcusage \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_TIMER
862 *
863 *******************************************************************************/
Cy_SysAnalog_TimerEnable(PASS_Type * base)864 __STATIC_INLINE void Cy_SysAnalog_TimerEnable(PASS_Type * base)
865 {
866 if (!CY_PASS_V1)
867 {
868 PASS_TIMER_CTRL(base) = PASS_TIMER_V2_CTRL_ENABLED_Msk;
869 }
870 }
871
872
873 /*******************************************************************************
874 * Function Name: Cy_SysAnalog_TimerDisable
875 ****************************************************************************//**
876 *
877 * Disable the analog subsystem timer.
878 *
879 * \param base Pointer to the PASS register structure.
880 *
881 * \return None
882 *
883 * \funcusage \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_TIMER
884 *
885 *******************************************************************************/
Cy_SysAnalog_TimerDisable(PASS_Type * base)886 __STATIC_INLINE void Cy_SysAnalog_TimerDisable(PASS_Type * base)
887 {
888 if (!CY_PASS_V1)
889 {
890 PASS_TIMER_CTRL(base) = 0UL;
891 }
892 }
893
894 /*******************************************************************************
895 * Function Name: Cy_SysAnalog_TimerSetPeriod
896 ****************************************************************************//**
897 *
898 * Sets the analog subsystem timer period.
899 *
900 * \param base Pointer to the PASS register structure.
901 *
902 * \param periodVal the period value. Actual timer period equals periodVal + 1.
903 *
904 * \return None
905 *
906 * \funcusage \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_TIMER_PERIOD
907 *
908 *******************************************************************************/
Cy_SysAnalog_TimerSetPeriod(PASS_Type * base,uint32_t periodVal)909 __STATIC_INLINE void Cy_SysAnalog_TimerSetPeriod(PASS_Type * base, uint32_t periodVal)
910 {
911 if (!CY_PASS_V1)
912 {
913 PASS_TIMER_PERIOD(base) = _VAL2FLD(PASS_TIMER_V2_PERIOD_PER_VAL, periodVal);
914 }
915 else
916 {
917 /* Timer feature is not supported on PASS_ver1 IP block. */
918 CY_ASSERT_L1(false);
919 }
920 }
921
922 /*******************************************************************************
923 * Function Name: Cy_SysAnalog_TimerGetPeriod
924 ****************************************************************************//**
925 *
926 * Returns the analog subsystem timer period.
927 *
928 * \param base Pointer to the PASS register structure.
929 *
930 * \return the Timer period value.
931 *
932 * \funcusage \snippet sysanalog/snippet/main.c SYSANA_SNIPPET_TIMER_PERIOD
933 *
934 *******************************************************************************/
Cy_SysAnalog_TimerGetPeriod(const PASS_Type * base)935 __STATIC_INLINE uint32_t Cy_SysAnalog_TimerGetPeriod(const PASS_Type * base)
936 {
937 uint32_t period = 0UL;
938 if (!CY_PASS_V1)
939 {
940 period = _FLD2VAL(PASS_TIMER_V2_PERIOD_PER_VAL, PASS_TIMER_PERIOD(base));
941 }
942
943 return period;
944 }
945
946 /** \} */
947
948 /** \} group_sysanalog_functions */
949 CY_MISRA_BLOCK_END('MISRA C-2012 Rule 11.3')
950
951 #if defined(__cplusplus)
952 }
953 #endif
954
955 #endif /* CY_IP_MXS40PASS */
956
957 #endif /** !defined(CY_SYSANALOG_H) */
958
959 /** \} group_sysanalog */
960
961 /* [] END OF FILE */
962
