1 /***************************************************************************//**
2 * \file cy_cryptolite_common.h
3 * \version 2.50
4 *
5 * \brief
6 *  This file provides common constants and parameters
7 *  for the Cryptolite driver.
8 *
9 ********************************************************************************
10 * Copyright 2022 Cypress Semiconductor Corporation
11 * SPDX-License-Identifier: Apache-2.0
12 *
13 * Licensed under the Apache License, Version 2.0 (the "License");
14 * you may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at
16 *
17 *    http://www.apache.org/licenses/LICENSE-2.0
18 *
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
24 *******************************************************************************/
25 
26 #if !defined (CY_CRYPTOLITE_COMMON_H)
27 #define CY_CRYPTOLITE_COMMON_H
28 
29 #include "cy_device.h"
30 
31 #if defined (CY_IP_MXCRYPTOLITE)
32 
33 #include "cy_syslib.h"
34 
35 #if defined(__cplusplus)
36 extern "C" {
37 #endif
38 
39 #include <stddef.h>
40 #include <stdbool.h>
41 #include <stdlib.h>
42 
43 #include "cy_cryptolite_hw.h"
44 #include "cy_cryptolite_config.h"
45 
46 /**
47 * \addtogroup group_cryptolite_macros
48 * \{
49 */
50 /** Driver major version */
51 #define CY_CRYPTOLITE_DRV_VERSION_MAJOR         2
52 
53 /** Driver minor version */
54 #define CY_CRYPTOLITE_DRV_VERSION_MINOR         50
55 
56 /** Cryptolite Driver PDL ID */
57 #define CY_CRYPTOLITE_ID                        CY_PDL_DRV_ID(0x74u)
58 /** \} group_cryptolite_macros */
59 
60 /** \cond INTERNAL */
61 
62 
63 
64 /* Calculates the actual size in bytes of the bits value */
65 #define CY_CRYPTOLITE_BYTE_SIZE_OF_BITS(x)      (uint32_t)(((uint32_t)(x) + 7U) >> 3U)
66 
67 /* Calculates the word siz of the nearest byte size */
68 #define CY_CRYPTOLITE_WORD_SIZE_OF_BYTES(x)      (uint32_t)(((uint32_t)(x) + 3U) >> 2U)
69 
70 
71 /** \endcond */
72 
73 /**
74 * \addtogroup group_cryptolite_enums
75 * \{
76 */
77 
78 /** Errors of the Cryptolite block */
79 typedef enum
80 {
81     /** Operation completed successfully. */
82     CY_CRYPTOLITE_SUCCESS               = 0x00u,
83     /** The Crypto operation parameters are incorrect. */
84     CY_CRYPTOLITE_BAD_PARAMS            = CY_CRYPTOLITE_ID | CY_PDL_STATUS_ERROR   | 0x01u,
85     /** The Crypto HW is busy. */
86     CY_CRYPTOLITE_HW_BUSY               = CY_CRYPTOLITE_ID | CY_PDL_STATUS_ERROR   | 0x02u,
87     /** The Crypto AHB bus error. */
88     CY_CRYPTOLITE_BUS_ERROR             = CY_CRYPTOLITE_ID | CY_PDL_STATUS_ERROR   | 0x03u,
89     /** The Crypto feature not supported error. */
90     CY_CRYPTOLITE_NOT_SUPPORTED         = CY_CRYPTOLITE_ID | CY_PDL_STATUS_ERROR   | 0x04u,
91    /** The size of input data is not multiple of 16. */
92     CY_CRYPTOLITE_SIZE_NOT_X16          = CY_CRYPTOLITE_ID | CY_PDL_STATUS_ERROR   | 0x05u,
93     /** The Address passed is not aligned to 4 bytes. */
94     CY_CRYPTOLITE_ALIGNMENT_ERROR       = CY_CRYPTOLITE_ID | CY_PDL_STATUS_ERROR   | 0x06u,
95     /** The TRNG is not enabled. */
96     CY_CRYPTOLITE_TRNG_NOT_ENABLED      = CY_CRYPTOLITE_ID | CY_PDL_STATUS_ERROR   | 0x07u,
97     /** The TRNG is unhealthy. */
98     CY_CRYPTOLITE_TRNG_UNHEALTHY        = CY_CRYPTOLITE_ID | CY_PDL_STATUS_ERROR   | 0x08u,
99         /** The Data in the buffer is not aligned. */
100     CY_CRYPTOLITE_BUFFER_NOT_ALIGNED    = CY_CRYPTOLITE_ID | CY_PDL_STATUS_ERROR   | 0x09u,
101         /** The Hardware error occurred. */
102     CY_CRYPTOLITE_HW_ERROR              = CY_CRYPTOLITE_ID | CY_PDL_STATUS_ERROR   | 0x0Au
103 } cy_en_cryptolite_status_t;
104 
105 /** \} group_cryptolite_enums */
106 
107 
108 
109 /** \cond INTERNAL */
110 /** The cryptolite task descriptor structure.
111 * All fields for the structure are internal. Firmware never reads or
112 * writes these values.
113 */
114 typedef struct cy_stc_cryptolite_descr_t {
115    uint32_t data0;
116    uint32_t data1;
117    uint32_t data2;
118    uint32_t data3;
119 } cy_stc_cryptolite_descr_t;
120 /** \endcond */
121 
122 
123 /**
124 * \addtogroup group_cryptolite_enums
125 * \{
126 */
127 /** Defines modes of SHA method */
128 typedef enum
129 {
130     CY_CRYPTOLITE_MODE_SHA1          = 0x00u,   /**< Sets the SHA1 mode */
131     CY_CRYPTOLITE_MODE_SHA224        = 0x01u,   /**< Sets the SHA224 mode */
132     CY_CRYPTOLITE_MODE_SHA256        = 0x02u,   /**< Sets the SHA256 mode */
133     CY_CRYPTOLITE_MODE_SHA384        = 0x03u,   /**< Sets the SHA384 mode */
134     CY_CRYPTOLITE_MODE_SHA512        = 0x04u,   /**< Sets the SHA512 mode */
135     CY_CRYPTOLITE_MODE_SHA512_256    = 0x05u,   /**< Sets the SHA512/256 mode */
136     CY_CRYPTOLITE_MODE_SHA512_224    = 0x06u,   /**< Sets the SHA512/224 mode */
137     CY_CRYPTOLITE_MODE_SHA_NONE      = 0x07u,   /**< Sets the SHA NONE mode */
138 } cy_en_cryptolite_sha_mode_t;
139 
140 
141 /** Signature verification status */
142 typedef enum
143 {
144     /** The signature is valid */
145     CY_CRYPTOLITE_SIG_VALID     = 0x05555555u,
146     /** The signature is invalid */
147     CY_CRYPTOLITE_SIG_INVALID   = 0x0AAAAAAAu,
148 } cy_en_cryptolite_sig_verify_result_t;
149 
150 /** AES CCM verification status */
151 typedef enum
152 {
153     /** The Tag is valid */
154     CY_CRYPTOLITE_TAG_VALID     = 0x05555555u,
155     /** The Tag is invalid */
156     CY_CRYPTOLITE_TAG_INVALID   = 0x0AAAAAAAu,
157 } cy_en_cryptolite_ccm_auth_result_t;
158 
159 /** \} group_cryptolite_enums */
160 
161 
162 #if defined(CY_CRYPTOLITE_CFG_ECP_DP_SECP521R1_ENABLED)
163     #define BIT_SIZE ((uint32_t)521)
164 #elif defined(CY_CRYPTOLITE_CFG_ECP_DP_SECP384R1_ENABLED)
165     #define BIT_SIZE ((uint32_t)384)
166 #elif defined(CY_CRYPTOLITE_CFG_ECP_DP_SECP256R1_ENABLED)
167     #define BIT_SIZE ((uint32_t)256)
168 #elif defined(CY_CRYPTOLITE_CFG_ECP_DP_SECP224R1_ENABLED)
169     #define BIT_SIZE ((uint32_t)224)
170 #elif defined(CY_CRYPTOLITE_CFG_ECP_DP_SECP192R1_ENABLED)
171     #define BIT_SIZE ((uint32_t)192)
172 #else
173     #define BIT_SIZE ((uint32_t)256)
174 #endif
175 
176 typedef enum cy_en_cryptolite_ecc_red_mul_algs_t {
177     CY_CRYPTOLITE_NIST_P_CURVE_SPECIFIC_RED_ALG = 0,
178     CY_CRYPTOLITE_NIST_P_SHIFT_MUL_RED_ALG,
179     CY_CRYPTOLITE_NIST_P_BARRETT_RED_ALG
180 } cy_en_cryptolite_ecc_red_mul_algs_t;
181 
182 
183 /**
184 * \addtogroup group_cryptolite_enums
185 * \{
186 */
187 
188 /** Defines the direction of the Crypto methods */
189 typedef enum
190 {
191     /** The forward mode, plain text will be encrypted into cipher text */
192     CY_CRYPTOLITE_ENCRYPT   = 0x00u,
193     /** The reverse mode, cipher text will be decrypted into plain text */
194     CY_CRYPTOLITE_DECRYPT   = 0x01u
195 } cy_en_cryptolite_dir_mode_t;
196 
197 /** \} group_cryptolite_enums */
198 
199 
200 /** \cond INTERNAL */
201 #define CY_REMAP_ADDRESS_CRYPTOLITE(addr)   (CY_PLATFORM_REMAP_ADDRESS_CRYPTOLITE(addr))
202 /** \endcond */
203 
204 #if defined(__cplusplus)
205 }
206 #endif
207 
208 #endif /* CY_IP_MXCRYPTOLITE */
209 
210 #endif /* #if !defined (CY_CRYPTOLITE_COMMON_H) */
211 /** \} group_cryptolite */
212 
213 /* [] END OF FILE */
214