1 /******************************************************************************* 2 * File Name: cycfg_system.h 3 * 4 * Description: 5 * System configuration 6 * This file was automatically generated and should not be modified. 7 * Device Configurator: 2.0.0.1483 8 * Device Support Library (../../../../output/libs/COMPONENT_PSOC6/psoc6pdl): 1.5.0.1837 9 * 10 ******************************************************************************** 11 * Copyright 2017-2019 Cypress Semiconductor Corporation 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 ********************************************************************************/ 26 27 #if !defined(CYCFG_SYSTEM_H) 28 #define CYCFG_SYSTEM_H 29 30 #include "cy_sysclk.h" 31 #include "cy_systick.h" 32 #if defined (CY_USING_HAL) 33 #include "cyhal_hwmgr.h" 34 #endif //defined (CY_USING_HAL) 35 #include "cy_gpio.h" 36 37 #if defined(__cplusplus) 38 extern "C" { 39 #endif 40 41 #define cpuss_0_dap_0_ENABLED 1U 42 #define srss_0_clock_0_ENABLED 1U 43 #define srss_0_clock_0_altsystickclk_0_ENABLED 1U 44 #define srss_0_clock_0_bakclk_0_ENABLED 1U 45 #define srss_0_clock_0_fastclk_0_ENABLED 1U 46 #define srss_0_clock_0_fll_0_ENABLED 1U 47 #define srss_0_clock_0_hfclk_0_ENABLED 1U 48 #define CY_CFG_SYSCLK_CLKHF0 0UL 49 #define srss_0_clock_0_hfclk_2_ENABLED 1U 50 #define CY_CFG_SYSCLK_CLKHF2 2UL 51 #define srss_0_clock_0_hfclk_3_ENABLED 1U 52 #define CY_CFG_SYSCLK_CLKHF3 3UL 53 #define srss_0_clock_0_hfclk_4_ENABLED 1U 54 #define CY_CFG_SYSCLK_CLKHF4 4UL 55 #define srss_0_clock_0_ilo_0_ENABLED 1U 56 #define srss_0_clock_0_imo_0_ENABLED 1U 57 #define srss_0_clock_0_lfclk_0_ENABLED 1U 58 #define CY_CFG_SYSCLK_CLKLF_FREQ_HZ 32768 59 #define srss_0_clock_0_pathmux_0_ENABLED 1U 60 #define srss_0_clock_0_pathmux_1_ENABLED 1U 61 #define srss_0_clock_0_pathmux_2_ENABLED 1U 62 #define srss_0_clock_0_periclk_0_ENABLED 1U 63 #define srss_0_clock_0_pll_0_ENABLED 1U 64 #define srss_0_clock_0_pll_1_ENABLED 1U 65 #define srss_0_clock_0_slowclk_0_ENABLED 1U 66 #define srss_0_clock_0_timerclk_0_ENABLED 1U 67 #define srss_0_clock_0_wco_0_ENABLED 1U 68 69 #if defined (CY_USING_HAL) 70 extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_0_obj; 71 #endif //defined (CY_USING_HAL) 72 #if defined (CY_USING_HAL) 73 extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_1_obj; 74 #endif //defined (CY_USING_HAL) 75 #if defined (CY_USING_HAL) 76 extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_2_obj; 77 #endif //defined (CY_USING_HAL) 78 79 void init_cycfg_system(void); 80 81 #if defined(__cplusplus) 82 } 83 #endif 84 85 86 #endif /* CYCFG_SYSTEM_H */ 87
