1 /* Copyright (c) 2022 Intel Corporation 2 * SPDX-License-Identifier: Apache-2.0 3 */ 4 5 #ifndef COMM_WIDGET_PMC_IPC_H 6 #define COMM_WIDGET_PMC_IPC_H 7 8 9 #define CW_PMC_MAILBOX3_DATA0_ADDRESS 0x68 10 #define CW_PMC_MAILBOX3_DATA1_ADDRESS 0x6c 11 #define CW_PMC_MAILBOX3_DATA2_ADDRESS 0x70 12 #define CW_PMC_MAILBOX3_DATA3_ADDRESS 0x74 13 #define CW_PMC_MAILBOX3_INTERFACE_ADDRESS 0x78 14 #define CW_PMC_DESTID_VALUE 0xc8 15 16 17 /* 18 * The requesting agent will write the PMC command op-code into this field. 19 */ 20 #define CW_PMC_IPC_OP_CODE GENMASK(7, 0) 21 22 /* 23 * When the PMC has completed the API command, the PMC will write a completion code (CC) back into 24 * this field. 25 */ 26 #define CW_PMC_IPC_CC GENMASK(7, 0) 27 28 /* 29 * Some commands require additional information which is passed into this 8 bit field. 30 */ 31 #define CW_PMC_IPC_PARAM1 GENMASK(15, 8) 32 33 /* 34 * Some commands require additional information which is passed into this 8 bit field. 35 */ 36 #define CW_PMC_IPC_PARAM2 GENMASK(23, 16) 37 38 /* 39 * Some commands require additional information which is passed into this 4 bit field. 40 */ 41 #define CW_PMC_IPC_PARAM3 GENMASK(27, 24) 42 43 /* 44 * Reserved 45 */ 46 #define CW_PMC_IPC_RSVD GENMASK(30, 28) 47 48 /* 49 * busy - The run/busy bit can only be set by the requesting agent and can only be cleared by the 50 * responding agent. When this bit is set it will prompt the PMC to execute the command placed in 51 * the mailbox. The PMC will clear this flag after the command has been processed and a completion 52 * code has been written back into the COMMAND field and any data requested has been written into 53 * the DATA field. 54 */ 55 #define CW_PMC_IPC_BUSY BIT(31) 56 57 58 /* PMC operation codes */ 59 60 /* 61 * No operation - PMC FW will clear the run / busy bit and return a success response 62 */ 63 #define CW_PMC_OPC_NOP 0x0 64 65 /* 66 * Version - The IPC command to obtain information about current HAL version. 67 * param_1 - Pass back the PMC ACE protocol version - the initial version is 0. 68 */ 69 #define CW_PMC_OPC_VERSION 0x1 70 71 /* 72 * SRAM config - Any FW allocating HP-SRAM is expected to report allocated number of banks. 73 * HP-SRAM reporting is defined as 10-bit field span across Parameter 1 and 2, unit is 32 KB. 74 */ 75 #define CW_PMC_OPC_SRAM_CONFIG 0x2 76 77 /* 78 * Number of allocated HP-SRAM of banks, unit is 32 KB. 79 */ 80 #define CW_PMC_IPC_SRAM_USED_BANKS GENMASK(17, 8) 81 82 /* 83 * Some commands require additional information which is passed into this 8 bit field. 84 */ 85 #define CW_PMC_IPC_SRAM_RESERVED GENMASK(30, 18) 86 87 #endif 88
