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Searched defs:CWENR0 (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_ADC.h130 __IO uint32_t CWENR0; /**< Channel Watchdog Enable 0, offset: 0x2E0 */ member
/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_ADC.h134 …__IO uint32_t CWENR0; /**< Channel Watchdog Enable For Precision Inputs… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h88146 __IO uint32_t CWENR0; /**< Channel Watchdog Enable 0, offset: 0x2E0 */ member
DMIMX9352_ca55.h76583 __IO uint32_t CWENR0; /**< Channel Watchdog Enable 0, offset: 0x2E0 */ member