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Searched defs:CTRL_SET (Results 1 – 25 of 129) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h12320 __IO uint32_t CTRL_SET; /**< DCP control register 0, offset: 0x4 */ member
26929 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
31678 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
37160 __IO uint32_t CTRL_SET; /**< Control Register 0, offset: 0x4 */ member
46363 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h12608 __IO uint32_t CTRL_SET; /**< DCP control register 0, offset: 0x4 */ member
27456 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
32124 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
37655 __IO uint32_t CTRL_SET; /**< Control Register 0, offset: 0x4 */ member
46514 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h13838 __IO uint32_t CTRL_SET; /**< DCP control register 0, offset: 0x4 */ member
28986 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
33657 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
39196 __IO uint32_t CTRL_SET; /**< Control Register 0, offset: 0x4 */ member
48620 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h13760 __IO uint32_t CTRL_SET; /**< DCP control register 0, offset: 0x4 */ member
28978 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
33650 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
39189 __IO uint32_t CTRL_SET; /**< Control Register 0, offset: 0x4 */ member
48684 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h8239 __IO uint32_t CTRL_SET; /**< DCP control register 0, offset: 0x4 */ member
20907 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
31794 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h8953 __IO uint32_t CTRL_SET; /**< DCP control register 0, offset: 0x4 */ member
23856 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
34737 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h10493 __IO uint32_t CTRL_SET; /**< DCP control register 0, offset: 0x4 */ member
27899 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
40020 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h10513 __IO uint32_t CTRL_SET; /**< DCP control register 0, offset: 0x4 */ member
27920 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
40041 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h11535 __IO uint32_t CTRL_SET; /**< DCP control register 0, offset: 0x4 */ member
28971 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
42097 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h12606 __IO uint32_t CTRL_SET; /**< DCP control register 0, offset: 0x4 */ member
30273 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
43104 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h12974 __IO uint32_t CTRL_SET; /**< DCP control register 0, offset: 0x4 */ member
31015 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
44490 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h53342 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
55245 …__IO uint32_t CTRL_SET; /**< LCDIFv2 display control Register, offset: 0x… member
61307 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
67376 __IO uint32_t CTRL_SET; /**< Control Register 0, offset: 0x4 */ member
81537 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
DMIMXRT1166_cm7.h53345 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
55248 …__IO uint32_t CTRL_SET; /**< LCDIFv2 display control Register, offset: 0x… member
60405 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
66474 __IO uint32_t CTRL_SET; /**< Control Register 0, offset: 0x4 */ member
80635 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h53869 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
55772 …__IO uint32_t CTRL_SET; /**< LCDIFv2 display control Register, offset: 0x… member
61828 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
67875 __IO uint32_t CTRL_SET; /**< Control Register 0, offset: 0x4 */ member
82036 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
DMIMXRT1173_cm7.h53872 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
55775 …__IO uint32_t CTRL_SET; /**< LCDIFv2 display control Register, offset: 0x… member
60926 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
66973 __IO uint32_t CTRL_SET; /**< Control Register 0, offset: 0x4 */ member
81134 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h53875 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
55778 …__IO uint32_t CTRL_SET; /**< LCDIFv2 display control Register, offset: 0x… member
60929 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
66976 __IO uint32_t CTRL_SET; /**< Control Register 0, offset: 0x4 */ member
81137 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h1817 …__IO uint32_t CTRL_SET; /**< Hardware BCH ECC Accelerator Control R… member
10341 __IO uint32_t CTRL_SET; /**< GIS Control Register, offset: 0x4 */ member
27706 …__IO uint32_t CTRL_SET; /**< OTP Controller Control Register, offse… member
37840 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offs… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h10186 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
36690 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h10187 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
36691 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h6218 …__IO uint32_t CTRL_SET; /**< Hardware BCH ECC Accelerator Control Registe… member
36042 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
43145 …__IO uint32_t CTRL_SET; /**< OTP Controller Control Register, offset: 0x4… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h6218 …__IO uint32_t CTRL_SET; /**< Hardware BCH ECC Accelerator Control Registe… member
36042 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
43145 …__IO uint32_t CTRL_SET; /**< OTP Controller Control Register, offset: 0x4… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h6218 …__IO uint32_t CTRL_SET; /**< Hardware BCH ECC Accelerator Control Registe… member
36042 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
40972 …__IO uint32_t CTRL_SET; /**< OTP Controller Control Register, offset: 0x4… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h6218 …__IO uint32_t CTRL_SET; /**< Hardware BCH ECC Accelerator Control Registe… member
36042 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
43145 …__IO uint32_t CTRL_SET; /**< OTP Controller Control Register, offset: 0x4… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h6218 …__IO uint32_t CTRL_SET; /**< Hardware BCH ECC Accelerator Control Registe… member
36042 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
43145 …__IO uint32_t CTRL_SET; /**< OTP Controller Control Register, offset: 0x4… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h64542 …__IO uint32_t CTRL_SET; /**< LCDIF General Control Register, offset: 0x4 … member
66445 …__IO uint32_t CTRL_SET; /**< LCDIFv2 display control Register, offset: 0x… member
71596 …__IO uint32_t CTRL_SET; /**< OTP Controller Control and Status Register, … member
77643 __IO uint32_t CTRL_SET; /**< Control Register 0, offset: 0x4 */ member
91804 …__IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x… member

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