/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN2/ |
D | MIMX8MN2_cm7.h | 42366 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN5/ |
D | MIMX8MN5_cm7.h | 42368 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN3/ |
D | MIMX8MN3_cm7.h | 42368 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN4/ |
D | MIMX8MN4_cm7.h | 42366 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN1/ |
D | MIMX8MN1_cm7.h | 42368 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN6/ |
D | MIMX8MN6_ca53.h | 42380 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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D | MIMX8MN6_cm7.h | 42366 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1165/ |
D | MIMXRT1165_cm7.h | 60715 __IO uint32_t CTRL_1; /**< PDM Control register 1, offset: 0x0 */ member
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D | MIMXRT1165_cm4.h | 61648 __IO uint32_t CTRL_1; /**< PDM Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM6/ |
D | MIMX8MM6_ca53.h | 60328 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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D | MIMX8MM6_cm4.h | 60863 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM5/ |
D | MIMX8MM5_cm4.h | 60863 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1166/ |
D | MIMXRT1166_cm4.h | 65558 __IO uint32_t CTRL_1; /**< PDM Control register 1, offset: 0x0 */ member
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D | MIMXRT1166_cm7.h | 64625 __IO uint32_t CTRL_1; /**< PDM Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM1/ |
D | MIMX8MM1_cm4.h | 60863 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM2/ |
D | MIMX8MM2_cm4.h | 60863 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM3/ |
D | MIMX8MM3_cm4.h | 60863 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM4/ |
D | MIMX8MM4_cm4.h | 60863 __IO uint32_t CTRL_1; /**< MICFIL Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1175/ |
D | MIMXRT1175_cm7.h | 71899 __IO uint32_t CTRL_1; /**< PDM Control register 1, offset: 0x0 */ member
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D | MIMXRT1175_cm4.h | 72832 __IO uint32_t CTRL_1; /**< PDM Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1171/ |
D | MIMXRT1171.h | 71899 __IO uint32_t CTRL_1; /**< PDM Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1173/ |
D | MIMXRT1173_cm7.h | 75806 __IO uint32_t CTRL_1; /**< PDM Control register 1, offset: 0x0 */ member
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D | MIMXRT1173_cm4.h | 76739 __IO uint32_t CTRL_1; /**< PDM Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1172/ |
D | MIMXRT1172.h | 75809 __IO uint32_t CTRL_1; /**< PDM Control register 1, offset: 0x0 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1176/ |
D | MIMXRT1176_cm4.h | 76742 __IO uint32_t CTRL_1; /**< PDM Control register 1, offset: 0x0 */ member
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