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Searched defs:CTRL (Results 1 – 18 of 18) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/cmsis/
Dcore_cm0plus.h462 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
513 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
Dcore_sc000.h481 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
532 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
Dcore_cm3.h612 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
763 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member
1063 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
Dcore_sc300.h592 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
743 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member
1043 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
Dcore_cm0.h441 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
Dcore_cm4.h652 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
803 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member
1103 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
Dcore_cm7.h833 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
984 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member
1287 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
/loramac-node-3.4.0/src/boards/mcu/stm32/cmsis/
Dcore_cm0plus.h522 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
575 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
Dcore_sc000.h533 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
586 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
Dcore_cm3.h685 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
840 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1144 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
Dcore_sc300.h667 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
822 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1126 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
Dcore_cm0.h498 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
Dcore_cm4.h746 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
901 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1205 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
Dcore_cm7.h948 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
1103 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1410 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/component/
Dccl.h177 __IO CCL_CTRL_Type CTRL; /**< \brief Offset: 0x0 (R/W 8) Control */ member
Dport.h387 __IO PORT_CTRL_Type CTRL; /**< \brief Offset: 0x24 (R/W 32) Control */ member
Ddsu.h579 __O DSU_CTRL_Type CTRL; /**< \brief Offset: 0x0000 ( /W 8) Control */ member
Ddmac.h1065 __IO DMAC_CTRL_Type CTRL; /**< \brief Offset: 0x00 (R/W 16) Control */ member