| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/ |
| D | efr32fg1p_prs_ch.h | 46 __IOM uint32_t CTRL; /**< Channel Control Register */ member
|
| D | efr32fg1p_rtcc_cc.h | 46 __IOM uint32_t CTRL; /**< CC Channel Control Register */ member
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| D | efr32fg1p_timer_cc.h | 46 __IOM uint32_t CTRL; /**< CC Channel Control Register */ member
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| D | efr32fg1p_dma_descriptor.h | 49 __IOM uint32_t CTRL; /**< DMA control register */ member
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/ |
| D | efr32mg12p_prs_ch.h | 46 __IOM uint32_t CTRL; /**< Channel Control Register */ member
|
| D | efr32mg12p_dma_descriptor.h | 49 __IOM uint32_t CTRL; /**< DMA control register */ member
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| D | efr32mg12p_rtcc_cc.h | 46 __IOM uint32_t CTRL; /**< CC Channel Control Register */ member
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| D | efr32mg12p_timer_cc.h | 46 __IOM uint32_t CTRL; /**< CC Channel Control Register */ member
|
| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/ |
| D | efm32jg12b_prs_ch.h | 46 __IOM uint32_t CTRL; /**< Channel Control Register */ member
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| D | efm32jg12b_dma_descriptor.h | 49 __IOM uint32_t CTRL; /**< DMA control register */ member
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/ |
| D | efm32pg12b_prs_ch.h | 46 __IOM uint32_t CTRL; /**< Channel Control Register */ member
|
| D | efm32pg12b_rtcc_cc.h | 46 __IOM uint32_t CTRL; /**< CC Channel Control Register */ member
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| D | efm32pg12b_timer_cc.h | 46 __IOM uint32_t CTRL; /**< CC Channel Control Register */ member
|
| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32HG/Include/ |
| D | efm32hg_dma_ch.h | 45 __IOM uint32_t CTRL; /**< Channel Control Register */ member
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| D | efm32hg_prs_ch.h | 45 __IOM uint32_t CTRL; /**< Channel Control Register */ member
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| D | efm32hg_dma_descriptor.h | 50 __IOM uint32_t CTRL; /**< DMA control register */ member
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| D | efm32hg_timer_cc.h | 45 __IOM uint32_t CTRL; /**< CC Channel Control Register */ member
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32WG/Include/ |
| D | efm32wg_dma_ch.h | 45 __IOM uint32_t CTRL; /**< Channel Control Register */ member
|
| D | efm32wg_prs_ch.h | 45 __IOM uint32_t CTRL; /**< Channel Control Register */ member
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/ |
| D | efm32gg12b_prs_ch.h | 46 __IOM uint32_t CTRL; /**< Channel Control Register */ member
|
| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/ |
| D | efr32bg13p_prs_ch.h | 46 __IOM uint32_t CTRL; /**< Channel Control Register */ member
|
| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/ |
| D | efm32gg11b_prs_ch.h | 46 __IOM uint32_t CTRL; /**< Channel Control Register */ member
|
| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/ |
| D | efr32fg13p_prs_ch.h | 46 __IOM uint32_t CTRL; /**< Channel Control Register */ member
|
| D | efr32fg13p_dma_descriptor.h | 49 __IOM uint32_t CTRL; /**< DMA control register */ member
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/ |
| D | efm32pg1b_prs_ch.h | 46 __IOM uint32_t CTRL; /**< Channel Control Register */ member
|
