/hal_nxp-3.5.0/s32/drivers/s32k3/Adc/include/ |
D | Adc_Sar_Ip_HeaderWrapper_S32K3.h | 173 #define CTR(base, regIndex) REG_ACCESS((base)->CTR0, (regIndex)) macro
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/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/ |
D | S32K344_SCB.h | 106 __I uint32_t CTR; /**< Cache Type Register, offset: 0xD7C */ member
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/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/ |
D | S32Z2_SCB.h | 107 __I uint32_t CTR; /**< Cache Type Register, offset: 0xD7C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/CMSIS/Include/ |
D | core_cm7.h | 478 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
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D | core_armv8mml.h | 519 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
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D | core_cm33.h | 519 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
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D | core_cm35p.h | 519 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
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D | core_armv81mml.h | 520 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/CMSIS/Core/Include/ |
D | core_cm7.h | 483 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
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D | core_cm33.h | 526 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/ |
D | MIMXRT685S_dsp.h | 17147 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
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D | MIMXRT685S_cm33.h | 24204 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/ |
D | MIMXRT1011.h | 22187 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/ |
D | MCIMX7U5_cm4.h | 20504 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0x110, array… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/ |
D | MCIMX7U3_cm4.h | 20503 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0x110, array… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/ |
D | MIMXRT633S.h | 24204 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/ |
D | MIMXRT595S_dsp.h | 27869 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
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D | MIMXRT595S_cm33.h | 35049 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/ |
D | MIMXRT533S.h | 33422 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/ |
D | MIMXRT555S.h | 35048 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/ |
D | MIMXRT1165_cm4.h | 61318 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
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D | MIMXRT1165_cm7.h | 60385 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/ |
D | MIMXRT1166_cm7.h | 64295 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
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D | MIMXRT1166_cm4.h | 65228 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1175/ |
D | MIMXRT1175_cm7.h | 71569 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
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