1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file in 13 * the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 ****************************************************************************** 16 */ 17 18 /* Define to prevent recursive inclusion -------------------------------------*/ 19 #ifndef __STM32F4xx_HAL_PWR_H 20 #define __STM32F4xx_HAL_PWR_H 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "stm32f4xx_hal_def.h" 28 29 /** @addtogroup STM32F4xx_HAL_Driver 30 * @{ 31 */ 32 33 /** @addtogroup PWR 34 * @{ 35 */ 36 37 /* Exported types ------------------------------------------------------------*/ 38 39 /** @defgroup PWR_Exported_Types PWR Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief PWR PVD configuration structure definition 45 */ 46 typedef struct 47 { 48 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 49 This parameter can be a value of @ref PWR_PVD_detection_level */ 50 51 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 52 This parameter can be a value of @ref PWR_PVD_Mode */ 53 }PWR_PVDTypeDef; 54 55 /** 56 * @} 57 */ 58 59 /* Exported constants --------------------------------------------------------*/ 60 /** @defgroup PWR_Exported_Constants PWR Exported Constants 61 * @{ 62 */ 63 64 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins 65 * @{ 66 */ 67 #define PWR_WAKEUP_PIN1 0x00000100U 68 /** 69 * @} 70 */ 71 72 /** @defgroup PWR_PVD_detection_level PWR PVD detection level 73 * @{ 74 */ 75 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 76 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 77 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 78 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 79 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 80 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 81 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 82 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage 83 (Compare internally to VREFINT) */ 84 /** 85 * @} 86 */ 87 88 /** @defgroup PWR_PVD_Mode PWR PVD Mode 89 * @{ 90 */ 91 #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */ 92 #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */ 93 #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */ 94 #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 95 #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */ 96 #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */ 97 #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */ 98 /** 99 * @} 100 */ 101 102 103 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode 104 * @{ 105 */ 106 #define PWR_MAINREGULATOR_ON 0x00000000U 107 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS 108 /** 109 * @} 110 */ 111 112 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 113 * @{ 114 */ 115 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) 116 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) 117 /** 118 * @} 119 */ 120 121 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 122 * @{ 123 */ 124 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) 125 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) 126 /** 127 * @} 128 */ 129 130 /** @defgroup PWR_Flag PWR Flag 131 * @{ 132 */ 133 #define PWR_FLAG_WU PWR_CSR_WUF 134 #define PWR_FLAG_SB PWR_CSR_SBF 135 #define PWR_FLAG_PVDO PWR_CSR_PVDO 136 #define PWR_FLAG_BRR PWR_CSR_BRR 137 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY 138 /** 139 * @} 140 */ 141 142 /** 143 * @} 144 */ 145 146 /* Exported macro ------------------------------------------------------------*/ 147 /** @defgroup PWR_Exported_Macro PWR Exported Macro 148 * @{ 149 */ 150 151 /** @brief Check PWR flag is set or not. 152 * @param __FLAG__ specifies the flag to check. 153 * This parameter can be one of the following values: 154 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 155 * was received from the WKUP pin or from the RTC alarm (Alarm A 156 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup. 157 * An additional wakeup event is detected if the WKUP pin is enabled 158 * (by setting the EWUP bit) when the WKUP pin level is already high. 159 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 160 * resumed from StandBy mode. 161 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 162 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 163 * For this reason, this bit is equal to 0 after Standby or reset 164 * until the PVDE bit is set. 165 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset 166 * when the device wakes up from Standby mode or by a system reset 167 * or power reset. 168 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage 169 * scaling output selection is ready. 170 * @retval The new state of __FLAG__ (TRUE or FALSE). 171 */ 172 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) 173 174 /** @brief Clear the PWR's pending flags. 175 * @param __FLAG__ specifies the flag to clear. 176 * This parameter can be one of the following values: 177 * @arg PWR_FLAG_WU: Wake Up flag 178 * @arg PWR_FLAG_SB: StandBy flag 179 */ 180 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U) 181 182 /** 183 * @brief Enable the PVD Exti Line 16. 184 * @retval None. 185 */ 186 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) 187 188 /** 189 * @brief Disable the PVD EXTI Line 16. 190 * @retval None. 191 */ 192 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) 193 194 /** 195 * @brief Enable event on PVD Exti Line 16. 196 * @retval None. 197 */ 198 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) 199 200 /** 201 * @brief Disable event on PVD Exti Line 16. 202 * @retval None. 203 */ 204 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) 205 206 /** 207 * @brief Enable the PVD Extended Interrupt Rising Trigger. 208 * @retval None. 209 */ 210 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 211 212 /** 213 * @brief Disable the PVD Extended Interrupt Rising Trigger. 214 * @retval None. 215 */ 216 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 217 218 /** 219 * @brief Enable the PVD Extended Interrupt Falling Trigger. 220 * @retval None. 221 */ 222 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 223 224 225 /** 226 * @brief Disable the PVD Extended Interrupt Falling Trigger. 227 * @retval None. 228 */ 229 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 230 231 232 /** 233 * @brief PVD EXTI line configuration: set rising & falling edge trigger. 234 * @retval None. 235 */ 236 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\ 237 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\ 238 }while(0U) 239 240 /** 241 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 242 * This parameter can be: 243 * @retval None. 244 */ 245 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\ 246 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\ 247 }while(0U) 248 249 /** 250 * @brief checks whether the specified PVD Exti interrupt flag is set or not. 251 * @retval EXTI PVD Line Status. 252 */ 253 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) 254 255 /** 256 * @brief Clear the PVD Exti flag. 257 * @retval None. 258 */ 259 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) 260 261 /** 262 * @brief Generates a Software interrupt on PVD EXTI line. 263 * @retval None 264 */ 265 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) 266 267 /** 268 * @} 269 */ 270 271 /* Include PWR HAL Extension module */ 272 #include "stm32f4xx_hal_pwr_ex.h" 273 274 /* Exported functions --------------------------------------------------------*/ 275 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 276 * @{ 277 */ 278 279 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 280 * @{ 281 */ 282 /* Initialization and de-initialization functions *****************************/ 283 void HAL_PWR_DeInit(void); 284 void HAL_PWR_EnableBkUpAccess(void); 285 void HAL_PWR_DisableBkUpAccess(void); 286 /** 287 * @} 288 */ 289 290 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 291 * @{ 292 */ 293 /* Peripheral Control functions **********************************************/ 294 /* PVD configuration */ 295 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 296 void HAL_PWR_EnablePVD(void); 297 void HAL_PWR_DisablePVD(void); 298 299 /* WakeUp pins configuration */ 300 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); 301 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 302 303 /* Low Power modes entry */ 304 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 305 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 306 void HAL_PWR_EnterSTANDBYMode(void); 307 308 /* Power PVD IRQ Handler */ 309 void HAL_PWR_PVD_IRQHandler(void); 310 void HAL_PWR_PVDCallback(void); 311 312 /* Cortex System Control functions *******************************************/ 313 void HAL_PWR_EnableSleepOnExit(void); 314 void HAL_PWR_DisableSleepOnExit(void); 315 void HAL_PWR_EnableSEVOnPend(void); 316 void HAL_PWR_DisableSEVOnPend(void); 317 /** 318 * @} 319 */ 320 321 /** 322 * @} 323 */ 324 325 /* Private types -------------------------------------------------------------*/ 326 /* Private variables ---------------------------------------------------------*/ 327 /* Private constants ---------------------------------------------------------*/ 328 /** @defgroup PWR_Private_Constants PWR Private Constants 329 * @{ 330 */ 331 332 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line 333 * @{ 334 */ 335 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ 336 /** 337 * @} 338 */ 339 340 /** @defgroup PWR_register_alias_address PWR Register alias address 341 * @{ 342 */ 343 /* ------------- PWR registers bit address in the alias region ---------------*/ 344 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) 345 #define PWR_CR_OFFSET 0x00U 346 #define PWR_CSR_OFFSET 0x04U 347 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) 348 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) 349 /** 350 * @} 351 */ 352 353 /** @defgroup PWR_CR_register_alias PWR CR Register alias address 354 * @{ 355 */ 356 /* --- CR Register ---*/ 357 /* Alias word address of DBP bit */ 358 #define DBP_BIT_NUMBER PWR_CR_DBP_Pos 359 #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U)) 360 361 /* Alias word address of PVDE bit */ 362 #define PVDE_BIT_NUMBER PWR_CR_PVDE_Pos 363 #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U)) 364 365 /* Alias word address of VOS bit */ 366 #define VOS_BIT_NUMBER PWR_CR_VOS_Pos 367 #define CR_VOS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (VOS_BIT_NUMBER * 4U)) 368 /** 369 * @} 370 */ 371 372 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address 373 * @{ 374 */ 375 /* --- CSR Register ---*/ 376 /* Alias word address of EWUP bit */ 377 #define EWUP_BIT_NUMBER PWR_CSR_EWUP_Pos 378 #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U)) 379 /** 380 * @} 381 */ 382 383 /** 384 * @} 385 */ 386 /* Private macros ------------------------------------------------------------*/ 387 /** @defgroup PWR_Private_Macros PWR Private Macros 388 * @{ 389 */ 390 391 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters 392 * @{ 393 */ 394 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 395 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 396 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 397 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 398 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ 399 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ 400 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ 401 ((MODE) == PWR_PVD_MODE_NORMAL)) 402 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 403 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 404 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 405 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) 406 /** 407 * @} 408 */ 409 410 /** 411 * @} 412 */ 413 414 /** 415 * @} 416 */ 417 418 /** 419 * @} 420 */ 421 422 #ifdef __cplusplus 423 } 424 #endif 425 426 427 #endif /* __STM32F4xx_HAL_PWR_H */ 428
