| /loramac-node-3.4.0/src/boards/SKiM980A/cmsis/ |
| D | stm32l151xba.h | 164 …__IO uint32_t CR1; /*!< ADC control register 1, Address offset: 0x04… member
349 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
471 …__IO uint32_t CR1; /*!< SPI Control register 1 Address offset:… member
485 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
516 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x0C */ member
|
| /loramac-node-3.4.0/src/boards/SKiM880B/cmsis/ |
| D | stm32l151xba.h | 164 …__IO uint32_t CR1; /*!< ADC control register 1, Address offset: 0x04… member
349 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
471 …__IO uint32_t CR1; /*!< SPI Control register 1 Address offset:… member
485 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
516 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x0C */ member
|
| /loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/ |
| D | stm32l081xx.h | 352 __IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */ member
470 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset: … member
486 …__IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
514 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
|
| /loramac-node-3.4.0/src/boards/NAMote72/cmsis/ |
| D | stm32l152xc.h | 173 …__IO uint32_t CR1; /*!< ADC control register 1, Address offset: 0x04… member
379 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
537 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
553 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
584 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x0C */ member
|
| /loramac-node-3.4.0/src/boards/NucleoL152/cmsis/ |
| D | stm32l152xe.h | 175 …__IO uint32_t CR1; /*!< ADC control register 1, Address offset: 0x04… member
388 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
552 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
568 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
599 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x0C */ member
|
| /loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/ |
| D | stm32l072xx.h | 369 __IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */ member
497 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset: … member
513 …__IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
562 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
|
| /loramac-node-3.4.0/src/boards/NucleoL073/cmsis/ |
| D | stm32l073xx.h | 370 __IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */ member
511 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset: … member
527 …__IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
576 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
|
| /loramac-node-3.4.0/src/boards/NucleoL476/cmsis/ |
| D | stm32l476xx.h | 571 __IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */ member
649 __IO uint32_t CR1; /*!< PWR power control register 1, Address offset: 0x00 */ member
815 __IO uint32_t CR1; /*!< SAI block x configuration register 1, Address offset: 0x04 */ member
861 …__IO uint32_t CR1; /*!< SPI Control register 1, Address offse… member
912 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
969 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
|
