CPUSS_TRIM_RAM_CTL (definition) in projects: hal_infineon-3.7.0

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Searched defs:CPUSS_TRIM_RAM_CTL (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
D	cy_device.h	`424 #define CPUSS_TRIM_RAM_CTL ((volatile uint32_t ) (cy_device->cpussBase + cy_devi… macro`
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
D	cy_device.h	`1369 #define CPUSS_TRIM_RAM_CTL (((CPUSS_Type*) CPUSS_BASE)->TRIM_RAM_CTL) macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
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