1 /* 2 * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef CPUAMU_H 8 #define CPUAMU_H 9 10 /******************************************************************************* 11 * CPU Activity Monitor Unit register specific definitions. 12 ******************************************************************************/ 13 #define CPUAMCNTENCLR_EL0 S3_3_C15_C9_7 14 #define CPUAMCNTENSET_EL0 S3_3_C15_C9_6 15 #define CPUAMCFGR_EL0 S3_3_C15_C10_6 16 #define CPUAMUSERENR_EL0 S3_3_C15_C10_7 17 18 /* Activity Monitor Event Counter Registers */ 19 #define CPUAMEVCNTR0_EL0 S3_3_C15_C9_0 20 #define CPUAMEVCNTR1_EL0 S3_3_C15_C9_1 21 #define CPUAMEVCNTR2_EL0 S3_3_C15_C9_2 22 #define CPUAMEVCNTR3_EL0 S3_3_C15_C9_3 23 #define CPUAMEVCNTR4_EL0 S3_3_C15_C9_4 24 25 /* Activity Monitor Event Type Registers */ 26 #define CPUAMEVTYPER0_EL0 S3_3_C15_C10_0 27 #define CPUAMEVTYPER1_EL0 S3_3_C15_C10_1 28 #define CPUAMEVTYPER2_EL0 S3_3_C15_C10_2 29 #define CPUAMEVTYPER3_EL0 S3_3_C15_C10_3 30 #define CPUAMEVTYPER4_EL0 S3_3_C15_C10_4 31 32 #ifndef __ASSEMBLER__ 33 #include <stdint.h> 34 35 uint64_t cpuamu_cnt_read(unsigned int idx); 36 void cpuamu_cnt_write(unsigned int idx, uint64_t val); 37 unsigned int cpuamu_read_cpuamcntenset_el0(void); 38 unsigned int cpuamu_read_cpuamcntenclr_el0(void); 39 void cpuamu_write_cpuamcntenset_el0(unsigned int mask); 40 void cpuamu_write_cpuamcntenclr_el0(unsigned int mask); 41 42 int midr_match(unsigned int cpu_midr); 43 void cpuamu_context_save(unsigned int nr_counters); 44 void cpuamu_context_restore(unsigned int nr_counters); 45 46 #endif /* __ASSEMBLER__ */ 47 48 #endif /* CPUAMU_H */ 49
