Searched defs:CPC_LMEM_CM_CTRL (Results 1 – 12 of 12) sorted by relevance
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/ |
D | MIMXRT1165_cm4.h | 62917 …__IO uint32_t CPC_LMEM_CM_CTRL; /**< CPC local memory CPU mode control, offset: 0… member
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D | MIMXRT1165_cm7.h | 61984 …__IO uint32_t CPC_LMEM_CM_CTRL; /**< CPC local memory CPU mode control, offset: 0… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/ |
D | MIMXRT1166_cm7.h | 65894 …__IO uint32_t CPC_LMEM_CM_CTRL; /**< CPC local memory CPU mode control, offset: 0… member
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D | MIMXRT1166_cm4.h | 66827 …__IO uint32_t CPC_LMEM_CM_CTRL; /**< CPC local memory CPU mode control, offset: 0… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1175/ |
D | MIMXRT1175_cm7.h | 73168 …__IO uint32_t CPC_LMEM_CM_CTRL; /**< CPC local memory CPU mode control, offset: 0… member
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D | MIMXRT1175_cm4.h | 74101 …__IO uint32_t CPC_LMEM_CM_CTRL; /**< CPC local memory CPU mode control, offset: 0… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1171/ |
D | MIMXRT1171.h | 73168 …__IO uint32_t CPC_LMEM_CM_CTRL; /**< CPC local memory CPU mode control, offset: 0… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1173/ |
D | MIMXRT1173_cm4.h | 78008 …__IO uint32_t CPC_LMEM_CM_CTRL; /**< CPC local memory CPU mode control, offset: 0… member
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D | MIMXRT1173_cm7.h | 77075 …__IO uint32_t CPC_LMEM_CM_CTRL; /**< CPC local memory CPU mode control, offset: 0… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1176/ |
D | MIMXRT1176_cm4.h | 78011 …__IO uint32_t CPC_LMEM_CM_CTRL; /**< CPC local memory CPU mode control, offset: 0… member
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D | MIMXRT1176_cm7.h | 77078 …__IO uint32_t CPC_LMEM_CM_CTRL; /**< CPC local memory CPU mode control, offset: 0… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1172/ |
D | MIMXRT1172.h | 77078 …__IO uint32_t CPC_LMEM_CM_CTRL; /**< CPC local memory CPU mode control, offset: 0… member
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