1 /* 2 * Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef _MEC_PWM_H 8 #define _MEC_PWM_H 9 10 #include <stdint.h> 11 #include <stddef.h> 12 13 #define MCHP_PWM_INST_SPACING 0x10u 14 #define MCHP_PWM_INST_SPACING_P2 4u 15 16 /* PWM Count On register */ 17 #define MCHP_PWM_COUNT_ON_REG_OFS 0u 18 #define MCHP_PWM_COUNT_ON_MASK 0xffffu 19 20 /* PWM Count Off register */ 21 #define MCHP_PWM_COUNT_OFF_REG_OFS 4u 22 #define MCHP_PWM_COUNT_OFF_MASK 0xffffu 23 24 /* PWM Configuration Register */ 25 #define MCHP_PWM_CONFIG_REG_OFS 8u 26 #define MCHP_PWM_CONFIG_MASK 0x7fu 27 /* 28 * Enable and start PWM. Clearing this bit resets internal counters. 29 * COUNT_ON and COUNT_OFF registers are not affected by enable bit. 30 */ 31 #define MCHP_PWM_CFG_ENABLE_POS 0 32 #define MCHP_PWM_CFG_ENABLE BIT(MCHP_PWM_CFG_ENABLE_POS) 33 /* Clock select */ 34 #define MCHP_PWM_CFG_CLK_SEL_POS 1u 35 #define MCHP_PWM_CFG_CLK_SEL_48M 0u 36 #define MCHP_PWM_CFG_CLK_SEL_100K BIT(MCHP_PWM_CFG_CLK_SEL_POS) 37 /* 38 * ON state polarity. 39 * Default ON state is High. 40 */ 41 #define MCHP_PWM_CFG_ON_POL_POS 2u 42 #define MCHP_PWM_CFG_ON_POL_HI 0u 43 #define MCHP_PWM_CFG_ON_POL_LO BIT(MCHP_PWM_CFG_ON_POL_POS) 44 /* 45 * Clock pre-divider 46 * Clock divider value = pre-divider + 1 47 */ 48 #define MCHP_PWM_CFG_CLK_PRE_DIV_POS 3u 49 #define MCHP_PWM_CFG_CLK_PRE_DIV_MASK0 0x0fU 50 #define MCHP_PWM_CFG_CLK_PRE_DIV_MASK \ 51 SHLU32(0x0fu, MCHP_PWM_CFG_CLK_PRE_DIV_POS) 52 53 #define MCHP_PWM_CFG_CLK_PRE_DIV(n) \ 54 SHLU32((n) & MCHP_PWM_CFG_CLK_PRE_DIV_MASK0, \ 55 MCHP_PWM_CFG_CLK_PRE_DIV_POS) 56 57 /* PWM input frequencies selected in configuration register. */ 58 #define MCHP_PWM_INPUT_FREQ_HI 48000000u 59 #define MCHP_PWM_INPUT_FREQ_LO 100000u 60 61 /* 62 * PWM Frequency = 63 * (1 / (pre_div + 1)) * PWM_INPUT_FREQ / ((COUNT_ON+1) + (COUNT_OFF+1)) 64 * 65 * PWM Duty Cycle = 66 * (COUNT_ON+1) / ((COUNT_ON+1) + (COUNT_OFF + 1)) 67 */ 68 69 /** @brief PWM controller */ 70 struct pwm_regs { 71 volatile uint32_t COUNT_ON; 72 volatile uint32_t COUNT_OFF; 73 volatile uint32_t CONFIG; 74 }; 75 76 #endif /* #ifndef _MEC_PWM_H */ 77
