1 /* 2 * Copyright (c) 2023, MediaTek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef MT_SPM_CONSTRAINT_H 8 #define MT_SPM_CONSTRAINT_H 9 10 #include <lpm/mt_lp_rm.h> 11 12 #define MT_RM_CONSTRAINT_ALLOW_CPU_BUCK_OFF BIT(0) 13 #define MT_RM_CONSTRAINT_ALLOW_DRAM_S0 BIT(1) 14 #define MT_RM_CONSTRAINT_ALLOW_DRAM_S1 BIT(2) 15 #define MT_RM_CONSTRAINT_ALLOW_VCORE_LP BIT(3) 16 #define MT_RM_CONSTRAINT_ALLOW_INFRA_PDN BIT(4) 17 #define MT_RM_CONSTRAINT_ALLOW_BUS26M_OFF BIT(5) 18 #define MT_RM_CONSTRAINT_ALLOW_AP_SUSPEND BIT(6) 19 #define MT_RM_CONSTRAINT_ALLOW_BBLPM BIT(7) 20 #define MT_RM_CONSTRAINT_ALLOW_XO_UFS BIT(8) 21 #define MT_RM_CONSTRAINT_ALLOW_GPS_STATE BIT(9) 22 #define MT_RM_CONSTRAINT_ALLOW_LVTS_STATE BIT(10) 23 24 enum mt_spm_rm_rc_type { 25 MT_RM_CONSTRAINT_ID_BUS26M, 26 MT_RM_CONSTRAINT_ID_SYSPLL, 27 MT_RM_CONSTRAINT_ID_DRAM, 28 MT_RM_CONSTRAINT_ID_CPU_BUCK_LDO, 29 MT_RM_CONSTRAINT_ID_ALL, 30 }; 31 32 #define MT_SPM_RC_INVALID (0x0) 33 #define MT_SPM_RC_VALID_SW BIT(0) 34 #define MT_SPM_RC_VALID_FW BIT(1) 35 #define MT_SPM_RC_VALID_RESIDNECY BIT(2) 36 #define MT_SPM_RC_VALID_COND_CHECK BIT(3) 37 #define MT_SPM_RC_VALID_COND_LATCH BIT(4) 38 #define MT_SPM_RC_VALID_UFS_H8 BIT(5) 39 #define MT_SPM_RC_VALID_FLIGHTMODE BIT(6) 40 #define MT_SPM_RC_VALID_XSOC_BBLPM BIT(7) 41 #define MT_SPM_RC_VALID_TRACE_EVENT BIT(8) 42 #define MT_SPM_RC_VALID_TRACE_TIME BIT(9) 43 44 /* MT_RM_CONSTRAINT_SW_VALID | MT_RM_CONSTRAINT_FW_VALID */ 45 #define MT_SPM_RC_VALID (MT_SPM_RC_VALID_SW) 46 47 #define IS_MT_RM_RC_READY(status) ((status & MT_SPM_RC_VALID) == MT_SPM_RC_VALID) 48 49 struct constraint_status { 50 uint16_t id; 51 uint16_t is_valid; 52 uint32_t is_cond_block; 53 uint32_t enter_cnt; 54 uint32_t all_pll_dump; 55 uint64_t residency; 56 struct mt_spm_cond_tables *cond_res; 57 }; 58 59 enum constraint_status_update_type { 60 CONSTRAINT_UPDATE_VALID, 61 CONSTRAINT_UPDATE_COND_CHECK, 62 CONSTRAINT_RESIDNECY, 63 }; 64 65 enum constraint_status_get_type { 66 CONSTRAINT_GET_VALID = 0xD0000000, 67 CONSTRAINT_GET_ENTER_CNT, 68 CONSTRAINT_GET_RESIDENCY, 69 CONSTRAINT_GET_COND_EN, 70 CONSTRAINT_COND_BLOCK, 71 CONSTRAINT_GET_COND_BLOCK_LATCH, 72 CONSTRAINT_GET_COND_BLOCK_DETAIL, 73 CONSTRAINT_GET_RESIDNECY, 74 }; 75 76 struct rc_common_state { 77 unsigned int id; 78 unsigned int act; 79 unsigned int type; 80 void *value; 81 }; 82 83 #define MT_SPM_RC_BBLPM_MODE (MT_SPM_RC_VALID_UFS_H8 | \ 84 MT_SPM_RC_VALID_FLIGHTMODE | \ 85 MT_SPM_RC_VALID_XSOC_BBLPM) 86 87 #define IS_MT_SPM_RC_BBLPM_MODE(st) ((st & (MT_SPM_RC_BBLPM_MODE)) == MT_SPM_RC_BBLPM_MODE) 88 89 #endif /* MT_SPM_CONSTRAINT_H */ 90
