1# nrfx UART configuration 2 3# Copyright (c) 2016 - 2018, Nordic Semiconductor ASA 4# SPDX-License-Identifier: Apache-2.0 5 6menuconfig UART_NRFX 7 bool "nRF UART nrfx drivers" 8 default y 9 select SERIAL_HAS_DRIVER 10 select SERIAL_SUPPORT_INTERRUPT 11 select SERIAL_SUPPORT_ASYNC 12 depends on DT_HAS_NORDIC_NRF_UART_ENABLED || DT_HAS_NORDIC_NRF_UARTE_ENABLED 13 help 14 Enable support for nrfx UART drivers for nRF MCU series. 15 Peripherals with the same instance ID cannot be used together, 16 e.g. UART_0 and UARTE_0. 17 18if UART_NRFX 19 20config UART_ASYNC_TX_CACHE_SIZE 21 int "TX cache buffer size" 22 depends on UART_ASYNC_API 23 depends on NRF_UARTE_PERIPHERAL 24 default 8 25 help 26 For UARTE, TX cache buffer is used when provided TX buffer is not located 27 in RAM, because EasyDMA in UARTE peripherals can only transfer data 28 from RAM. 29 30# ----------------- port 0 ----------------- 31config UART_0_NRF_UART 32 def_bool HAS_HW_NRF_UART0 33 depends on DT_HAS_NORDIC_NRF_UART_ENABLED 34 select NRF_UART_PERIPHERAL 35 help 36 Enable nRF UART without EasyDMA on port 0. 37 38config UART_0_NRF_UARTE 39 def_bool HAS_HW_NRF_UARTE0 40 depends on DT_HAS_NORDIC_NRF_UARTE_ENABLED 41 select NRF_UARTE_PERIPHERAL 42 help 43 Enable nRF UART with EasyDMA on port 0. 44 45if UART_0_NRF_UART || UART_0_NRF_UARTE 46 47config UART_0_ENHANCED_POLL_OUT 48 bool "Efficient poll out on port 0" 49 default y 50 depends on UART_0_NRF_UARTE 51 help 52 When enabled, polling out does not trigger interrupt which stops TX. 53 Feature uses a PPI channel. 54 55config UART_0_INTERRUPT_DRIVEN 56 bool "Interrupt support on port 0" 57 depends on UART_INTERRUPT_DRIVEN 58 default y 59 help 60 This option enables UART interrupt support on port 0. 61 62config UART_0_ASYNC 63 bool "Asynchronous API support on port 0" 64 depends on UART_ASYNC_API && !UART_0_INTERRUPT_DRIVEN 65 default y 66 help 67 This option enables UART Asynchronous API support on port 0. 68 69config UART_0_NRF_PARITY_BIT 70 bool "Parity bit" 71 help 72 Enable parity bit. 73 74config UART_0_NRF_TX_BUFFER_SIZE 75 int "Size of RAM buffer" 76 depends on UART_0_NRF_UARTE 77 range 1 65535 78 default 32 79 help 80 Size of the transmit buffer for API function: fifo_fill. 81 This value is limited by range of TXD.MAXCNT register for 82 particular SoC. 83 84config UART_0_NRF_HW_ASYNC 85 bool "Use hardware RX byte counting" 86 depends on UART_0_NRF_UARTE 87 depends on UART_ASYNC_API 88 help 89 If default driver uses interrupts to count incoming bytes, it is possible 90 that with higher speeds and/or high cpu load some data can be lost. 91 It is recommended to use hardware byte counting in such scenarios. 92 Hardware RX byte counting requires timer instance and one PPI channel 93 94config UART_0_NRF_ASYNC_LOW_POWER 95 bool "Low power mode" 96 depends on UART_0_NRF_UARTE 97 depends on UART_ASYNC_API 98 help 99 When enabled, UARTE is enabled before each TX or RX usage and disabled 100 when not used. Disabling UARTE while in idle allows to achieve lowest 101 power consumption. It is only feasible if receiver is not always on. 102 103config UART_0_NRF_HW_ASYNC_TIMER 104 int "Timer instance" 105 depends on UART_0_NRF_HW_ASYNC 106 107config UART_0_GPIO_MANAGEMENT 108 bool "GPIO management on port 0" 109 depends on PM_DEVICE 110 default y 111 help 112 If enabled, the driver will configure the GPIOs used by the uart to 113 their default configuration when device is powered down. The GPIOs 114 will be configured back to correct state when UART is powered up. 115 116endif # UART_0_NRF_UART || UART_0_NRF_UARTE 117 118# ----------------- port 1 ----------------- 119config UART_1_NRF_UARTE 120 def_bool HAS_HW_NRF_UARTE1 121 depends on DT_HAS_NORDIC_NRF_UARTE_ENABLED 122 select NRF_UARTE_PERIPHERAL 123 help 124 Enable nRF UART with EasyDMA on port 1. 125 126if UART_1_NRF_UARTE 127 128config UART_1_INTERRUPT_DRIVEN 129 bool "Interrupt support on port 1" 130 depends on UART_INTERRUPT_DRIVEN 131 default y 132 help 133 This option enables UART interrupt support on port 1. 134 135config UART_1_ASYNC 136 bool "Asynchronous API support on port 1" 137 depends on UART_ASYNC_API && !UART_1_INTERRUPT_DRIVEN 138 default y 139 help 140 This option enables UART Asynchronous API support on port 1. 141 142config UART_1_ENHANCED_POLL_OUT 143 bool "Efficient poll out on port 1" 144 default y 145 help 146 When enabled, polling out does not trigger interrupt which stops TX. 147 Feature uses a PPI channel. 148 149config UART_1_NRF_PARITY_BIT 150 bool "Parity bit" 151 help 152 Enable parity bit. 153 154config UART_1_NRF_TX_BUFFER_SIZE 155 int "Size of RAM buffer" 156 depends on UART_INTERRUPT_DRIVEN 157 range 1 65535 158 default 32 159 help 160 Size of the transmit buffer for API function: fifo_fill. 161 This value is limited by range of TXD.MAXCNT register for 162 particular SoC. 163 164config UART_1_NRF_HW_ASYNC 165 bool "Use hardware RX byte counting" 166 depends on UART_1_ASYNC 167 help 168 If default driver uses interrupts to count incoming bytes, it is possible 169 that with higher speeds and/or high cpu load some data can be lost. 170 It is recommended to use hardware byte counting in such scenarios. 171 Hardware RX byte counting requires timer instance and one PPI channel 172 173config UART_1_NRF_ASYNC_LOW_POWER 174 bool "Low power mode" 175 depends on UART_ASYNC_API 176 help 177 When enabled, UARTE is enabled before each TX or RX usage and disabled 178 when not used. Disabling UARTE while in idle allows to achieve lowest 179 power consumption. It is only feasible if receiver is not always on. 180 181config UART_1_NRF_HW_ASYNC_TIMER 182 int "Timer instance" 183 depends on UART_1_NRF_HW_ASYNC 184 185config UART_1_GPIO_MANAGEMENT 186 bool "GPIO management on port 1" 187 depends on PM_DEVICE 188 default y 189 help 190 If enabled, the driver will configure the GPIOs used by the uart to 191 their default configuration when device is powered down. The GPIOs 192 will be configured back to correct state when UART is powered up. 193 194endif # UART_1_NRF_UARTE 195 196# ----------------- port 2 ----------------- 197config UART_2_NRF_UARTE 198 def_bool HAS_HW_NRF_UARTE2 199 depends on DT_HAS_NORDIC_NRF_UARTE_ENABLED 200 select NRF_UARTE_PERIPHERAL 201 help 202 Enable nRF UART with EasyDMA on port 2. 203 204if UART_2_NRF_UARTE 205 206config UART_2_INTERRUPT_DRIVEN 207 bool "Interrupt support on port 2" 208 depends on UART_INTERRUPT_DRIVEN 209 default y 210 help 211 This option enables UART interrupt support on port 2. 212 213config UART_2_ASYNC 214 bool "Asynchronous API support on port 2" 215 depends on UART_ASYNC_API && !UART_2_INTERRUPT_DRIVEN 216 default y 217 help 218 This option enables UART Asynchronous API support on port 2. 219 220config UART_2_ENHANCED_POLL_OUT 221 bool "Efficient poll out on port 2" 222 default y 223 help 224 When enabled, polling out does not trigger interrupt which stops TX. 225 Feature uses a PPI channel. 226 227config UART_2_NRF_PARITY_BIT 228 bool "Parity bit" 229 help 230 Enable parity bit. 231 232config UART_2_NRF_TX_BUFFER_SIZE 233 int "Size of RAM buffer" 234 range 1 65535 235 default 32 236 help 237 Size of the transmit buffer for API function: fifo_fill. 238 This value is limited by range of TXD.MAXCNT register for 239 particular SoC. 240 241config UART_2_NRF_HW_ASYNC 242 bool "Use hardware RX byte counting" 243 depends on UART_2_ASYNC 244 help 245 If default driver uses interrupts to count incoming bytes, it is possible 246 that with higher speeds and/or high cpu load some data can be lost. 247 It is recommended to use hardware byte counting in such scenarios. 248 Hardware RX byte counting requires timer instance and one PPI channel 249 250config UART_2_NRF_ASYNC_LOW_POWER 251 bool "Low power mode" 252 depends on UART_ASYNC_API 253 help 254 When enabled, UARTE is enabled before each TX or RX usage and disabled 255 when not used. Disabling UARTE while in idle allows to achieve lowest 256 power consumption. It is only feasible if receiver is not always on. 257 258config UART_2_NRF_HW_ASYNC_TIMER 259 int "Timer instance" 260 depends on UART_2_NRF_HW_ASYNC 261 262config UART_2_GPIO_MANAGEMENT 263 bool "GPIO management on port 2" 264 depends on PM_DEVICE 265 default y 266 help 267 If enabled, the driver will configure the GPIOs used by the uart to 268 their default configuration when device is powered down. The GPIOs 269 will be configured back to correct state when UART is powered up. 270 271endif # UART_2_NRF_UARTE 272 273# ----------------- port 3 ----------------- 274config UART_3_NRF_UARTE 275 def_bool HAS_HW_NRF_UARTE3 276 depends on DT_HAS_NORDIC_NRF_UARTE_ENABLED 277 select NRF_UARTE_PERIPHERAL 278 help 279 Enable nRF UART with EasyDMA on port 3. 280 281if UART_3_NRF_UARTE 282 283config UART_3_INTERRUPT_DRIVEN 284 bool "Interrupt support on port 3" 285 depends on UART_INTERRUPT_DRIVEN 286 default y 287 help 288 This option enables UART interrupt support on port 3. 289 290config UART_3_ASYNC 291 bool "Asynchronous API support on port 3" 292 depends on UART_ASYNC_API && !UART_3_INTERRUPT_DRIVEN 293 default y 294 help 295 This option enables UART Asynchronous API support on port 3. 296 297config UART_3_ENHANCED_POLL_OUT 298 bool "Efficient poll out on port 3" 299 default y 300 help 301 When enabled, polling out does not trigger interrupt which stops TX. 302 Feature uses a PPI channel. 303 304config UART_3_NRF_PARITY_BIT 305 bool "Parity bit" 306 help 307 Enable parity bit. 308 309config UART_3_NRF_TX_BUFFER_SIZE 310 int "Size of RAM buffer" 311 range 1 65535 312 default 32 313 help 314 Size of the transmit buffer for API function: fifo_fill. 315 This value is limited by range of TXD.MAXCNT register for 316 particular SoC. 317 318config UART_3_NRF_HW_ASYNC 319 bool "Use hardware RX byte counting" 320 depends on UART_3_ASYNC 321 help 322 If default driver uses interrupts to count incoming bytes, it is possible 323 that with higher speeds and/or high cpu load some data can be lost. 324 It is recommended to use hardware byte counting in such scenarios. 325 Hardware RX byte counting requires timer instance and one PPI channel 326 327config UART_3_NRF_ASYNC_LOW_POWER 328 bool "Low power mode" 329 depends on UART_ASYNC_API 330 help 331 When enabled, UARTE is enabled before each TX or RX usage and disabled 332 when not used. Disabling UARTE while in idle allows to achieve lowest 333 power consumption. It is only feasible if receiver is not always on. 334 335config UART_3_NRF_HW_ASYNC_TIMER 336 int "Timer instance" 337 depends on UART_3_NRF_HW_ASYNC 338 339config UART_3_GPIO_MANAGEMENT 340 bool "GPIO management on port 3" 341 depends on PM_DEVICE 342 default y 343 help 344 If enabled, the driver will configure the GPIOs used by the uart to 345 their default configuration when device is powered down. The GPIOs 346 will be configured back to correct state when UART is powered up. 347 348endif # UART_3_NRF_UARTE 349 350 351config NRFX_TIMER0 352 default y 353 depends on UART_0_NRF_HW_ASYNC_TIMER = 0 \ 354 || UART_1_NRF_HW_ASYNC_TIMER = 0 \ 355 || UART_2_NRF_HW_ASYNC_TIMER = 0 \ 356 || UART_3_NRF_HW_ASYNC_TIMER = 0 357 358config NRFX_TIMER1 359 default y 360 depends on UART_0_NRF_HW_ASYNC_TIMER = 1 \ 361 || UART_1_NRF_HW_ASYNC_TIMER = 1 \ 362 || UART_2_NRF_HW_ASYNC_TIMER = 1 \ 363 || UART_3_NRF_HW_ASYNC_TIMER = 1 364 365config NRFX_TIMER2 366 default y 367 depends on UART_0_NRF_HW_ASYNC_TIMER = 2 \ 368 || UART_1_NRF_HW_ASYNC_TIMER = 2 \ 369 || UART_2_NRF_HW_ASYNC_TIMER = 2 \ 370 || UART_3_NRF_HW_ASYNC_TIMER = 2 371 372config NRFX_TIMER3 373 default y 374 depends on UART_0_NRF_HW_ASYNC_TIMER = 3 \ 375 || UART_1_NRF_HW_ASYNC_TIMER = 3 \ 376 || UART_2_NRF_HW_ASYNC_TIMER = 3 \ 377 || UART_3_NRF_HW_ASYNC_TIMER = 3 378 379config NRFX_TIMER4 380 default y 381 depends on UART_0_NRF_HW_ASYNC_TIMER = 4 \ 382 || UART_1_NRF_HW_ASYNC_TIMER = 4 \ 383 || UART_2_NRF_HW_ASYNC_TIMER = 4 \ 384 || UART_3_NRF_HW_ASYNC_TIMER = 4 385 386 387config UARTE_NRF_HW_ASYNC 388 def_bool y 389 depends on UART_0_NRF_HW_ASYNC \ 390 || UART_1_NRF_HW_ASYNC \ 391 || UART_2_NRF_HW_ASYNC \ 392 || UART_3_NRF_HW_ASYNC 393 select NRFX_PPI if HAS_HW_NRF_PPI 394 select NRFX_DPPI if HAS_HW_NRF_DPPIC 395 396config UART_ENHANCED_POLL_OUT 397 def_bool y 398 depends on UART_0_ENHANCED_POLL_OUT \ 399 || UART_1_ENHANCED_POLL_OUT \ 400 || UART_2_ENHANCED_POLL_OUT \ 401 || UART_3_ENHANCED_POLL_OUT 402 select NRFX_PPI if HAS_HW_NRF_PPI 403 select NRFX_DPPI if HAS_HW_NRF_DPPIC 404 405config NRF_UART_PERIPHERAL 406 bool 407 408config NRF_UARTE_PERIPHERAL 409 bool 410 411endif # UART_NRFX 412
