1# Intel64-specific X86 subarchitecture options 2 3# Copyright (c) 2019 Intel Corp. 4# SPDX-License-Identifier: Apache-2.0 5 6if X86_64 7 8config MAIN_STACK_SIZE 9 default 8192 10 11config IDLE_STACK_SIZE 12 default 4096 13 14config ISR_STACK_SIZE 15 default 16384 16 17config TEST_EXTRA_STACK_SIZE 18 default 4096 19 20config SYSTEM_WORKQUEUE_STACK_SIZE 21 default 8192 22 23config X86_EXCEPTION_STACK_SIZE 24 int "Size of the exception stack(s)" 25 default 4096 26 help 27 The exception stack(s) (one per CPU) are used both for exception 28 processing and early kernel/CPU initialization. They need only 29 support limited call-tree depth and must fit into the low core, 30 so they are typically smaller than the ISR stacks. 31 32config ARCH_HAS_STACKWALK 33 bool 34 default y 35 select DEBUG_INFO 36 select THREAD_STACK_INFO 37 depends on !OMIT_FRAME_POINTER 38 depends on NO_OPTIMIZATIONS 39 help 40 Internal config to indicate that the arch_stack_walk() API is implemented 41 and it can be enabled. 42 43config SCHED_IPI_VECTOR 44 int "IDT vector to use for scheduler IPI" 45 default 34 46 range 33 $(UINT8_MAX) 47 depends on SMP 48 49config TLB_IPI_VECTOR 50 int "IDT vector to use for TLB shootdown IPI" 51 default 35 52 range 33 $(UINT8_MAX) 53 depends on SMP 54 55# We should really only have to provide one of the following two values, 56# but a bug in the Zephyr SDK for x86 precludes the use of division in 57# the assembler. For now, we require that these values be specified manually, 58# and we check to be sure they're a valid combination in arch.h. yes, ugh. 59 60config ISR_DEPTH 61 int "Maximum IRQ nesting depth" 62 default 4 63 help 64 The more nesting allowed, the more room is required for IRQ stacks. 65 66config ISR_SUBSTACK_SIZE 67 int "Size of ISR substacks" 68 default 4096 69 help 70 Number of bytes from the ISR stack to reserve for each nested IRQ 71 level. Must be a multiple of 16 to main stack alignment. Note that 72 CONFIG_ISR_SUBSTACK_SIZE * CONFIG_ISR_DEPTH must be equal to 73 CONFIG_ISR_STACK_SIZE. 74 75config X86_STACK_PROTECTION 76 bool 77 default y if HW_STACK_PROTECTION 78 select THREAD_STACK_INFO 79 imply THREAD_STACK_MEM_MAPPED 80 help 81 This option leverages the MMU to cause a system fatal error if the 82 bounds of the current process stack are overflowed. This is done 83 by preceding all stack areas with a 4K guard page. 84 85config X86_USERSPACE 86 bool 87 default y if USERSPACE 88 select THREAD_STACK_INFO 89 help 90 This option enables APIs to drop a thread's privileges down to ring 3, 91 supporting user-level threads that are protected from each other and 92 from crashing the kernel. 93 94endif # X86_64 95