1# Copyright (c) 2021 Telink Semiconductor
2# SPDX-License-Identifier: Apache-2.0
3
4config SOC_SERIES_TLSR951X
5	bool
6	select RISCV
7	select RISCV_ISA_RV32I
8	select RISCV_ISA_EXT_M
9	select RISCV_ISA_EXT_A
10	select RISCV_ISA_EXT_C
11	select RISCV_ISA_EXT_ZICSR
12	select RISCV_ISA_EXT_ZIFENCEI
13	select RISCV_PRIVILEGED
14	select RISCV_HAS_PLIC
15	select RISCV_SOC_HAS_GP_RELATIVE_ADDRESSING
16	select HAS_TELINK_DRIVERS
17	select ATOMIC_OPERATIONS_BUILTIN
18	select CPU_HAS_FPU
19	select INCLUDE_RESET_VECTOR
20	imply XIP
21	select SOC_EARLY_INIT_HOOK
22
23if SOC_SERIES_TLSR951X
24
25config TELINK_B91_HWDSP
26	bool "Support Hardware DSP"
27	select RISCV_SOC_CONTEXT_SAVE
28
29config TELINK_B91_PFT_ARCH
30	bool "Support performance throttling"
31	default y
32	select RISCV_SOC_CONTEXT_SAVE
33
34endif # SOC_SERIES_TLSR951X
35