1# Copyright (c) 2024 Analog Devices, Inc.
2# SPDX-License-Identifier: Apache-2.0
3
4config SPI_MAX32
5	bool "MAX32 MCU SPI controller driver"
6	default y
7	depends on DT_HAS_ADI_MAX32_SPI_ENABLED
8	select PINCTRL
9	help
10	  Enable SPI support on the MAX32 family of processors.
11
12if SPI_MAX32
13
14config SPI_MAX32_INTERRUPT
15	bool "MAX32 MCU SPI Interrupt Support"
16	help
17	  Enable interrupt support for MAX32 MCU SPI driver.
18
19config SPI_MAX32_DMA
20	bool "MAX32 MCU SPI DMA Support"
21	select DMA
22	select CACHE_MANAGEMENT if CPU_HAS_DCACHE
23	help
24	  Enable DMA support for MAX32 MCU SPI driver.
25
26config SPI_MAX32_RTIO
27	bool "MAX32 SPI RTIO Support"
28	default y if SPI_RTIO
29	depends on !SPI_ASYNC
30	select SPI_MAX32_INTERRUPT
31
32if SPI_MAX32_RTIO
33config SPI_MAX32_RTIO_SQ_SIZE
34	int "Number of available submission queue entries"
35	default 8 # Sensible default that covers most common spi transactions
36	help
37	  When RTIO is used with SPI, each driver holds a context with which blocking
38	  API calls use to perform SPI transactions. This queue needs to be as deep
39	  as the longest set of spi_buf_sets used, where normal SPI operations are
40	  used (equal length buffers). It may need to be slightly deeper where the
41	  spi buffer sets for transmit/receive are not always matched equally in
42	  length as these are transformed into normal transceives.
43
44config SPI_MAX32_RTIO_CQ_SIZE
45	int "Number of available completion queue entries"
46	default 8 # Sensible default that covers most common spi transactions
47
48endif # SPI_MAX32_RTIO
49
50endif # SPI_MAX32
51