1# Copyright (c) 2017 Christian Taedcke
2# Copyright (c) 2018 Gil Benkoe
3# SPDX-License-Identifier: Apache-2.0
4
5config SOC_FAMILY_EXX32
6	bool
7	select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
8	select BUILD_OUTPUT_HEX
9
10if SOC_FAMILY_EXX32
11
12config SOC_FAMILY
13	string
14	default "silabs_exx32"
15
16source "soc/arm/silabs_exx32/*/Kconfig.soc"
17
18config SOC_PART_NUMBER
19	string
20	help
21	  This string holds the full part number of the SoC. It is a hidden option
22	  that you should not set directly. The part number selection choice defines
23	  the default value for this string.
24
25config SOC_GECKO_SERIES0
26	bool
27	help
28	  Set if we're building for Gecko Series 0 SoC.
29	  This is equivalent of _SILICON_LABS_32B_SERIES_0 definition in HAL
30	  code.
31
32config SOC_GECKO_SERIES1
33	bool
34	help
35	  Set if we're building for Gecko Series 1 SoC.
36	  This is equivalent of _SILICON_LABS_32B_SERIES_1 definition in HAL
37	  code.
38
39config SOC_GECKO_SERIES2
40	bool
41	help
42	  Set if we're building for Gecko Series 2 SoC.
43	  This is equivalent of _SILICON_LABS_32B_SERIES_2 definition in HAL
44	  code.
45
46config SOC_GECKO_BURTC
47	bool
48	help
49	  Set if the Back-Up Real Time Counter (BURTC) HAL module is used.
50
51config SOC_GECKO_CORE
52	bool
53	default y
54	help
55	  Set if the Core interrupt handling (CORE) HAL module is used.
56
57config SOC_GECKO_ADC
58	bool
59	help
60	  Set if the Analog to Digital Converter (ADC) HAL module is used.
61
62config SOC_GECKO_IADC
63	bool
64	help
65	  Set if the Incremental Analog to Digital Converter (IADC) HAL module is used.
66
67config SOC_GECKO_CRYOTIMER
68	bool
69	help
70	  Set if the Ultra Low Energy Timer/Counter (CRYOTIMER) HAL module is used.
71
72config SOC_GECKO_EMU
73	bool
74	help
75	  Set if the Energy Management Unit (EMU) HAL module is used.
76
77config SOC_GECKO_GPIO
78	bool
79	help
80	  Set if the General Purpose Input/Output (GPIO) HAL module is used.
81
82config SOC_GECKO_I2C
83	bool
84	help
85	  Set if the Inter-Integrated Circuit Interface (I2C) HAL module is used.
86
87config SOC_GECKO_LETIMER
88	bool
89	help
90	  Set if the Low Energy Timer (LETIMER) HAL module is used.
91
92config SOC_GECKO_LEUART
93	bool
94	help
95	  Set if the Low Energy Universal Asynchronous Receiver/Transmitter (LEUART)
96	  HAL module is used.
97
98config SOC_GECKO_MSC
99	bool
100	help
101	  Set if the Memory System Controller (MSC) HAL module is used.
102
103config SOC_GECKO_PRS
104	bool
105	help
106	  Set if the Peripheral Reflex System (PRS) HAL module is used.
107
108config SOC_GECKO_RMU
109	bool
110	help
111	  Set if the Reset Management Unit (RMU) HAL module is used.
112
113config SOC_GECKO_RTC
114	bool
115	help
116	  Set if the Real Time Counter (RTC) HAL module is used.
117
118config SOC_GECKO_RTCC
119	bool
120	help
121	  Set if the Real Time Counter and Calendar (RTCC) HAL module is used.
122
123config SOC_GECKO_SE
124	bool
125	help
126	  Set if the Secure Element (SE) HAL module is used.
127
128config SOC_GECKO_TIMER
129	bool
130	help
131	  Set if the Timer/Counter (TIMER) HAL module is used.
132
133config SOC_GECKO_USART
134	bool
135	help
136	  Set if the Universal Synchronous Asynchronous Receiver/Transmitter (USART)
137	  HAL module is used.
138
139config SOC_GECKO_WDOG
140	bool
141	help
142	  Set if the Watchdog Timer (WDOG) HAL module is used.
143
144config SOC_GECKO_TRNG
145	bool
146	help
147	  Set if the SoC has a True Random Number Generator (TRNG) module.
148
149if PM
150
151config SOC_GECKO_PM_BACKEND_PMGR
152	bool
153	depends on SOC_GECKO_DEV_INIT
154	default y if SOC_GECKO_SERIES2
155	help
156	  Implement PM using sl_power_manager service from Gecko SDK
157
158config SOC_GECKO_PM_BACKEND_EMU
159	bool
160	default y if !SOC_GECKO_PM_BACKEND_PMGR
161	help
162	  Implement PM using direct calls to EMU driver in emlib
163
164endif
165
166config SOC_GECKO_EMU_DCDC
167	bool "SoC DC/DC regulator"
168	select SOC_GECKO_EMU
169	help
170	  Enable the on chip DC/DC regulator
171
172choice SOC_GECKO_EMU_DCDC_MODE
173	prompt "DC/DC mode"
174	depends on SOC_GECKO_EMU_DCDC
175	help
176	  Select power configuration mode of the on chip DC/DC converter.
177
178	config SOC_GECKO_EMU_DCDC_MODE_UNCONFIGURED
179		bool "Initial / Unconfigured"
180
181	config SOC_GECKO_EMU_DCDC_MODE_ON
182		bool "DC/DC On"
183
184	config SOC_GECKO_EMU_DCDC_MODE_OFF
185		bool "DC/DC Off"
186
187	config SOC_GECKO_EMU_DCDC_MODE_BYPASS
188		bool "Bypass"
189endchoice
190
191config CRYPTO_ACC_GECKO_TRNG
192	bool
193	help
194	  Enable Entropy driver based on the CRYPTO_ACC module for Silicon Labs
195	  Gecko chips.
196
197config SOC_GECKO_DEV_INIT
198	bool
199	help
200	  Use the device initialization routines from the device_init service
201	  in Silicon Labs HAL. These routines initialize and tune HFXOs,
202	  configures DPLLs and manages the Energy Management Unit.
203
204	  Disabling these services may negatively impact counter and timer
205	  routines in EXX32 series SoCs.
206
207config COUNTER_GECKO_STIMER
208	bool
209	help
210	  Enable counter driver based on the Sleep Timer driver for Silicon Labs
211	  Gecko chips.
212
213config SOC_GECKO_CMU
214	bool
215	help
216	  Set if the clock management unit (CMU) is present in the SoC.
217
218if SOC_GECKO_CMU
219
220config CMU_NEED_LFXO
221	bool
222	help
223	  Set if LFXO oscillator should be configured and enabled, potentially
224	  in on-demand mode, after SoC is initialized.
225
226choice
227	prompt "High Frequency Clock Selection"
228	default CMU_HFCLK_HFXO
229
230config CMU_HFCLK_HFXO
231	bool "External high frequency crystal oscillator"
232	help
233	  Set this option to use the external high frequency crystal oscillator
234	  as high frequency clock.
235
236config CMU_HFCLK_LFXO
237	bool "External low frequency crystal oscillator"
238	select CMU_NEED_LFXO
239	help
240	  Set this option to use the external low frequency crystal oscillator
241	  as high frequency clock.
242
243config CMU_HFCLK_HFRCO
244	bool "Internal high frequency RC oscillator"
245	help
246	  Set this option to use the internal high frequency RC oscillator as high frequency clock.
247
248endchoice
249
250
251choice
252	prompt "BURTC Clock Selection"
253	depends on SOC_GECKO_BURTC
254	default CMU_BURTCCLK_LFRCO
255
256config CMU_BURTCCLK_LFXO
257	bool "LFXO - external low frequency crystal oscillator"
258	select CMU_NEED_LFXO
259	help
260	  Set this option to use LFXO - the external low freqency crystal oscillator
261	  as BURTC clock.
262	  Frequency is set by external crystal, typically 32.768 kHz.
263
264config CMU_BURTCCLK_LFRCO
265	bool "LFRCO - internal low frequency RC oscillator"
266	help
267	  Set this option to use LFRCO - the internal low freqency RC oscillator
268	  as BURTC clock.
269	  Frequency is approximately 32.768 kHz.
270
271config CMU_BURTCCLK_ULFRCO
272	bool "ULFRCO - internal ultra low frequency RC oscillator"
273	help
274	  Set this option to use ULFRCO - the external low freqency crystal oscillator
275	  as BURTC clock.
276	  Frequency is approximately 1 kHz.
277
278endchoice
279
280
281config CMU_HFXO_FREQ
282	int "External high frequency oscillator frequency"
283	help
284	  Set the external high frequency oscillator frequency in Hz. This should be set by the
285	  board's defconfig.
286
287config CMU_LFXO_FREQ
288	int "External low frequency oscillator frequency"
289	help
290	  Set the external low frequency oscillator frequency in Hz. This should be set by the
291	  board's defconfig.
292
293config CMU_HFRCO_FREQ
294	int "Internal high frequency RC oscillator frequency"
295	default 0
296	depends on SOC_GECKO_HAS_HFRCO_FREQRANGE
297	help
298	  Set the internal high frequency RC oscillator frequency in Hz. This should be set by the
299	  board's defconfig. Only supported values may be used here. Setting this to 0, skips the
300	  configuration of the high frequency RC oscillator completely. This may be desired, if
301	  the bootloader already configured it properly or the device's default clock source should
302	  be used with it's default configuration.
303
304endif # SOC_GECKO_CMU
305
306config SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
307	bool
308	help
309	  If enabled, indicates that SoC allows to configure individual pin
310	  locations. This is supported by e.g. efr32fg1p, efr32mg12p series.
311	  If disabled, indicates that pin locations are configured in groups.
312	  This is supported by e.g. efm32hg, efm32wg series.
313
314config SOC_GECKO_HAS_ERRATA_RTCC_E201
315	bool
316	help
317	  Set if the SoC is affected by errata RTCC_E201:
318	  "When the RTCC is configured with a prescaler, the CCV1 top value enable
319	  feature enabled by setting CCV1TOP in RTCC_CTRL fails to wrap the counter
320	  when RTCC_CNT is equal to RTCC_CC1_CCV, as intended."
321
322config SOC_GECKO_HAS_HFRCO_FREQRANGE
323	bool
324	help
325	  If enabled, indicates that configuration of HFRCO frequency for this SOC is supported
326	  via FREQRANGE field. This is supported for e.g. efr32fg1p, efr32mg12p series.
327	  If disabled, indicates that configuration of HFRCO frequency for corresponding SOC
328	  is not supported via this field. This is the case for e.g. efm32hg, efm32wg series.
329
330config SOC_GECKO_HAS_RADIO
331	bool
332	help
333	  If enabled, indicates that the SoC has a Radio PHY.
334
335config SOC_GECKO_USE_RAIL
336	bool "Use RAIL (Radio Abstraction Interface Layer)"
337	depends on SOC_GECKO_HAS_RADIO
338	help
339	  RAIL (Radio Abstraction Interface Layer) is a library needed to use the EFR radio
340	  hardware. This option enable the proper set of features to allow to properly compile
341	  with the RAIL blob.
342
343config SOC_GECKO_CUSTOM_RADIO_PHY
344	bool "Use RAIL for custom radio phy packet sending and receiving"
345	depends on SOC_GECKO_HAS_RADIO
346	select SOC_GECKO_USE_RAIL
347	help
348	  If enabled, RAIL can be used for user generated custom radio phy
349	  management, sending and receiving packets on radio phy. User has
350	  to provide the radio_config.c and radio_config.h files for the phy.
351
352endif # SOC_FAMILY_EXX32
353