1# Copyright (c) 2017 Christian Taedcke 2# Copyright (c) 2018 Gil Benkoe 3# SPDX-License-Identifier: Apache-2.0 4 5rsource "*/Kconfig" 6 7if SOC_FAMILY_SILABS_S0 || SOC_FAMILY_SILABS_S1 || SOC_FAMILY_SILABS_S2 8 9config SOC_GECKO_SDID 10 int 11 help 12 Gecko SDK sometime refere to the chipset using the internal ID. This 13 entry reflects this ID. 14 15config SOC_GECKO_BURTC 16 bool 17 help 18 Set if the Back-Up Real Time Counter (BURTC) HAL module is used. 19 20config SOC_GECKO_CORE 21 bool 22 default y 23 help 24 Set if the Core interrupt handling (CORE) HAL module is used. 25 26config SOC_GECKO_ADC 27 bool 28 help 29 Set if the Analog to Digital Converter (ADC) HAL module is used. 30 31config SOC_GECKO_IADC 32 bool 33 help 34 Set if the Incremental Analog to Digital Converter (IADC) HAL module is used. 35 36config SOC_GECKO_CRYOTIMER 37 bool 38 help 39 Set if the Ultra Low Energy Timer/Counter (CRYOTIMER) HAL module is used. 40 41config SOC_GECKO_EMU 42 bool 43 help 44 Set if the Energy Management Unit (EMU) HAL module is used. 45 46config SOC_GECKO_GPIO 47 bool 48 help 49 Set if the General Purpose Input/Output (GPIO) HAL module is used. 50 51config SOC_GECKO_I2C 52 bool 53 help 54 Set if the Inter-Integrated Circuit Interface (I2C) HAL module is used. 55 56config SOC_GECKO_LETIMER 57 bool 58 help 59 Set if the Low Energy Timer (LETIMER) HAL module is used. 60 61config SOC_GECKO_LEUART 62 bool 63 help 64 Set if the Low Energy Universal Asynchronous Receiver/Transmitter (LEUART) 65 HAL module is used. 66 67config SOC_GECKO_LDMA 68 bool 69 help 70 Set if the Linked Direct Memory Access (LDMA) HAL module is used. 71 72config SOC_GECKO_MSC 73 bool 74 help 75 Set if the Memory System Controller (MSC) HAL module is used. 76 77config SOC_GECKO_PRS 78 bool 79 help 80 Set if the Peripheral Reflex System (PRS) HAL module is used. 81 82config SOC_GECKO_RMU 83 bool 84 help 85 Set if the Reset Management Unit (RMU) HAL module is used. 86 87config SOC_GECKO_RTC 88 bool 89 help 90 Set if the Real Time Counter (RTC) HAL module is used. 91 92config SOC_GECKO_RTCC 93 bool 94 help 95 Set if the Real Time Counter and Calendar (RTCC) HAL module is used. 96 97config SOC_GECKO_SE 98 bool 99 help 100 Set if the Secure Element (SE) HAL module is used. 101 102config SOC_GECKO_TIMER 103 bool 104 help 105 Set if the Timer/Counter (TIMER) HAL module is used. 106 107config SOC_GECKO_USART 108 bool 109 help 110 Set if the Universal Synchronous Asynchronous Receiver/Transmitter (USART) 111 HAL module is used. 112 113config SOC_GECKO_EUSART 114 bool 115 help 116 Set if the Extended Universal Synchronous Asynchronous Receiver/Transmitter (EUSART) 117 HAL module is used. 118 119config SOC_GECKO_WDOG 120 bool 121 help 122 Set if the Watchdog Timer (WDOG) HAL module is used. 123 124config SOC_GECKO_TRNG 125 bool 126 help 127 Set if the SoC has a True Random Number Generator (TRNG) module. 128 129config SOC_SILABS_SLEEPTIMER 130 bool 131 select SOC_GECKO_PRS 132 select SOC_GECKO_RTCC if SOC_SERIES_EFR32BG22 || SOC_SERIES_EFR32BG27 || SOC_SERIES_EFR32MG21 133 help 134 Set if the Sleeptimer HAL module is used. 135 136config SOC_SILABS_HFXO_MANAGER 137 bool 138 default y if PM && $(dt_nodelabel_enabled,sysrtc0) && $(dt_nodelabel_enabled,hfxo) 139 help 140 Set if the HFXO Manager HAL module is used. 141 142if PM 143 144config SOC_GECKO_PM_BACKEND_PMGR 145 bool 146 depends on SOC_GECKO_DEV_INIT 147 default y if SOC_FAMILY_SILABS_S2 148 help 149 Implement PM using sl_power_manager service from Gecko SDK 150 151config SOC_GECKO_PM_BACKEND_EMU 152 bool 153 default y if !SOC_GECKO_PM_BACKEND_PMGR 154 help 155 Implement PM using direct calls to EMU driver in emlib 156 157endif # PM 158 159config SOC_GECKO_EMU_DCDC 160 bool "SoC DC/DC regulator" 161 select SOC_GECKO_EMU 162 help 163 Enable the on chip DC/DC regulator 164 165choice SOC_GECKO_EMU_DCDC_MODE 166 prompt "DC/DC mode" 167 depends on SOC_GECKO_EMU_DCDC 168 help 169 Select power configuration mode of the on chip DC/DC converter. 170 171 config SOC_GECKO_EMU_DCDC_MODE_UNCONFIGURED 172 bool "Initial / Unconfigured" 173 174 config SOC_GECKO_EMU_DCDC_MODE_ON 175 bool "DC/DC On" 176 177 config SOC_GECKO_EMU_DCDC_MODE_OFF 178 bool "DC/DC Off" 179 180 config SOC_GECKO_EMU_DCDC_MODE_BYPASS 181 bool "Bypass" 182endchoice 183 184config CRYPTO_ACC_GECKO_TRNG 185 bool 186 help 187 Enable Entropy driver based on the CRYPTO_ACC module for Silicon Labs 188 Gecko chips. 189 190config SOC_GECKO_DEV_INIT 191 bool 192 help 193 Use the device initialization routines from the device_init service 194 in Silicon Labs HAL. These routines initialize and tune HFXOs, 195 configures DPLLs and manages the Energy Management Unit. 196 197 Disabling these services may negatively impact counter and timer 198 routines in Silabs SoCs. 199 200config COUNTER_GECKO_STIMER 201 bool 202 help 203 Enable counter driver based on the Sleep Timer driver for Silicon Labs 204 Gecko chips. 205 206config SOC_GECKO_CMU 207 bool 208 help 209 Set if the clock management unit (CMU) is present in the SoC. 210 211if SOC_GECKO_CMU 212 213config CMU_NEED_LFXO 214 bool 215 help 216 Set if LFXO oscillator should be configured and enabled, potentially 217 in on-demand mode, after SoC is initialized. 218 219choice 220 prompt "High Frequency Clock Selection" 221 default CMU_HFCLK_HFXO 222 223config CMU_HFCLK_HFXO 224 bool "External high frequency crystal oscillator" 225 help 226 Set this option to use the external high frequency crystal oscillator 227 as high frequency clock. 228 229config CMU_HFCLK_LFXO 230 bool "External low frequency crystal oscillator" 231 select CMU_NEED_LFXO 232 help 233 Set this option to use the external low frequency crystal oscillator 234 as high frequency clock. 235 236config CMU_HFCLK_HFRCO 237 bool "Internal high frequency RC oscillator" 238 help 239 Set this option to use the internal high frequency RC oscillator as high frequency clock. 240 241endchoice 242 243config CMU_HFXO_FREQ 244 int "External high frequency oscillator frequency" 245 help 246 Set the external high frequency oscillator frequency in Hz. This should be set by the 247 board's defconfig. 248 249config CMU_LFXO_FREQ 250 int "External low frequency oscillator frequency" 251 help 252 Set the external low frequency oscillator frequency in Hz. This should be set by the 253 board's defconfig. 254 255config CMU_HFRCO_FREQ 256 int "Internal high frequency RC oscillator frequency" 257 default 0 258 depends on SOC_GECKO_HAS_HFRCO_FREQRANGE 259 help 260 Set the internal high frequency RC oscillator frequency in Hz. This should be set by the 261 board's defconfig. Only supported values may be used here. Setting this to 0, skips the 262 configuration of the high frequency RC oscillator completely. This may be desired, if 263 the bootloader already configured it properly or the device's default clock source should 264 be used with it's default configuration. 265 266endif # SOC_GECKO_CMU 267 268config SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION 269 bool 270 help 271 If enabled, indicates that SoC allows to configure individual pin 272 locations. This is supported by e.g. efr32fg1p, efr32mg12p series. 273 If disabled, indicates that pin locations are configured in groups. 274 This is supported by e.g. efm32hg, efm32wg series. 275 276config SOC_GECKO_HAS_ERRATA_RTCC_E201 277 bool 278 help 279 Set if the SoC is affected by errata RTCC_E201: 280 "When the RTCC is configured with a prescaler, the CCV1 top value enable 281 feature enabled by setting CCV1TOP in RTCC_CTRL fails to wrap the counter 282 when RTCC_CNT is equal to RTCC_CC1_CCV, as intended." 283 284config SOC_GECKO_HAS_HFRCO_FREQRANGE 285 bool 286 help 287 If enabled, indicates that configuration of HFRCO frequency for this SOC is supported 288 via FREQRANGE field. This is supported for e.g. efr32fg1p, efr32mg12p series. 289 If disabled, indicates that configuration of HFRCO frequency for corresponding SOC 290 is not supported via this field. This is the case for e.g. efm32hg, efm32wg series. 291 292config SOC_GECKO_HAS_RADIO 293 bool 294 help 295 If enabled, indicates that the SoC has a Radio PHY. 296 297config SOC_GECKO_USE_RAIL 298 bool "Use RAIL (Radio Abstraction Interface Layer)" 299 depends on SOC_GECKO_HAS_RADIO 300 help 301 RAIL (Radio Abstraction Interface Layer) is a library needed to use the EFR radio 302 hardware. This option enable the proper set of features to allow to properly compile 303 with the RAIL blob. 304 305config SOC_GECKO_CUSTOM_RADIO_PHY 306 bool "Use RAIL for custom radio phy packet sending and receiving" 307 depends on SOC_GECKO_HAS_RADIO 308 select SOC_GECKO_USE_RAIL 309 help 310 If enabled, RAIL can be used for user generated custom radio phy 311 management, sending and receiving packets on radio phy. User has 312 to provide the radio_config.c and radio_config.h files for the phy. 313 314endif # SOC_FAMILY_SILABS_S0 || SOC_FAMILY_SILABS_S1 || SOC_FAMILY_SILABS_S2 315