1menu "Power Management" 2 config PM_ENABLE 3 bool "Support for power management" 4 default n 5 help 6 If enabled, application is compiled with support for power management. 7 This option has run-time overhead (increased interrupt latency, 8 longer time to enter idle state), and it also reduces accuracy of 9 RTOS ticks and timers used for timekeeping. 10 Enable this option if application uses power management APIs. 11 12 config PM_DFS_INIT_AUTO 13 bool "Enable dynamic frequency scaling (DFS) at startup" 14 depends on PM_ENABLE 15 default n 16 help 17 If enabled, startup code configures dynamic frequency scaling. 18 Max CPU frequency is set to DEFAULT_CPU_FREQ_MHZ setting, 19 min frequency is set to XTAL frequency. 20 If disabled, DFS will not be active until the application 21 configures it using esp_pm_configure function. 22 23 24 config PM_USE_RTC_TIMER_REF 25 bool "Use RTC timer to prevent time drift (EXPERIMENTAL)" 26 depends on (PM_ENABLE && ESP_TIMER_IMPL_FRC2 && ESP_TIME_FUNCS_USE_RTC_TIMER) 27 default n 28 help 29 When APB clock frequency changes, high-resolution timer (esp_timer) 30 scale and base value need to be adjusted. Each adjustment may cause 31 small error, and over time such small errors may cause time drift. 32 If this option is enabled, RTC timer will be used as a reference to 33 compensate for the drift. 34 It is recommended that this option is only used if 32k XTAL is selected 35 as RTC clock source. 36 37 config PM_PROFILING 38 bool "Enable profiling counters for PM locks" 39 depends on PM_ENABLE 40 default n 41 help 42 If enabled, esp_pm_* functions will keep track of the amount of time 43 each of the power management locks has been held, and esp_pm_dump_locks 44 function will print this information. 45 This feature can be used to analyze which locks are preventing the chip 46 from going into a lower power state, and see what time the chip spends 47 in each power saving mode. This feature does incur some run-time 48 overhead, so should typically be disabled in production builds. 49 50 config PM_TRACE 51 bool "Enable debug tracing of PM using GPIOs" 52 depends on PM_ENABLE 53 default n 54 help 55 If enabled, some GPIOs will be used to signal events such as RTOS ticks, 56 frequency switching, entry/exit from idle state. Refer to pm_trace.c 57 file for the list of GPIOs. 58 This feature is intended to be used when analyzing/debugging behavior 59 of power management implementation, and should be kept disabled in 60 applications. 61 62 config PM_SLP_IRAM_OPT 63 bool "Put lightsleep related codes in internal RAM" 64 depends on FREERTOS_USE_TICKLESS_IDLE 65 help 66 If enabled, about 1.8KB of lightsleep related source code would be in IRAM and chip would sleep 67 longer for 760us at most each time. 68 This feature is intended to be used when lower power consumption is needed 69 while there is enough place in IRAM to place source code. 70 71 config PM_RTOS_IDLE_OPT 72 bool "Put RTOS IDLE related codes in internal RAM" 73 depends on FREERTOS_USE_TICKLESS_IDLE 74 help 75 If enabled, about 260B of RTOS_IDLE related source code would be in IRAM and chip would sleep 76 longer for 40us at most each time. 77 This feature is intended to be used when lower power consumption is needed 78 while there is enough place in IRAM to place source code. 79 80 config PM_SLP_DISABLE_GPIO 81 bool "Disable all GPIO when chip at sleep" 82 depends on FREERTOS_USE_TICKLESS_IDLE 83 help 84 This feature is intended to disable all GPIO pins at automantic sleep to get a lower power mode. 85 If enabled, chips will disable all GPIO pins at automantic sleep to reduce about 200~300 uA current. 86 If you want to specifically use some pins normally as chip wakes when chip sleeps, 87 you can call 'gpio_sleep_sel_dis' to disable this feature on those pins. 88 You can also keep this feature on and call 'gpio_sleep_set_direction' and 'gpio_sleep_set_pull_mode' 89 to have a different GPIO configuration at sleep. 90 Waring: If you want to enable this option on ESP32, you should enable `GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL` 91 at first, otherwise you will not be able to switch pullup/pulldown mode. 92 93 config PM_SLP_DEFAULT_PARAMS_OPT 94 bool 95 default n 96 97 config PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP 98 bool "Power down CPU in light sleep" 99 depends on IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 100 select PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP if ESP32S3_DATA_CACHE_16KB 101 default y 102 help 103 If enabled, the CPU will be powered down in light sleep. On esp32c3 soc, enabling this 104 option will consume 1.68 KB of internal RAM and will reduce sleep current consumption 105 by about 100 uA. On esp32s3 soc, enabling this option will consume 8.58 KB of internal 106 RAM and will reduce sleep current consumption by about 650 uA. 107 108 config PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP 109 bool "Power down I/D-cache tag memory in light sleep" 110 depends on IDF_TARGET_ESP32S3 && PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP 111 default y 112 help 113 If enabled, the I/D-cache tag memory will be retained in light sleep. Depending on the the 114 cache configuration, if this option is enabled, it will consume up to 9 KB of internal RAM. 115 116 config PM_UPDATE_CCOMPARE_HLI_WORKAROUND 117 bool 118 default y if PM_ENABLE && BTDM_CTRL_HLI 119 120endmenu # "Power Management" 121