1# Copyright (c) 2022 Carlo Caione <ccaione@baylibre.com>
2# SPDX-License-Identifier: Apache-2.0
3
4config PLIC
5	bool "Platform Level Interrupt Controller (PLIC)"
6	default y
7	depends on DT_HAS_SIFIVE_PLIC_1_0_0_ENABLED
8	select MULTI_LEVEL_INTERRUPTS
9	select 2ND_LEVEL_INTERRUPTS
10	help
11	  Platform Level Interrupt Controller provides support
12	  for external interrupt lines defined by the RISC-V SoC.
13
14if PLIC
15
16config PLIC_SUPPORTS_SOFT_INTERRUPT
17	bool
18	default y
19	depends on DT_HAS_ANDESTECH_NCEPLIC100_ENABLED
20	help
21	  Enabled when the PLIC supports software-triggered interrupts.
22
23config PLIC_SUPPORTS_TRIG_TYPE
24	bool
25	default y
26	depends on DT_HAS_ANDESTECH_NCEPLIC100_ENABLED
27	help
28	  Enabled when the PLIC supports multiple trigger types,
29	  such as level, edge, etc.
30
31if PLIC_SUPPORTS_TRIG_TYPE
32
33config PLIC_TRIG_TYPE_REG_OFFSET
34	hex "Trigger type register offset"
35	default 0x1080 if DT_HAS_ANDESTECH_NCEPLIC100_ENABLED
36	help
37	  Offset to the 'trigger type' register.
38
39config PLIC_TRIG_TYPE_BITWIDTH
40	int "Trigger type bitwidth"
41	default 1
42	help
43	  Number of bits required to differentiate between the trigger types.
44
45config PLIC_SUPPORTS_TRIG_EDGE
46	bool
47	default y
48	depends on DT_HAS_ANDESTECH_NCEPLIC100_ENABLED
49	help
50	  Enabled when the PLIC supports edge-triggered interrupt.
51
52endif # PLIC_SUPPORTS_TRIG_TYPE
53
54config PLIC_IRQ_AFFINITY
55	bool "Configure IRQ affinity"
56	depends on SMP
57	depends on MP_MAX_NUM_CPUS > 1
58	help
59	  Enable configuration of IRQ affinity.
60
61config PLIC_IRQ_AFFINITY_MASK
62	hex "Default IRQ affinity mask"
63	depends on PLIC_IRQ_AFFINITY
64	default 0x1
65	help
66	  Default mask for the driver when IRQ affinity is enabled.
67
68config PLIC_SHELL
69	bool "PLIC shell commands"
70	depends on SHELL
71	help
72	  Enable additional shell commands useful for debugging.
73	  Caution: This can use quite a bit of RAM (PLICs * IRQs * sizeof(uint16_t)).
74
75if PLIC_SHELL
76
77config PLIC_SHELL_IRQ_COUNT
78	bool "IRQ count shell commands"
79	default y
80	help
81	  Records the number of hits per interrupt line and provide shell commands to access them.
82	  Caution: This can use quite a bit of RAM (PLICs * IRQs * sizeof(PLIC_IRQ_COUNT_TYPE)).
83
84config PLIC_SHELL_IRQ_AFFINITY
85	bool "Shell commands to configure IRQ affinity"
86	default y
87	depends on PLIC_IRQ_AFFINITY
88	help
89	  Provide shell commands to configure IRQ affinity in runtime.
90
91endif # PLIC_SHELL
92
93endif # PLIC
94