1# Copyright 2024 Robert Slawinski <robert.slawinski1@gmail.com> 2# SPDX-License-Identifier: Apache-2.0 3 4# Davicom PHY DM8806 driver configuration options 5 6menuconfig PHY_DM8806 7 bool "Davicom PHY DM8806 driver" 8 default y 9 depends on DT_HAS_DAVICOM_DM8806_PHY_ENABLED 10 depends on MDIO 11 help 12 Enable driver for Davicom DM8806 PHY. 13 14if PHY_DM8806 15 16choice PHY_DM8806_TRIGGER_MODE 17 prompt "Trigger mode" 18 default PHY_DM8806_TRIGGER_GLOBAL_THREAD 19 help 20 Specify the type of triggering to be used by the driver. 21 22config PHY_DM8806_TRIGGER_NONE 23 bool "No trigger" 24 25config PHY_DM8806_TRIGGER_GLOBAL_THREAD 26 bool "Use global thread" 27 depends on GPIO 28 select PHY_DM8806_TRIGGER 29 30endchoice 31 32config PHY_DM8806_ENERGY_EFFICIENT_MODE 33 bool "Energy efficient mode" 34 help 35 By default in DM8806, the energy efficient mode is enabled. 36 It had been observed that the network randomly fails when 37 this mode is on. Thus, this symbol is by default disabled. 38 39config PHY_DM8806_TRIGGER 40 bool 41 42config PHY_DM8806_THREAD_PRIORITY 43 int "Thread priority" 44 depends on PHY_DM8806_TRIGGER_GLOBAL_THREAD 45 default 13 46 help 47 Priority of thread used by the driver to handle interrupts. 48 49config PHY_DM8806_THREAD_STACK_SIZE 50 int "Thread stack size" 51 depends on PHY_DM8806_TRIGGER_GLOBAL_THREAD 52 default 1024 53 help 54 Stack size of thread used by the driver to handle interrupts. 55 56config PHY_DM8806_SMI_BUS_CHECK 57 bool "Host SMI bus error check function" 58 default y 59 help 60 This functionality prevents the host SMI bus to be interferered by the 61 noise on board-level. During write procedure, the written value in 62 register will be applied until the correct checksum is written. In read 63 procedure, the hardware calculated checksum is compared with the software 64 calculated one to detect correctness of received data. 65 66config PHY_DM8806_SMI_BUS_CHECK_REPETITION 67 int "SMI bus transmission repetitions" 68 depends on PHY_DM8806_SMI_BUS_CHECK 69 default 5 70 help 71 The numbers of SMI bus transmission repetition in case if CRC checksum 72 fails during read or write. After this numbers of repetition, the reading 73 message is dropped and will not be passed to the system. In write 74 procedure, the written value in register will be applied until the correct 75 checksum is written to the PHY register. 76 77endif # PHY_DM8806 78