1# Copyright (c) 2016 Intel Corporation
2# Copyright (c) 2016, Freescale Semiconductor, Inc.
3# Copyright 2024 NXP
4# SPDX-License-Identifier: Apache-2.0
5
6config SOC_FAMILY_KINETIS
7	select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
8
9if SOC_FAMILY_KINETIS
10
11config HAS_OSC
12	bool
13	help
14	  Set if the oscillator (OSC) module is present in the SoC.
15
16config HAS_MCG
17	bool
18	help
19	  Set if the multipurpose clock generator (MCG) module is present in the SoC.
20
21if HAS_OSC
22
23choice
24	prompt "Oscillator Mode Selection"
25	default OSC_EXTERNAL
26
27config OSC_EXTERNAL
28	bool "External reference clock"
29	help
30	  Set this option to use the oscillator in external reference clock mode.
31
32config OSC_LOW_POWER
33	bool "Low power oscillator"
34	help
35	  Set this option to use the oscillator in low-power mode.
36
37config OSC_HIGH_GAIN
38	bool "High gain oscillator"
39	help
40	  Set this option to use the oscillator in high-gain mode.
41
42endchoice
43
44config OSC_XTAL0_FREQ
45	int "External oscillator frequency"
46	help
47	  Set the external oscillator frequency in Hz. This should be set by the
48	  board's defconfig.
49
50endif # HAS_OSC
51
52if HAS_MCG
53
54config MCG_PRDIV0
55	hex "PLL external reference divider"
56	range 0 0x18
57	default 0
58	help
59	  Selects the amount to divide down the external reference clock for the PLL.
60	  The resulting frequency must be in the range of 2 MHz to 4 MHz.
61
62config MCG_VDIV0
63	hex "VCO 0 divider"
64	range 0 0x1F
65	default 0
66	help
67	  Selects the amount to divide the VCO output of the PLL. The VDIV 0 bits
68	  establish the multiplication factor (M) applied to the reference clock
69	  frequency.
70
71config MCG_FCRDIV
72	int "Fast internal reference clock divider"
73	range 0 7
74	default 1
75	help
76	  Selects the amount to divide down the fast internal reference clock. The
77	  resulting frequency must be in the range 31.25 kHz to 4 MHz.
78
79config MCG_FRDIV
80	int "FLL external reference divider"
81	range 0 7
82	default 0
83	help
84	  Selects the amount to divide down the external reference clock for the
85	  FLL. The resulting frequency must be in the range 31.25 kHz to 39.0625
86	  kHz.
87
88endif # HAS_MCG
89
90config KINETIS_FLASH_CONFIG
91	bool "Kinetis flash configuration field"
92	default y if XIP && !BOOTLOADER_MCUBOOT
93	help
94	  Include the 16-byte flash configuration field that stores default
95	  protection settings (loaded on reset) and security information that
96	  allows the MCU to restrict access to the FTFx module.
97
98if KINETIS_FLASH_CONFIG
99
100config KINETIS_FLASH_CONFIG_OFFSET
101	hex "Kinetis flash configuration field offset"
102	default 0x400
103
104config KINETIS_FLASH_CONFIG_FSEC
105	hex "Flash security byte (FSEC)"
106	range 0 0xff
107	default 0xfe
108	help
109	  Configures the reset value of the FSEC register, which includes
110	  backdoor key access, mass erase, factory access, and flash security
111	  options.
112
113config KINETIS_FLASH_CONFIG_FOPT
114	hex "Flash nonvolatile option byte (FOPT)"
115	range 0 0xff
116	default 0xff
117	help
118	  Configures the reset value of the FOPT register, which includes boot,
119	  NMI, and EzPort options.
120
121config KINETIS_FLASH_CONFIG_FEPROT
122	hex "EEPROM protection byte (FEPROT)"
123	range 0 0xff
124	default 0xff
125	help
126	  Configures the reset value of the FEPROT register for FlexNVM
127	  devices. For program flash only devices, this byte is reserved.
128
129config KINETIS_FLASH_CONFIG_FDPROT
130	hex "Data flash protection byte (FDPROT)"
131	range 0 0xff
132	default 0xff
133	help
134	  Configures the reset value of the FDPROT register for FlexNVM
135	  devices. For program flash only devices, this byte is reserved.
136
137endif # KINETIS_FLASH_CONFIG
138
139config WDOG_ENABLE_AT_BOOT
140	bool "Keep watchdog timer enabled at boot"
141	help
142	  Leave SOC watchdog timer enabled at boot. The specific timeout
143	  and clock configuration of the watchdog at boot is SOC dependent.
144	  Note: if the watchdog timer is enabled at boot, the user will
145	  need to configure the watchdog using z_arm_watchdog_init, as
146	  the SOC requires watchdog configuration before initial expiration
147
148# Enable watchdog configuration function if watchdog is left enabled at boot
149config WDOG_INIT
150	bool
151	default WDOG_ENABLE_AT_BOOT
152
153
154rsource "*/Kconfig"
155
156endif # SOC_FAMILY_KINETIS
157