1# Copyright (c) 2016 Intel Corporation
2# Copyright (c) 2016, Freescale Semiconductor, Inc.
3# SPDX-License-Identifier: Apache-2.0
4
5config SOC_FAMILY_KINETIS
6	bool
7	select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
8
9if SOC_FAMILY_KINETIS
10
11config SOC_FAMILY
12	string
13	default "nxp_kinetis"
14
15source "soc/arm/nxp_kinetis/*/Kconfig.soc"
16
17config SOC_PART_NUMBER
18	default SOC_PART_NUMBER_KINETIS_K2X if SOC_SERIES_KINETIS_K2X
19	default SOC_PART_NUMBER_KINETIS_K6X if SOC_SERIES_KINETIS_K6X
20	default SOC_PART_NUMBER_KINETIS_K8X if SOC_SERIES_KINETIS_K8X
21	default SOC_PART_NUMBER_KINETIS_KWX if SOC_SERIES_KINETIS_KWX
22	default SOC_PART_NUMBER_KINETIS_KL2X if SOC_SERIES_KINETIS_KL2X
23	default SOC_PART_NUMBER_KINETIS_KE1XF if SOC_SERIES_KINETIS_KE1XF
24	default SOC_PART_NUMBER_KINETIS_KV5X if SOC_SERIES_KINETIS_KV5X
25
26config HAS_OSC
27	bool
28	help
29	  Set if the oscillator (OSC) module is present in the SoC.
30
31config HAS_MCG
32	bool
33	help
34	  Set if the multipurpose clock generator (MCG) module is present in the SoC.
35
36if HAS_OSC
37
38choice
39	prompt "Oscillator Mode Selection"
40	default OSC_EXTERNAL
41
42config OSC_EXTERNAL
43	bool "External reference clock"
44	help
45	  Set this option to use the oscillator in external reference clock mode.
46
47config OSC_LOW_POWER
48	bool "Low power oscillator"
49	help
50	  Set this option to use the oscillator in low-power mode.
51
52config OSC_HIGH_GAIN
53	bool "High gain oscillator"
54	help
55	  Set this option to use the oscillator in high-gain mode.
56
57endchoice
58
59config OSC_XTAL0_FREQ
60	int "External oscillator frequency"
61	help
62	  Set the external oscillator frequency in Hz. This should be set by the
63	  board's defconfig.
64
65endif # HAS_OSC
66
67if HAS_MCG
68
69config MCG_PRDIV0
70	hex "PLL external reference divider"
71	range 0 0x18
72	default 0
73	help
74	  Selects the amount to divide down the external reference clock for the PLL.
75	  The resulting frequency must be in the range of 2 MHz to 4 MHz.
76
77config MCG_VDIV0
78	hex "VCO 0 divider"
79	range 0 0x1F
80	default 0
81	help
82	  Selects the amount to divide the VCO output of the PLL. The VDIV 0 bits
83	  establish the multiplication factor (M) applied to the reference clock
84	  frequency.
85
86config MCG_FCRDIV
87	int "Fast internal reference clock divider"
88	range 0 7
89	default 1
90	help
91	  Selects the amount to divide down the fast internal reference clock. The
92	  resulting frequency must be in the range 31.25 kHz to 4 MHz.
93
94config MCG_FRDIV
95	int "FLL external reference divider"
96	range 0 7
97	default 0
98	help
99	  Selects the amount to divide down the external reference clock for the
100	  FLL. The resulting frequency must be in the range 31.25 kHz to 39.0625
101	  kHz.
102
103endif # HAS_MCG
104
105config KINETIS_FLASH_CONFIG
106	bool "Kinetis flash configuration field"
107	default y if XIP && !BOOTLOADER_MCUBOOT
108	help
109	  Include the 16-byte flash configuration field that stores default
110	  protection settings (loaded on reset) and security information that
111	  allows the MCU to restrict access to the FTFx module.
112
113if KINETIS_FLASH_CONFIG
114
115config KINETIS_FLASH_CONFIG_OFFSET
116	hex "Kinetis flash configuration field offset"
117	default 0x400
118
119config KINETIS_FLASH_CONFIG_FSEC
120	hex "Flash security byte (FSEC)"
121	range 0 0xff
122	default 0xfe
123	help
124	  Configures the reset value of the FSEC register, which includes
125	  backdoor key access, mass erase, factory access, and flash security
126	  options.
127
128config KINETIS_FLASH_CONFIG_FOPT
129	hex "Flash nonvolatile option byte (FOPT)"
130	range 0 0xff
131	default 0xff
132	help
133	  Configures the reset value of the FOPT register, which includes boot,
134	  NMI, and EzPort options.
135
136config KINETIS_FLASH_CONFIG_FEPROT
137	hex "EEPROM protection byte (FEPROT)"
138	range 0 0xff
139	default 0xff
140	help
141	  Configures the reset value of the FEPROT register for FlexNVM
142	  devices. For program flash only devices, this byte is reserved.
143
144config KINETIS_FLASH_CONFIG_FDPROT
145	hex "Data flash protection byte (FDPROT)"
146	range 0 0xff
147	default 0xff
148	help
149	  Configures the reset value of the FDPROT register for FlexNVM
150	  devices. For program flash only devices, this byte is reserved.
151
152endif # KINETIS_FLASH_CONFIG
153
154config WDOG_ENABLE_AT_BOOT
155	bool "Keep watchdog timer enabled at boot"
156	help
157	  Leave SOC watchdog timer enabled at boot. The specific timeout
158	  and clock configuration of the watchdog at boot is SOC dependent.
159	  Note: if the watchdog timer is enabled at boot, the user will
160	  need to configure the watchdog using z_arm_watchdog_init, as
161	  the SOC requires watchdog configuration before initial expiration
162
163# Enable watchdog configuration function if watchdog is left enabled at boot
164config WDOG_INIT
165	bool
166	default WDOG_ENABLE_AT_BOOT
167
168endif # SOC_FAMILY_KINETIS
169