1# Copyright (c) 2018 - 2019 Antmicro <www.antmicro.com>
2# SPDX-License-Identifier: Apache-2.0
3
4config SOC_LITEX_VEXRISCV
5	select RISCV
6	select ATOMIC_OPERATIONS_C
7	select INCLUDE_RESET_VECTOR
8	select RISCV_ISA_RV32I
9	select RISCV_ISA_EXT_M
10	select RISCV_ISA_EXT_ZICSR
11	select RISCV_ISA_EXT_ZIFENCEI
12	imply XIP
13
14if SOC_LITEX_VEXRISCV
15
16config LITEX_CSR_DATA_WIDTH
17	int "Select Control/Status register width"
18	default 32
19
20endif # SOC_LITEX_VEXRISCV
21