1# Copyright 2024 NXP 2# SPDX-License-Identifier: Apache-2.0 3 4config SOC_FAMILY_NXP_IMXRT 5 select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE 6 7if SOC_FAMILY_NXP_IMXRT 8 9# Source series Kconfig files first, so SOCs 10# can override the defaults given here 11rsource "*/Kconfig" 12 13# Used for default value in FLASH_MCUX_FLEXSPI_XIP 14DT_CHOSEN_Z_FLASH := zephyr,flash 15DT_COMPAT_FLEXSPI := nxp,imx-flexspi 16# Macros to shorten Kconfig definitions 17DT_CHOSEN_FLASH_NODE := $(dt_chosen_path,$(DT_CHOSEN_Z_FLASH)) 18DT_CHOSEN_FLASH_PARENT := $(dt_node_parent,$(DT_CHOSEN_FLASH_NODE)) 19 20config FLASH_MCUX_FLEXSPI_XIP 21 bool "MCUX FlexSPI flash access with xip" 22 default $(dt_node_has_compat,$(DT_CHOSEN_FLASH_PARENT),$(DT_COMPAT_FLEXSPI)) 23 select XIP 24 help 25 Allows for the soc to safely initialize the clocks for the 26 FlexSpi when planning to execute code in FlexSpi Memory. 27 28if FLASH_MCUX_FLEXSPI_XIP && MEMC_MCUX_FLEXSPI 29 30choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET 31 prompt "FlexSPI drivers relocation target" 32 default FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM 33 help 34 Select the location to run the FlexSPI drivers when using 35 the flash API. 36 37config FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM 38 bool "ITCM" 39 select CODE_DATA_RELOCATION 40 41config FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM 42 bool "RAM" 43 select CODE_DATA_RELOCATION_SRAM 44 45endchoice 46 47config FLASH_MCUX_FLEXSPI_XIP_MEM 48 string 49 default "ITCM" if FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM 50 default "RAM" if FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM 51 52endif # FLASH_MCUX_FLEXSPI_XIP && MEMC_MCUX_FLEXSPI 53 54# Note- When SECOND_CORE_MCUX is set, the dependencies for this Kconfig 55# should be set elsewhere, since the determination of which SOC core 56# requires the boot header is SOC specific. 57config NXP_IMXRT_BOOT_HEADER 58 bool "Boot header" 59 default y 60 depends on !(BOOTLOADER_MCUBOOT || SECOND_CORE_MCUX) 61 help 62 Enable data structures required by the boot ROM to boot the 63 application from an external flash device. 64 65if NXP_IMXRT_BOOT_HEADER 66 67choice BOOT_DEVICE 68 prompt "Boot device" 69 default BOOT_FLEXSPI_NOR 70 71config BOOT_FLEXSPI_NOR 72 bool "FlexSPI serial NOR" 73 depends on HAS_MCUX_FLEXSPI 74 75config BOOT_FLEXSPI_NAND 76 bool "FlexSPI serial NAND" 77 depends on HAS_MCUX_FLEXSPI 78 79config BOOT_SEMC_NOR 80 bool "SEMC parallel NOR" 81 depends on HAS_MCUX_SEMC 82 83config BOOT_SEMC_NAND 84 bool "SEMC parallel NAND" 85 depends on HAS_MCUX_SEMC 86 87endchoice # BOOT_DEVICE 88 89config FLEXSPI_CONFIG_BLOCK_OFFSET 90 hex "FlexSPI config block offset" 91 default 0x400 if SOC_SERIES_IMXRT5XX || SOC_SERIES_IMXRT6XX || SOC_MIMXRT1011 92 default 0x0 if BOOT_FLEXSPI_NOR 93 help 94 FlexSPI configuration block consists of parameters regarding specific 95 flash devices including read command sequence, quad mode enablement 96 sequence (optional), etc. The boot ROM expects FlexSPI configuration 97 parameter to be presented in serial nor flash. 98 99config IMAGE_VECTOR_TABLE_OFFSET 100 hex "Image vector table offset" 101 default 0x1000 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR 102 default 0x400 if BOOT_FLEXSPI_NAND || BOOT_SEMC_NAND 103 help 104 The Image Vector Table (IVT) provides the boot ROM with pointers to 105 the application entry point and device configuration data. The boot 106 ROM requires a fixed IVT offset for each type of boot device. 107 108config DEVICE_CONFIGURATION_DATA 109 bool "Device configuration data" 110 help 111 Device configuration data (DCD) provides a sequence of commands to 112 the boot ROM to initialize components such as an SDRAM. This is 113 useful if your application expects components like SDRAM to be 114 initialized at boot time. 115 116 117config EXTERNAL_MEM_CONFIG_DATA 118 bool "External Memory Configuration Data" 119 depends on !DEVICE_CONFIGURATION_DATA 120 help 121 External memory configuration data (XMDC) provides an alternative 122 configuration sequences which allows to intilialize the external memory 123 at the boot time. This sequence allows to configure 124 external memories (such as SDRAM) with more advanced option. 125 This is a new alternative boot header compared to DCD, and DCD must be disabled 126 in order to select this option. 127 128config EXTERNAL_MEM_CONFIG_OFFSET 129 hex "External memory configuration offset" 130 depends on EXTERNAL_MEM_CONFIG_DATA 131 default 0x1040 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR 132 help 133 As specified by the boot ROM, the External Memory configuration data must be 134 placed in a specific address location to be pointed by the boot ROM. 135 136endif # NXP_IMXRT_BOOT_HEADER 137 138config NXP_IMX_EXTERNAL_SDRAM 139 bool "Allow access to external SDRAM region" 140 help 141 Enable access to external SDRAM region managed by the SEMC. This 142 setting should be enabled when the application uses SDRAM, or 143 an MPU region will be defined to disable cached access to the 144 SDRAM memory space. 145 146config NXP_IMX_RT_ROM_RAMLOADER 147 depends on !FLASH_MCUX_FLEXSPI_XIP && NXP_IMXRT_BOOT_HEADER 148 # Required so that debugger will load image to correct offset 149 select BUILD_OUTPUT_HEX 150 bool "Create output image that IMX RT ROM can load from FlexSPI to ram" 151 help 152 Builds an output image that the IMX RT BootROM can load from the 153 FlexSPI boot device into RAM region. The image will be loaded 154 from FLEXSPI into the region specified by `zephyr,flash` node. 155 156# Setup LMA adjustment if using the RAMLOADER feature of ROM 157FLASH_CHOSEN := zephyr,flash 158FLASH_BASE := $(dt_chosen_reg_addr_hex,$(FLASH_CHOSEN)) 159FLEXSPI_BASE := $(dt_node_reg_addr_hex,/soc/spi@402a8000,1) 160config BUILD_OUTPUT_ADJUST_LMA 161 default "$(FLEXSPI_BASE) - $(FLASH_BASE)" if NXP_IMX_RT_ROM_RAMLOADER 162 163config SECOND_CORE_MCUX 164 bool "Dual core operation on the RT11xx series" 165 depends on SOC_SERIES_IMXRT11XX 166 help 167 Indicates the second core will be enabled, and the part will run 168 in dual core mode. Enables dual core operation on the RT11xx series, 169 by booting an image targeting the Cortex-M4 from the Cortex-M7 CPU. 170 The M4 image will be loaded from flash into RAM based off a 171 generated header specifying the VMA and LMA of each memory section 172 to load 173 174 175config FLEXSPI_CONFIG_BLOCK_OFFSET 176 hex 177 default 0x400 if SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX 178 179if SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX 180 181config PM_MCUX_GPC 182 bool "MCUX general power controller driver" 183 184config PM_MCUX_DCDC 185 bool "MCUX dcdc converter module driver" 186 187config PM_MCUX_PMU 188 bool "MCUX power management unit driver" 189 190config DCDC_VALUE 191 hex "DCDC value for VDD_SOC" 192 193config INIT_ARM_PLL 194 bool "Initialize ARM PLL" 195 196config INIT_VIDEO_PLL 197 bool "Initialize Video PLL" 198 199config INIT_ENET_PLL 200 bool 201 help 202 If y, the Ethernet PLL is initialized. Always enabled on e.g. 203 MIMXRT1021 - see commit 17f4d6bec7 ("soc: nxp_imx: fix ENET_PLL selection 204 for MIMXRT1021"). 205 206config INIT_SYS_PLL 207 bool "Initialize System PLL" 208 209endif # SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX 210 211endif # SOC_FAMILY_NXP_IMXRT 212
