1menu "Ethernet"
2
3    # Invisible item that is enabled if any Ethernet selection is made
4    config ETH_ENABLED
5        bool
6
7    menuconfig ETH_USE_ESP32_EMAC
8        depends on IDF_TARGET_ESP32
9        bool "Support ESP32 internal EMAC controller"
10        default y
11        select ETH_ENABLED
12        help
13            ESP32 integrates a 10/100M Ethernet MAC controller.
14
15    if ETH_USE_ESP32_EMAC
16        choice ETH_PHY_INTERFACE
17            prompt "PHY interface"
18            default ETH_PHY_INTERFACE_RMII
19            help
20                Select the communication interface between MAC and PHY chip.
21
22            config ETH_PHY_INTERFACE_RMII
23                bool "Reduced Media Independent Interface (RMII)"
24        endchoice
25
26        if ETH_PHY_INTERFACE_RMII
27            choice ETH_RMII_CLK_MODE
28                prompt "RMII clock mode"
29                default ETH_RMII_CLK_INPUT
30                help
31                    Select external or internal RMII clock.
32
33                config ETH_RMII_CLK_INPUT
34                    bool "Input RMII clock from external"
35                    help
36                        MAC will get RMII clock from outside.
37                        Note that ESP32 only supports GPIO0 to input the RMII clock.
38
39                config ETH_RMII_CLK_OUTPUT
40                    bool "Output RMII clock from internal"
41                    help
42                        ESP32 can generate RMII clock by internal APLL.
43                        This clock can be routed to the external PHY device.
44                        ESP32 supports to route the RMII clock to GPIO0/16/17.
45            endchoice
46        endif # ETH_PHY_INTERFACE_RMII
47
48        if ETH_RMII_CLK_INPUT
49            config ETH_RMII_CLK_IN_GPIO
50                int
51                range 0 0
52                default 0
53                help
54                    ESP32 only supports GPIO0 to input the RMII clock.
55        endif # ETH_RMII_CLK_INPUT
56
57        if ETH_RMII_CLK_OUTPUT
58            config ETH_RMII_CLK_OUTPUT_GPIO0
59                bool "Output RMII clock from GPIO0 (Experimental!)"
60                default n
61                help
62                    GPIO0 can be set to output a pre-divided PLL clock (test only!).
63                    Enabling this option will configure GPIO0 to output a 50MHz clock.
64                    In fact this clock doesn't have directly relationship with EMAC peripheral.
65                    Sometimes this clock won't work well with your PHY chip. You might need to
66                    add some extra devices after GPIO0 (e.g. inverter).
67                    Note that outputting RMII clock on GPIO0 is an experimental practice.
68                    If you want the Ethernet to work with WiFi, don't select GPIO0 output mode for stability.
69
70            if !ETH_RMII_CLK_OUTPUT_GPIO0
71                config ETH_RMII_CLK_OUT_GPIO
72                    int "RMII clock GPIO number"
73                    range 16 17
74                    default 17
75                    help
76                        Set the GPIO number to output RMII Clock.
77            endif # !ETH_RMII_CLK_OUTPUT_GPIO0
78        endif # ETH_RMII_CLK_OUTPUT
79
80        config ETH_DMA_BUFFER_SIZE
81            int "Ethernet DMA buffer size (Byte)"
82            range 256 1600
83            default 512
84            help
85                Set the size of each buffer used by Ethernet MAC DMA.
86
87        config ETH_DMA_RX_BUFFER_NUM
88            int "Amount of Ethernet DMA Rx buffers"
89            range 3 30
90            default 10
91            help
92                Number of DMA receive buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE.
93                Larger number of buffers could increase throughput somehow.
94
95        config ETH_DMA_TX_BUFFER_NUM
96            int "Amount of Ethernet DMA Tx buffers"
97            range 3 30
98            default 10
99            help
100                Number of DMA transmit buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE.
101                Larger number of buffers could increase throughput somehow.
102
103        if ETH_DMA_RX_BUFFER_NUM > 15
104            config ETH_SOFT_FLOW_CONTROL
105                bool "Enable software flow control"
106                default n
107                help
108                    Ethernet MAC engine on ESP32 doesn't feature a flow control logic.
109                    The MAC driver can perform a software flow control if you enable this option.
110                    Note that, if the RX buffer number is small, enabling software flow control will
111                    cause obvious performance loss.
112        endif
113
114    endif # ETH_USE_ESP32_EMAC
115
116    menuconfig ETH_USE_SPI_ETHERNET
117        bool "Support SPI to Ethernet Module"
118        default y
119        select ETH_ENABLED
120        help
121            ESP-IDF can also support some SPI-Ethernet modules.
122
123    if ETH_USE_SPI_ETHERNET
124        config ETH_SPI_ETHERNET_DM9051
125            bool "Use DM9051"
126            help
127                DM9051 is a fast Ethernet controller with an SPI interface.
128                It's also integrated with a 10/100M PHY and MAC.
129                Select this to enable DM9051 driver.
130
131        config ETH_SPI_ETHERNET_W5500
132            bool "Use W5500 (MAC RAW)"
133            help
134                W5500 is a HW TCP/IP embedded Ethernet controller.
135                TCP/IP stack, 10/100 Ethernet MAC and PHY are embedded in a single chip.
136                However the driver in ESP-IDF only enables the RAW MAC mode,
137                making it compatible with the software TCP/IP stack.
138                Say yes to enable W5500 driver.
139
140        config ETH_SPI_ETHERNET_KSZ8851SNL
141            bool "Use KSZ8851SNL"
142            help
143                The KSZ8851SNL is a single-chip Fast Ethernet controller consisting of
144                a 10/100 physical layer transceiver (PHY), a MAC, and a Serial Peripheral Interface (SPI).
145                Select this to enable KSZ8851SNL driver.
146    endif # ETH_USE_SPI_ETHERNET
147
148    menuconfig ETH_USE_OPENETH
149        bool "Support OpenCores Ethernet MAC (for use with QEMU)"
150        default n
151        select ETH_ENABLED
152        help
153            OpenCores Ethernet MAC driver can be used when an ESP-IDF application
154            is executed in QEMU. This driver is not supported when running on a
155            real chip.
156
157    if ETH_USE_OPENETH
158        config ETH_OPENETH_DMA_RX_BUFFER_NUM
159            int "Number of Ethernet DMA Rx buffers"
160            range 1 64
161            default 4
162            help
163                Number of DMA receive buffers, each buffer is 1600 bytes.
164
165        config ETH_OPENETH_DMA_TX_BUFFER_NUM
166            int "Number of Ethernet DMA Tx buffers"
167            range 1 64
168            default 1
169            help
170                Number of DMA transmit buffers, each buffer is 1600 bytes.
171    endif # ETH_USE_OPENETH
172endmenu
173