1# Copyright 2022-2023 NXP
2# SPDX-License-Identifier: Apache-2.0
3
4menuconfig ETH_NXP_S32_GMAC
5	bool "NXP S32 GMAC driver"
6	default y
7	depends on DT_HAS_NXP_S32_GMAC_ENABLED
8	select NOCACHE_MEMORY if ARCH_HAS_NOCACHE_MEMORY_SUPPORT
9	select PINCTRL
10	imply MDIO
11	help
12	  Enable GMAC/EMAC Ethernet driver for NXP S32 SoCs.
13
14if ETH_NXP_S32_GMAC
15
16config ETH_NXP_S32_TX_RING_LEN
17	int "TX ring length"
18	default 4
19	range 4 128
20	help
21	  Length of the TX ring. ETH_NXP_S32_TX_RING_BUF_SIZE * ETH_NXP_S32_TX_RING_LEN
22	  must be a multiple of TX FIFO block size.
23
24config ETH_NXP_S32_TX_RING_BUF_SIZE
25	int "TX ring data buffer size"
26	default 1536
27	range 64 1536
28	help
29	  Size, in bytes, of the TX data buffer. The size must be big enough to
30	  store one complete Ethernet frame, and be a multiple of the data bus
31	  width.
32
33config ETH_NXP_S32_RX_RING_LEN
34	int "RX ring length"
35	default 4
36	range 4 128
37	help
38	  Length of the RX ring. ETH_NXP_S32_RX_RING_BUF_SIZE * ETH_NXP_S32_RX_RING_LEN
39	  must be a multiple of RX FIFO block size.
40
41config ETH_NXP_S32_RX_RING_BUF_SIZE
42	int "RX ring data buffer size"
43	default 1536
44	range 64 1536
45	help
46	  Size, in bytes, of the RX data buffer. The size must be big enough to
47	  store one complete Ethernet frame, and be a multiple of the data bus
48	  width.
49
50config ETH_NXP_S32_CLOCK_CONFIG_IDX
51	int
52	default 1
53	help
54	  This option specifies the zero-based index of the clock configuration
55	  used to initialize the GMAC/EMAC clocks.
56
57config ETH_NXP_S32_RX_THREAD_PRIO
58	int "RX thread priority"
59	default 2
60	help
61	  RX thread priority. RX thread is a cooperative thread.
62
63config ETH_NXP_S32_RX_THREAD_STACK_SIZE
64	int "RX thread stack size"
65	default 1500
66	help
67	  RX thread stack size.
68
69config ETH_NXP_S32_RX_BUDGET
70	int "RX thread budget"
71	default 128
72	range 1 1024
73	help
74	  The budget parameter places a limit on the amount of work the driver
75	  may do in the RX thread before yielding the processor, in case there
76	  is more work to do. This is to prevent the RX thread to starve other
77	  threads. Each received frame counts as one unit of work.
78
79config ETH_NXP_S32_LOOPBACK
80	bool "MAC loopback"
81	help
82	  MAC operates in loopback mode. The data is looped back through
83	  internal FIFO on to the internal MII/GMII interface, passing through
84	  the corresponding transmit PHY interface block.
85	  This mode requires the MII/GMII Rx clock input signal to function
86	  properly because the transmit clock is not internally looped back.
87
88config ETH_NXP_S32_MULTICAST_FILTER
89	bool "Multicast destination address filtering"
90	help
91	  Enable support for multicast destination address filtering in the MAC.
92	  MAC performs imperfect filtering using a 64-bit hash table. The upper
93	  6-bits CRC of the received multicast address is used as index to the
94	  content of the hash table. Only multicast with the computed hash set
95	  in the multicast table will be received and all other multicast is
96	  dropped by the MAC. If disabled, all multicast is received by the MAC.
97
98endif # ETH_NXP_S32_GMAC
99