1# Copyright 2022-2023 NXP
2# SPDX-License-Identifier: Apache-2.0
3
4menuconfig ETH_NXP_S32_GMAC
5	bool "NXP S32 GMAC driver"
6	default y
7	depends on DT_HAS_NXP_S32_GMAC_ENABLED
8	select NOCACHE_MEMORY if ARCH_HAS_NOCACHE_MEMORY_SUPPORT
9	select PINCTRL
10	help
11	  Enable GMAC/EMAC Ethernet driver for NXP S32 SoCs.
12
13if ETH_NXP_S32_GMAC
14
15config ETH_NXP_S32_TX_RING_LEN
16	int "TX ring length"
17	default 4
18	range 4 128
19	help
20	  Length of the TX ring. ETH_NXP_S32_TX_RING_BUF_SIZE * ETH_NXP_S32_TX_RING_LEN
21	  must be a multiple of TX FIFO block size.
22
23config ETH_NXP_S32_TX_RING_BUF_SIZE
24	int "TX ring data buffer size"
25	default 1536
26	range 64 1536
27	help
28	  Size, in bytes, of the TX data buffer. The size must be big enough to
29	  store one complete Ethernet frame, and be a multiple of the data bus
30	  width.
31
32config ETH_NXP_S32_RX_RING_LEN
33	int "RX ring length"
34	default 4
35	range 4 128
36	help
37	  Length of the RX ring. ETH_NXP_S32_RX_RING_BUF_SIZE * ETH_NXP_S32_RX_RING_LEN
38	  must be a multiple of RX FIFO block size.
39
40config ETH_NXP_S32_RX_RING_BUF_SIZE
41	int "RX ring data buffer size"
42	default 1536
43	range 64 1536
44	help
45	  Size, in bytes, of the RX data buffer. The size must be big enough to
46	  store one complete Ethernet frame, and be a multiple of the data bus
47	  width.
48
49config ETH_NXP_S32_CLOCK_CONFIG_IDX
50	int
51	default 1
52	help
53	  This option specifies the zero-based index of the clock configuration
54	  used to initialize the GMAC/EMAC clocks.
55
56config ETH_NXP_S32_RX_THREAD_PRIO
57	int "RX thread priority"
58	default 2
59	help
60	  RX thread priority. RX thread is a cooperative thread.
61
62config ETH_NXP_S32_RX_THREAD_STACK_SIZE
63	int "RX thread stack size"
64	default 1500
65	help
66	  RX thread stack size.
67
68config ETH_NXP_S32_RX_BUDGET
69	int "RX thread budget"
70	default 128
71	range 1 1024
72	help
73	  The budget parameter places a limit on the amount of work the driver
74	  may do in the RX thread before yielding the processor, in case there
75	  is more work to do. This is to prevent the RX thread to starve other
76	  threads. Each received frame counts as one unit of work.
77
78config ETH_NXP_S32_LOOPBACK
79	bool "MAC loopback"
80	help
81	  MAC operates in loopback mode. The data is looped back through
82	  internal FIFO on to the internal MII/GMII interface, passing through
83	  the corresponding transmit PHY interface block.
84	  This mode requires the MII/GMII Rx clock input signal to function
85	  properly because the transmit clock is not internally looped back.
86
87config ETH_NXP_S32_MULTICAST_FILTER
88	bool "Multicast destination address filtering"
89	help
90	  Enable support for multicast destination address filtering in the MAC.
91	  MAC performs imperfect filtering using a 64-bit hash table. The upper
92	  6-bits CRC of the received multicast address is used as index to the
93	  content of the hash table. Only multicast with the computed hash set
94	  in the multicast table will be received and all other multicast is
95	  dropped by the MAC. If disabled, all multicast is received by the MAC.
96
97endif # ETH_NXP_S32_GMAC
98