1# Copyright (c) 2014-2015 Wind River Systems, Inc. 2# Copyright (c) 2016 Cadence Design Systems, Inc. 3# Copyright (c) 2019 Intel Corp. 4# SPDX-License-Identifier: Apache-2.0 5 6DT_CHOSEN_IDLE_TIMER := zephyr,cortex-m-idle-timer 7 8config CORTEX_M_SYSTICK 9 bool "Cortex-M SYSTICK timer" 10 depends on CPU_CORTEX_M_HAS_SYSTICK 11 default y 12 depends on DT_HAS_ARM_ARMV6M_SYSTICK_ENABLED || \ 13 DT_HAS_ARM_ARMV7M_SYSTICK_ENABLED || \ 14 DT_HAS_ARM_ARMV8M_SYSTICK_ENABLED || \ 15 DT_HAS_ARM_ARMV8_1M_SYSTICK_ENABLED 16 select TICKLESS_CAPABLE 17 select SYSTEM_TIMER_HAS_DISABLE_SUPPORT 18 select CORTEX_M_SYSTICK_INSTALL_ISR 19 help 20 This module implements a kernel device driver for the Cortex-M processor 21 SYSTICK timer and provides the standard "system clock driver" interfaces. 22 23config CORTEX_M_SYSTICK_INSTALL_ISR 24 bool 25 depends on CPU_CORTEX_M_HAS_SYSTICK 26 help 27 This option should be selected by SysTick-based drivers so that the 28 sys_clock_isr() function is installed. 29 30config CORTEX_M_SYSTICK_64BIT_CYCLE_COUNTER 31 bool "Cortex-M SYSTICK timer with sys_clock_cycle_get_64() support" 32 depends on CORTEX_M_SYSTICK 33 default y if (SYS_CLOCK_HW_CYCLES_PER_SEC > 60000000) 34 select TIMER_HAS_64BIT_CYCLE_COUNTER 35 help 36 This driver, due to its limited 24-bits hardware counter, is already 37 tracking a separate cycle count in software. This option make that 38 count a 64-bits value to support sys_clock_cycle_get_64(). 39 This is cheap to do as expensive math operations (i.e. divisions) 40 are performed only on counter interval values that always fit in 41 32 bits. 42 43 This is set to y by default when the hardware clock is fast enough 44 to wrap sys_clock_cycle_get_32() in about a minute or less. 45 46config CORTEX_M_SYSTICK_IDLE_TIMER 47 bool "Use an additional timer while entering IDLE" 48 default $(dt_chosen_enabled,$(DT_CHOSEN_IDLE_TIMER)) 49 depends on COUNTER 50 depends on TICKLESS_KERNEL 51 depends on PM 52 help 53 There are chips e.g. STMFX family that use SysTick as a system timer, 54 but SysTick is not clocked in low power mode. These chips usually have 55 another timer that is not stopped, but it has lower frequency e.g. 56 RTC, thus it can't be used as a main system timer. 57 58 Use the IDLE timer for timeout (wakeup) when the system is entering 59 IDLE state. 60 61 The chosen IDLE timer node has to support setting alarm from the 62 counter API. 63