1# i.MX RT series 2 3# Copyright (c) 2017-2021, NXP 4# SPDX-License-Identifier: Apache-2.0 5 6choice 7 prompt "i.MX RT Selection" 8 depends on SOC_SERIES_IMX_RT 9 10config SOC_MIMXRT1011 11 bool "SOC_MIMXRT1011" 12 select SOC_SERIES_IMX_RT10XX 13 select HAS_MCUX 14 select HAS_MCUX_CACHE 15 select HAS_MCUX_12B1MSPS_SAR 16 select HAS_MCUX_CCM 17 select HAS_MCUX_FLEXSPI 18 select HAS_MCUX_IGPIO 19 select HAS_MCUX_LPI2C 20 select HAS_MCUX_LPSPI 21 select HAS_MCUX_LPUART 22 select HAS_MCUX_GPT 23 select HAS_MCUX_TRNG 24 select CPU_HAS_ARM_MPU 25 select INIT_ENET_PLL 26 select HAS_MCUX_USB_EHCI 27 select HAS_MCUX_EDMA 28 select HAS_MCUX_GPC 29 select HAS_MCUX_DCDC 30 select HAS_MCUX_PMU 31 select HAS_MCUX_IOMUXC 32 select HAS_SWO 33 34config SOC_MIMXRT1015 35 bool "SOC_MIMXRT1015" 36 select SOC_SERIES_IMX_RT10XX 37 select HAS_MCUX 38 select HAS_MCUX_CACHE 39 select HAS_MCUX_12B1MSPS_SAR 40 select HAS_MCUX_CCM 41 select HAS_MCUX_FLEXSPI 42 select HAS_MCUX_IGPIO 43 select HAS_MCUX_LPI2C 44 select HAS_MCUX_LPSPI 45 select HAS_MCUX_LPUART 46 select HAS_MCUX_GPT 47 select HAS_MCUX_TRNG 48 select CPU_HAS_FPU_DOUBLE_PRECISION 49 select CPU_HAS_ARM_MPU 50 select INIT_ENET_PLL 51 select HAS_MCUX_USB_EHCI 52 select HAS_MCUX_EDMA 53 select HAS_MCUX_GPC 54 select HAS_MCUX_DCDC 55 select HAS_MCUX_PMU 56 select HAS_MCUX_IOMUXC 57 select HAS_SWO 58 59config SOC_MIMXRT1021 60 bool "SOC_MIMXRT1021" 61 select SOC_SERIES_IMX_RT10XX 62 select HAS_MCUX 63 select HAS_MCUX_CACHE 64 select HAS_MCUX_12B1MSPS_SAR 65 select HAS_MCUX_CCM 66 select HAS_MCUX_ENET 67 select HAS_MCUX_FLEXSPI 68 select HAS_MCUX_IGPIO 69 select HAS_MCUX_LPI2C 70 select HAS_MCUX_LPSPI 71 select HAS_MCUX_LPUART 72 select HAS_MCUX_GPT 73 select HAS_MCUX_SEMC 74 select HAS_MCUX_TRNG 75 select CPU_HAS_FPU_DOUBLE_PRECISION 76 select CPU_HAS_ARM_MPU 77 select INIT_ENET_PLL 78 select HAS_MCUX_USB_EHCI 79 select HAS_MCUX_USDHC1 80 select HAS_MCUX_USDHC2 81 select HAS_MCUX_EDMA 82 select HAS_MCUX_FLEXCAN 83 select HAS_MCUX_PWM 84 select HAS_MCUX_GPC 85 select HAS_MCUX_DCDC 86 select HAS_MCUX_PMU 87 select HAS_MCUX_IOMUXC 88 select HAS_SWO 89 90config SOC_MIMXRT1024 91 bool "SOC_MIMXRT1024" 92 select SOC_SERIES_IMX_RT10XX 93 select HAS_MCUX 94 select HAS_MCUX_CACHE 95 select HAS_MCUX_12B1MSPS_SAR 96 select HAS_MCUX_CCM 97 select HAS_MCUX_ENET 98 select HAS_MCUX_FLEXSPI 99 select HAS_MCUX_IGPIO 100 select HAS_MCUX_LPI2C 101 select HAS_MCUX_LPSPI 102 select HAS_MCUX_LPUART 103 select HAS_MCUX_GPT 104 select HAS_MCUX_SEMC 105 select HAS_MCUX_TRNG 106 select CPU_HAS_FPU_DOUBLE_PRECISION 107 select CPU_HAS_ARM_MPU 108 select INIT_ENET_PLL 109 select HAS_MCUX_USB_EHCI 110 select HAS_MCUX_USDHC1 111 select HAS_MCUX_USDHC2 112 select HAS_MCUX_EDMA 113 select HAS_MCUX_FLEXCAN 114 select HAS_MCUX_SRC 115 select HAS_MCUX_GPC 116 select HAS_MCUX_DCDC 117 select HAS_MCUX_PMU 118 select HAS_MCUX_IOMUXC 119 select HAS_SWO 120 121config SOC_MIMXRT1042 122 bool "SOC_MIMXRT1042" 123 select SOC_SERIES_IMX_RT10XX 124 select HAS_MCUX 125 select HAS_MCUX_CACHE 126 select HAS_MCUX_FLEXSPI 127 select HAS_MCUX_SEMC 128 select HAS_MCUX_IGPIO 129 select CPU_HAS_FPU_DOUBLE_PRECISION 130 select CPU_HAS_ARM_MPU 131 select INIT_ARM_PLL 132 select HAS_MCUX_EDMA 133 select HAS_MCUX_GPC 134 select HAS_MCUX_DCDC 135 select HAS_MCUX_PMU 136 select HAS_MCUX_IOMUXC 137 select HAS_SWO 138 139config SOC_MIMXRT1051 140 bool "SOC_MIMXRT1051" 141 select SOC_SERIES_IMX_RT10XX 142 select HAS_MCUX 143 select HAS_MCUX_CACHE 144 select HAS_MCUX_12B1MSPS_SAR 145 select HAS_MCUX_CCM 146 select HAS_MCUX_ENET 147 select HAS_MCUX_FLEXSPI 148 select HAS_MCUX_IGPIO 149 select HAS_MCUX_LPI2C 150 select HAS_MCUX_LPSPI 151 select HAS_MCUX_LPUART 152 select HAS_MCUX_GPT 153 select HAS_MCUX_SEMC 154 select HAS_MCUX_TRNG 155 select CPU_HAS_FPU_DOUBLE_PRECISION 156 select CPU_HAS_ARM_MPU 157 select INIT_ARM_PLL 158 select HAS_MCUX_USB_EHCI 159 select HAS_MCUX_USDHC1 160 select HAS_MCUX_USDHC2 161 select HAS_MCUX_CSI 162 select HAS_MCUX_EDMA 163 select HAS_MCUX_FLEXCAN 164 select HAS_MCUX_GPC 165 select HAS_MCUX_DCDC 166 select HAS_MCUX_PMU 167 select HAS_MCUX_IOMUXC 168 select HAS_SWO 169 170config SOC_MIMXRT1052 171 bool "SOC_MIMXRT1052" 172 select SOC_SERIES_IMX_RT10XX 173 select HAS_MCUX 174 select HAS_MCUX_CACHE 175 select HAS_MCUX_12B1MSPS_SAR 176 select HAS_MCUX_CCM 177 select HAS_MCUX_ELCDIF 178 select HAS_MCUX_ENET 179 select HAS_MCUX_FLEXSPI 180 select HAS_MCUX_IGPIO 181 select HAS_MCUX_LPI2C 182 select HAS_MCUX_LPSPI 183 select HAS_MCUX_LPUART 184 select HAS_MCUX_GPT 185 select HAS_MCUX_SEMC 186 select HAS_MCUX_TRNG 187 select CPU_HAS_FPU_DOUBLE_PRECISION 188 select CPU_HAS_ARM_MPU 189 select INIT_ARM_PLL 190 select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF 191 select INIT_ENET_PLL if NET_L2_ETHERNET && ETH_DRIVER 192 select HAS_MCUX_USB_EHCI 193 select HAS_MCUX_USDHC1 194 select HAS_MCUX_USDHC2 195 select HAS_MCUX_CSI 196 select HAS_MCUX_EDMA 197 select HAS_MCUX_FLEXCAN 198 select HAS_MCUX_PWM 199 select HAS_MCUX_GPC 200 select HAS_MCUX_DCDC 201 select HAS_MCUX_PMU 202 select HAS_MCUX_IOMUXC 203 select HAS_MCUX_SRC 204 select HAS_SWO 205 select HAS_MCUX_XBARA 206 207config SOC_MIMXRT1061 208 bool "SOC_MIMXRT1061" 209 select SOC_SERIES_IMX_RT10XX 210 select HAS_MCUX 211 select HAS_MCUX_CACHE 212 select HAS_MCUX_12B1MSPS_SAR 213 select HAS_MCUX_CCM 214 select HAS_MCUX_ENET 215 select HAS_MCUX_FLEXSPI 216 select HAS_MCUX_IGPIO 217 select HAS_MCUX_LPI2C 218 select HAS_MCUX_LPSPI 219 select HAS_MCUX_LPUART 220 select HAS_MCUX_GPT 221 select HAS_MCUX_SEMC 222 select HAS_MCUX_TRNG 223 select CPU_HAS_FPU_DOUBLE_PRECISION 224 select CPU_HAS_ARM_MPU 225 select INIT_ARM_PLL 226 select HAS_MCUX_USB_EHCI 227 select HAS_MCUX_USDHC1 228 select HAS_MCUX_USDHC2 229 select HAS_MCUX_CSI 230 select HAS_MCUX_EDMA 231 select HAS_MCUX_FLEXCAN 232 select HAS_MCUX_GPC 233 select HAS_MCUX_DCDC 234 select HAS_MCUX_PMU 235 select HAS_MCUX_IOMUXC 236 select HAS_SWO 237 238config SOC_MIMXRT1062 239 bool "SOC_MIMXRT1062" 240 select SOC_SERIES_IMX_RT10XX 241 select HAS_MCUX 242 select HAS_MCUX_CACHE 243 select HAS_MCUX_12B1MSPS_SAR 244 select HAS_MCUX_CCM 245 select HAS_MCUX_ELCDIF 246 select HAS_MCUX_ENET 247 select HAS_MCUX_FLEXSPI 248 select HAS_MCUX_PWM 249 select HAS_MCUX_IGPIO 250 select HAS_MCUX_LPI2C 251 select HAS_MCUX_LPSPI 252 select HAS_MCUX_LPUART 253 select HAS_MCUX_GPT 254 select HAS_MCUX_QTMR 255 select HAS_MCUX_SEMC 256 select HAS_MCUX_SNVS 257 select HAS_MCUX_TRNG 258 select CPU_HAS_FPU_DOUBLE_PRECISION 259 select CPU_HAS_ARM_MPU 260 select INIT_ARM_PLL 261 select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF 262 select INIT_ENET_PLL if NET_L2_ETHERNET && ETH_DRIVER 263 select HAS_MCUX_USB_EHCI 264 select HAS_MCUX_USDHC1 265 select HAS_MCUX_USDHC2 266 select HAS_MCUX_CSI 267 select HAS_MCUX_EDMA 268 select HAS_MCUX_FLEXCAN 269 select HAS_MCUX_I2S 270 select HAS_MCUX_GPC 271 select HAS_MCUX_DCDC 272 select HAS_MCUX_PMU 273 select HAS_MCUX_IOMUXC 274 select HAS_MCUX_ADC_ETC 275 select HAS_MCUX_SRC 276 select HAS_SWO 277 select HAS_MCUX_XBARA 278 279config SOC_MIMXRT1064 280 bool "SOC_MIMXRT1064" 281 select SOC_SERIES_IMX_RT10XX 282 select HAS_MCUX 283 select HAS_MCUX_CACHE 284 select HAS_MCUX_12B1MSPS_SAR 285 select HAS_MCUX_CCM 286 select HAS_MCUX_ELCDIF 287 select HAS_MCUX_ENET 288 select HAS_MCUX_FLEXSPI 289 select HAS_MCUX_PWM 290 select HAS_MCUX_IGPIO 291 select HAS_MCUX_LPI2C 292 select HAS_MCUX_LPSPI 293 select HAS_MCUX_LPUART 294 select HAS_MCUX_GPT 295 select HAS_MCUX_QTMR 296 select HAS_MCUX_SEMC 297 select HAS_MCUX_SNVS 298 select HAS_MCUX_SRC 299 select HAS_MCUX_TRNG 300 select CPU_HAS_FPU_DOUBLE_PRECISION 301 select CPU_HAS_ARM_MPU 302 select INIT_ARM_PLL 303 select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF 304 select INIT_ENET_PLL if NET_L2_ETHERNET && ETH_DRIVER 305 select HAS_MCUX_USB_EHCI 306 select HAS_MCUX_USDHC1 307 select HAS_MCUX_USDHC2 308 select HAS_MCUX_CSI 309 select HAS_MCUX_EDMA 310 select HAS_MCUX_FLEXCAN 311 select HAS_MCUX_GPC 312 select HAS_MCUX_DCDC 313 select HAS_MCUX_PMU 314 select HAS_MCUX_IOMUXC 315 select HAS_SWO 316 317config SOC_MIMXRT1176_CM7 318 bool "SOC_MIMXRT1176_CM7" 319 select CPU_CORTEX_M7 320 select CPU_CORTEX_M_HAS_DWT 321 select SOC_SERIES_IMX_RT11XX 322 select HAS_MCUX_CACHE 323 select HAS_MCUX 324 select HAS_MCUX_SEMC 325 select HAS_MCUX_CCM_REV2 326 select HAS_MCUX_IGPIO 327 select HAS_MCUX_LPI2C 328 select HAS_MCUX_LPSPI 329 select HAS_MCUX_LPADC 330 select HAS_MCUX_LPUART 331 select HAS_MCUX_ELCDIF 332 select HAS_MCUX_MIPI_DSI 333 select HAS_MCUX_GPT 334 select HAS_MCUX_FLEXSPI 335 select HAS_MCUX_FLEXCAN 336 select CPU_HAS_ARM_MPU 337 select INIT_ARM_PLL 338 select INIT_ENET_PLL if NET_L2_ETHERNET && ETH_DRIVER 339 select INIT_VIDEO_PLL 340 select HAS_MCUX_EDMA 341 select CPU_HAS_FPU_DOUBLE_PRECISION 342 select ADJUST_DCDC 343 select BYPASS_LDO_LPSR 344 select ADJUST_LDO 345 select HAS_MCUX_PWM 346 select HAS_MCUX_USDHC1 347 select HAS_MCUX_USDHC2 348 select HAS_MCUX_ENET 349 select HAS_MCUX_GPC 350 select HAS_MCUX_I2S 351 select HAS_MCUX_USB_EHCI 352 select HAS_MCUX_ACMP 353 select HAS_MCUX_SRC_V2 354 select HAS_MCUX_IOMUXC 355 select HAS_SWO 356 357config SOC_MIMXRT1176_CM4 358 bool "SOC_MIMXRT1176_CM4" 359 select CPU_CORTEX_M4 360 select SOC_SERIES_IMX_RT11XX 361 select HAS_MCUX_CACHE 362 select HAS_MCUX 363 select HAS_MCUX_SEMC 364 select HAS_MCUX_CCM_REV2 365 select HAS_MCUX_IGPIO 366 select HAS_MCUX_LPI2C 367 select HAS_MCUX_LPSPI 368 select HAS_MCUX_FLEXSPI 369 select HAS_MCUX_LPUART 370 select HAS_MCUX_GPT 371 select CPU_HAS_ARM_MPU 372 select INIT_ARM_PLL 373 select INIT_ENET_PLL if NET_L2_ETHERNET && ETH_DRIVER 374 select INIT_VIDEO_PLL 375 select HAS_MCUX_EDMA 376 select HAS_MCUX_PWM 377 select HAS_MCUX_USDHC1 378 select HAS_MCUX_USDHC2 379 select HAS_MCUX_ENET 380 select HAS_MCUX_GPC 381 select HAS_MCUX_I2S 382 select HAS_MCUX_ACMP 383 select HAS_MCUX_SRC_V2 384 select HAS_MCUX_IOMUXC 385 select HAS_SWO 386 387config SOC_MIMXRT1166_CM7 388 bool "SOC_MIMXRT1166_CM7" 389 select CPU_CORTEX_M7 390 select CPU_CORTEX_M_HAS_DWT 391 select SOC_SERIES_IMX_RT11XX 392 select HAS_MCUX_CACHE 393 select HAS_MCUX 394 select HAS_MCUX_SEMC 395 select HAS_MCUX_CCM_REV2 396 select HAS_MCUX_IGPIO 397 select HAS_MCUX_LPI2C 398 select HAS_MCUX_LPSPI 399 select HAS_MCUX_LPADC 400 select HAS_MCUX_LPUART 401 select HAS_MCUX_FLEXSPI 402 select HAS_MCUX_GPT 403 select HAS_MCUX_FLEXCAN 404 select CPU_HAS_ARM_MPU 405 select INIT_ARM_PLL 406 select INIT_ENET_PLL if NET_L2_ETHERNET && ETH_DRIVER 407 select INIT_VIDEO_PLL 408 select HAS_MCUX_EDMA 409 select CPU_HAS_FPU_DOUBLE_PRECISION 410 select ADJUST_DCDC 411 select BYPASS_LDO_LPSR 412 select ADJUST_LDO 413 select HAS_MCUX_PWM 414 select HAS_MCUX_USDHC1 415 select HAS_MCUX_USDHC2 416 select HAS_MCUX_ENET 417 select HAS_MCUX_GPC 418 select HAS_MCUX_USB_EHCI 419 select HAS_MCUX_SRC_V2 420 select HAS_MCUX_IOMUXC 421 select HAS_SWO 422 423 424config SOC_MIMXRT1166_CM4 425 bool "SOC_MIMXRT1166_CM4" 426 select CPU_CORTEX_M4 427 select SOC_SERIES_IMX_RT11XX 428 select HAS_MCUX_CACHE 429 select HAS_MCUX 430 select HAS_MCUX_SEMC 431 select HAS_MCUX_CCM_REV2 432 select HAS_MCUX_IGPIO 433 select HAS_MCUX_LPI2C 434 select HAS_MCUX_LPSPI 435 select HAS_MCUX_LPUART 436 select HAS_MCUX_FLEXSPI 437 select HAS_MCUX_GPT 438 select CPU_HAS_ARM_MPU 439 select INIT_ARM_PLL 440 select INIT_ENET_PLL if NET_L2_ETHERNET && ETH_DRIVER 441 select INIT_VIDEO_PLL 442 select HAS_MCUX_EDMA 443 select HAS_MCUX_PWM 444 select HAS_MCUX_USDHC1 445 select HAS_MCUX_USDHC2 446 select HAS_MCUX_ENET 447 select HAS_MCUX_GPC 448 select HAS_MCUX_SRC_V2 449 select HAS_MCUX_IOMUXC 450 select HAS_SWO 451 452endchoice 453 454if SOC_SERIES_IMX_RT 455 456config SOC_PART_NUMBER_MIMXRT1011CAE4A 457 bool 458 459config SOC_PART_NUMBER_MIMXRT1011DAE5A 460 bool 461 462config SOC_PART_NUMBER_MIMXRT1015CAF4A 463 bool 464 465config SOC_PART_NUMBER_MIMXRT1015DAF5A 466 bool 467 468config SOC_PART_NUMBER_MIMXRT1021CAF4A 469 bool 470 471config SOC_PART_NUMBER_MIMXRT1021CAG4A 472 bool 473 474config SOC_PART_NUMBER_MIMXRT1021DAF5A 475 bool 476 477config SOC_PART_NUMBER_MIMXRT1021DAG5A 478 bool 479 480config SOC_PART_NUMBER_MIMXRT1024CAG4A 481 bool 482 483config SOC_PART_NUMBER_MIMXRT1024DAG5A 484 bool 485 486config SOC_PART_NUMBER_MIMXRT1041DFP6B 487 bool 488 489config SOC_PART_NUMBER_MIMXRT1041DJM6B 490 bool 491 492config SOC_PART_NUMBER_MIMXRT1041XFP5B 493 bool 494 495config SOC_PART_NUMBER_MIMXRT1041XJM5B 496 bool 497 498config SOC_PART_NUMBER_MIMXRT1042DFP6B 499 bool 500 501config SOC_PART_NUMBER_MIMXRT1042DJM6B 502 bool 503 504config SOC_PART_NUMBER_MIMXRT1042XFP5B 505 bool 506 507config SOC_PART_NUMBER_MIMXRT1042XJM5B 508 bool 509 510config SOC_PART_NUMBER_MIMXRT1051CVL5A 511 bool 512 513config SOC_PART_NUMBER_MIMXRT1051DVL6A 514 bool 515 516config SOC_PART_NUMBER_MIMXRT1052CVJ5B 517 bool 518 519config SOC_PART_NUMBER_MIMXRT1052CVL5A 520 bool 521 522config SOC_PART_NUMBER_MIMXRT1052CVL5B 523 bool 524 525config SOC_PART_NUMBER_MIMXRT1052DVJ6B 526 bool 527 528config SOC_PART_NUMBER_MIMXRT1052DVL6A 529 bool 530 531config SOC_PART_NUMBER_MIMXRT1052DVL6B 532 bool 533 534config SOC_PART_NUMBER_MIMXRT1061CVL5A 535 bool 536 537config SOC_PART_NUMBER_MIMXRT1061DVL6A 538 bool 539 540config SOC_PART_NUMBER_MIMXRT1062CVJ5A 541 bool 542 543config SOC_PART_NUMBER_MIMXRT1062CVJ5B 544 bool 545 546config SOC_PART_NUMBER_MIMXRT1062CVL5A 547 bool 548 549config SOC_PART_NUMBER_MIMXRT1062DVJ6A 550 bool 551 552config SOC_PART_NUMBER_MIMXRT1062DVL6A 553 bool 554 555config SOC_PART_NUMBER_MIMXRT1064CVL5A 556 bool 557 558config SOC_PART_NUMBER_MIMXRT1064DVL6A 559 bool 560 561config SOC_PART_NUMBER_MIMXRT1166DVM6A 562 bool 563 564config SOC_PART_NUMBER_MIMXRT1176AVM8A 565 bool 566 567config SOC_PART_NUMBER_MIMXRT1176CVM8A 568 bool 569 570config SOC_PART_NUMBER_MIMXRT1176DVMAA 571 bool 572 573config SOC_PART_NUMBER_MIMXRT1175AVM8A 574 bool 575 576config SOC_PART_NUMBER_MIMXRT1175CVM8A 577 bool 578 579config SOC_PART_NUMBER_MIMXRT1175DVMAA 580 bool 581 582config SOC_PART_NUMBER_MIMXRT1173CVM8A 583 bool 584 585config SOC_PART_NUMBER_MIMXRT1172AVM8A 586 bool 587 588config SOC_PART_NUMBER_MIMXRT1172CVM8A 589 bool 590 591config SOC_PART_NUMBER_MIMXRT1172DVMAA 592 bool 593 594config SOC_PART_NUMBER_MIMXRT1171AVM8A 595 bool 596 597config SOC_PART_NUMBER_MIMXRT1171CVM8A 598 bool 599 600config SOC_PART_NUMBER_MIMXRT1171DVMAA 601 bool 602 603config SOC_PART_NUMBER_IMX_RT 604 string 605 default "MIMXRT1011CAE4A" if SOC_PART_NUMBER_MIMXRT1011CAE4A 606 default "MIMXRT1011DAE5A" if SOC_PART_NUMBER_MIMXRT1011DAE5A 607 default "MIMXRT1015CAF4A" if SOC_PART_NUMBER_MIMXRT1015CAF4A 608 default "MIMXRT1015DAF5A" if SOC_PART_NUMBER_MIMXRT1015DAF5A 609 default "MIMXRT1021CAF4A" if SOC_PART_NUMBER_MIMXRT1021CAF4A 610 default "MIMXRT1021CAG4A" if SOC_PART_NUMBER_MIMXRT1021CAG4A 611 default "MIMXRT1021DAF5A" if SOC_PART_NUMBER_MIMXRT1021DAF5A 612 default "MIMXRT1021DAG5A" if SOC_PART_NUMBER_MIMXRT1021DAG5A 613 default "MIMXRT1024CAG4A" if SOC_PART_NUMBER_MIMXRT1024CAG4A 614 default "MIMXRT1024DAG5A" if SOC_PART_NUMBER_MIMXRT1024DAG5A 615 default "MIMXRT1041DFP6B" if SOC_PART_NUMBER_MIMXRT1041DFP6B 616 default "MIMXRT1041DJM6B" if SOC_PART_NUMBER_MIMXRT1041DJM6B 617 default "MIMXRT1041XFP5B" if SOC_PART_NUMBER_MIMXRT1041XFP5B 618 default "MIMXRT1041XJM5B" if SOC_PART_NUMBER_MIMXRT1041XJM5B 619 default "MIMXRT1042DFP6B" if SOC_PART_NUMBER_MIMXRT1042DFP6B 620 default "MIMXRT1042DJM6B" if SOC_PART_NUMBER_MIMXRT1042DJM6B 621 default "MIMXRT1042XFP5B" if SOC_PART_NUMBER_MIMXRT1042XFP5B 622 default "MIMXRT1042XJM5B" if SOC_PART_NUMBER_MIMXRT1042XJM5B 623 default "MIMXRT1051CVL5A" if SOC_PART_NUMBER_MIMXRT1051CVL5A 624 default "MIMXRT1051DVL6A" if SOC_PART_NUMBER_MIMXRT1051DVL6A 625 default "MIMXRT1052CVJ5B" if SOC_PART_NUMBER_MIMXRT1052CVJ5B 626 default "MIMXRT1052CVL5A" if SOC_PART_NUMBER_MIMXRT1052CVL5A 627 default "MIMXRT1052CVL5B" if SOC_PART_NUMBER_MIMXRT1052CVL5B 628 default "MIMXRT1052DVJ6B" if SOC_PART_NUMBER_MIMXRT1052DVJ6B 629 default "MIMXRT1052DVL6A" if SOC_PART_NUMBER_MIMXRT1052DVL6A 630 default "MIMXRT1052DVL6B" if SOC_PART_NUMBER_MIMXRT1052DVL6B 631 default "MIMXRT1061CVL5A" if SOC_PART_NUMBER_MIMXRT1061CVL5A 632 default "MIMXRT1061DVL6A" if SOC_PART_NUMBER_MIMXRT1061DVL6A 633 default "MIMXRT1062CVJ5A" if SOC_PART_NUMBER_MIMXRT1062CVJ5A 634 default "MIMXRT1062CVJ5B" if SOC_PART_NUMBER_MIMXRT1062CVJ5B 635 default "MIMXRT1062CVL5A" if SOC_PART_NUMBER_MIMXRT1062CVL5A 636 default "MIMXRT1062DVJ6A" if SOC_PART_NUMBER_MIMXRT1062DVJ6A 637 default "MIMXRT1062DVL6A" if SOC_PART_NUMBER_MIMXRT1062DVL6A 638 default "MIMXRT1064CVL5A" if SOC_PART_NUMBER_MIMXRT1064CVL5A 639 default "MIMXRT1064DVL6A" if SOC_PART_NUMBER_MIMXRT1064DVL6A 640 default "MIMXRT1176AVM8A" if SOC_PART_NUMBER_MIMXRT1176AVM8A 641 default "MIMXRT1176CVM8A" if SOC_PART_NUMBER_MIMXRT1176CVM8A 642 default "MIMXRT1176DVMAA" if SOC_PART_NUMBER_MIMXRT1176DVMAA 643 default "MIMXRT1166DVM6A" if SOC_PART_NUMBER_MIMXRT1166DVM6A 644 default "MIMXRT1175AVM8A" if SOC_PART_NUMBER_MIMXRT1175AVM8A 645 default "MIMXRT1175CVM8A" if SOC_PART_NUMBER_MIMXRT1175CVM8A 646 default "MIMXRT1175DVMAA" if SOC_PART_NUMBER_MIMXRT1175DVMAA 647 default "MIMXRT1173CVM8A" if SOC_PART_NUMBER_MIMXRT1173CVM8A 648 default "MIMXRT1172AVM8A" if SOC_PART_NUMBER_MIMXRT1172AVM8A 649 default "MIMXRT1172CVM8A" if SOC_PART_NUMBER_MIMXRT1172CVM8A 650 default "MIMXRT1172DVMAA" if SOC_PART_NUMBER_MIMXRT1172DVMAA 651 default "MIMXRT1171AVM8A" if SOC_PART_NUMBER_MIMXRT1171AVM8A 652 default "MIMXRT1171CVM8A" if SOC_PART_NUMBER_MIMXRT1171CVM8A 653 default "MIMXRT1171DVMAA" if SOC_PART_NUMBER_MIMXRT1171DVMAA 654 help 655 This string holds the full part number of the SoC. It is a hidden option 656 that you should not set directly. The part number selection choice defines 657 the default value for this string. 658 659config SOC_SERIES_IMX_RT10XX 660 bool "i.MX RT 10XX Series" 661 select CPU_CORTEX_M7 662 select CPU_CORTEX_M_HAS_DWT 663 select PLATFORM_SPECIFIC_INIT 664 665config SOC_SERIES_IMX_RT11XX 666 bool "i.MX RT 11XX Series" 667 select PLATFORM_SPECIFIC_INIT 668 669config INIT_ARM_PLL 670 bool "Initialize ARM PLL" 671 672config INIT_VIDEO_PLL 673 bool "Initialize Video PLL" 674 675config INIT_ENET_PLL 676 bool 677 help 678 If y, the Ethernet PLL is initialized. Always enabled on e.g. 679 MIMXRT1021 - see commit 17f4d6bec7 ("soc: nxp_imx: fix ENET_PLL selection 680 for MIMXRT1021"). 681 682config DCDC_VALUE 683 hex "DCDC value for VDD_SOC" 684 default 0x13 685 686config ADJUST_DCDC 687 bool "Adjust internal DCDC output" 688 689config BYPASS_LDO_LPSR 690 bool "Bypass LDO lpsr" 691 692config ADJUST_LDO 693 bool "Adjust LDO setting" 694 695config PM_MCUX_GPC 696 bool "MCUX general power controller driver" 697 698config PM_MCUX_DCDC 699 bool "MCUX dcdc converter module driver" 700 701config PM_MCUX_PMU 702 bool "MCUX power management unit driver" 703 704menuconfig NXP_IMX_RT_BOOT_HEADER 705 bool "Boot header" 706 depends on (!BOOTLOADER_MCUBOOT) 707 help 708 Enable data structures required by the boot ROM to boot the 709 application from an external flash device. 710 711if NXP_IMX_RT_BOOT_HEADER 712 713choice BOOT_DEVICE 714 prompt "Boot device selection" 715 default BOOT_FLEXSPI_NOR 716 717config BOOT_FLEXSPI_NOR 718 bool "FlexSPI serial NOR" 719 720config BOOT_FLEXSPI_NAND 721 bool "FlexSPI serial NAND" 722 723config BOOT_SEMC_NOR 724 bool "SEMC parallel NOR" 725 726config BOOT_SEMC_NAND 727 bool "SEMC parallel NAND" 728 729endchoice 730 731config FLEXSPI_CONFIG_BLOCK_OFFSET 732 hex "FlexSPI config block offset" 733 default 0x0 if BOOT_FLEXSPI_NOR 734 help 735 FlexSPI configuration block consists of parameters regarding specific 736 flash devices including read command sequence, quad mode enablement 737 sequence (optional), etc. The boot ROM expects FlexSPI configuration 738 parameter to be presented in serial nor flash. 739 740config IMAGE_VECTOR_TABLE_OFFSET 741 hex "Image vector table offset" 742 default 0x1000 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR 743 default 0x400 if BOOT_FLEXSPI_NAND || BOOT_SEMC_NAND 744 help 745 The Image Vector Table (IVT) provides the boot ROM with pointers to 746 the application entry point and device configuration data. The boot 747 ROM requires a fixed IVT offset for each type of boot device. 748 749config DEVICE_CONFIGURATION_DATA 750 bool "Device configuration data" 751 default y if HAS_MCUX_SEMC 752 help 753 Device configuration data (DCD) provides a sequence of commands to 754 the boot ROM to initialize components such as an SDRAM. 755 756endif # NXP_IMX_RT_BOOT_HEADER 757 758choice CODE_LOCATION 759 prompt "Code location selection" 760 default CODE_ITCM 761 762config CODE_SEMC 763 bool "Link code into external SEMC-controlled memory" 764 imply NXP_IMX_RT_BOOT_HEADER if !BOOTLOADER_MCUBOOT 765 766config CODE_ITCM 767 bool "Link code into internal instruction tightly coupled memory (ITCM)" 768 imply NXP_IMX_RT_BOOT_HEADER if !BOOTLOADER_MCUBOOT 769 770config CODE_FLEXSPI 771 bool "Link code into external FlexSPI-controlled memory" 772 imply NXP_IMX_RT_BOOT_HEADER if !BOOTLOADER_MCUBOOT 773 774config CODE_FLEXSPI2 775 bool "Link code into internal FlexSPI-controlled memory" 776 imply NXP_IMX_RT_BOOT_HEADER if !BOOTLOADER_MCUBOOT 777 778config CODE_SRAM0 779 bool "Link code into RAM_L memory (RAM_L)" 780 imply NXP_IMX_RT_BOOT_HEADER if !BOOTLOADER_MCUBOOT 781 782config CODE_OCRAM 783 bool "Link code into OCRAM memory (OCRAM-M4)" 784 imply NXP_IMX_RT_BOOT_HEADER if !BOOTLOADER_MCUBOOT 785 786endchoice 787 788config OCRAM_NOCACHE 789 bool "Create noncacheable OCRAM region" 790 select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS 791 select PLATFORM_SPECIFIC_INIT 792 help 793 Creates linker section and MPU region for OCRAM region with 794 noncacheable attribute. OCRAM memory is useful for fast DMA transfers. 795 796config SECOND_CORE_MCUX 797 bool "Dual core operation on the RT11xx series" 798 depends on SOC_SERIES_IMX_RT11XX 799 help 800 Indicates the second core will be enabled, and the part will run 801 in dual core mode. Enables dual core operation on the RT11xx series, 802 by booting an image targeting the Cortex-M4 from the Cortex-M7 CPU. 803 The M4 image will be loaded from flash into RAM based off a 804 generated header specifying the VMA and LMA of each memory section 805 to load 806 807config IMXRT1XXX_CODE_CACHE 808 bool "Code cache" 809 default y 810 help 811 Enable Code cache at boot for IMXRT1xxx series 812 813config IMXRT1XXX_DATA_CACHE 814 bool "Data cache" 815 default y 816 help 817 Enable Data cache at boot for IMXRT1xxx series 818 819endif # SOC_SERIES_IMX_RT 820
