1# ARM architecture configuration options 2 3# Copyright (c) 2014-2015 Wind River Systems, Inc. 4# SPDX-License-Identifier: Apache-2.0 5 6menu "ARM Options" 7 depends on ARM 8 9config ARCH 10 default "arm" 11 12config CPU_CORTEX 13 bool 14 help 15 This option signifies the use of a CPU of the Cortex family. 16 17config ARM_CUSTOM_INTERRUPT_CONTROLLER 18 bool 19 depends on !CPU_CORTEX_M 20 help 21 This option indicates that the ARM CPU is connected to a custom (i.e. 22 non-GIC) interrupt controller. 23 24 A number of Cortex-A and Cortex-R cores (Cortex-A5, Cortex-R4/5, ...) 25 allow interfacing to a custom external interrupt controller and this 26 option must be selected when such cores are connected to an interrupt 27 controller that is not the ARM Generic Interrupt Controller (GIC). 28 29 When this option is selected, the architecture interrupt control 30 functions are mapped to the SoC interrupt control interface, which is 31 implemented at the SoC level. 32 33 N.B. This option is only applicable to the Cortex-A and Cortex-R 34 family cores. The Cortex-M family cores are always equipped with 35 the ARM Nested Vectored Interrupt Controller (NVIC). 36 37config CODE_DATA_RELOCATION 38 bool "Relocate code/data sections" 39 depends on CPU_CORTEX_M 40 help 41 When selected this will relocate .text, data and .bss sections from 42 the specified files and places it in the required memory region. The 43 files should be specified in the CMakeList.txt file with 44 a cmake API zephyr_code_relocate(). 45 46config CODE_DATA_RELOCATION_SRAM 47 bool "Relocate code/data sections to SRAM" 48 depends on CPU_CORTEX_M 49 select CODE_DATA_RELOCATION 50 help 51 When selected this will relocate .text, data and .bss sections from 52 the specified files and places it in SRAM. The files should be specified 53 in the CMakeList.txt file with a cmake API zephyr_code_relocate(). This 54 config is used to create an MPU entry for the SRAM space used for code 55 relocation. 56 57rsource "core/aarch32/Kconfig" 58 59endmenu 60