1# Copyright 2024 NXP 2# SPDX-License-Identifier: Apache-2.0 3 4config SOC_SERIES_IMXRT11XX 5 select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS 6 select CPU_CORTEX_M_HAS_DWT 7 select SOC_RESET_HOOK 8 select ARM 9 select CLOCK_CONTROL 10 select HAS_MCUX_CACHE 11 select HAS_MCUX 12 select HAS_MCUX_SEMC 13 select HAS_MCUX_CCM_REV2 14 select HAS_MCUX_IGPIO 15 select HAS_MCUX_LPI2C 16 select HAS_MCUX_LPSPI 17 select HAS_MCUX_LPADC 18 select HAS_MCUX_ADC_ETC 19 select HAS_MCUX_LPUART 20 select HAS_MCUX_ELCDIF 21 select HAS_MCUX_MIPI_DSI 22 select HAS_MCUX_GPT 23 select HAS_MCUX_FLEXSPI 24 select HAS_MCUX_FLEXCAN 25 select CPU_HAS_ARM_MPU 26 select INIT_ARM_PLL 27 select INIT_ENET_PLL if NET_L2_ETHERNET && ETH_DRIVER 28 select INIT_VIDEO_PLL 29 select HAS_MCUX_EDMA 30 select CPU_HAS_ICACHE if CPU_CORTEX_M7 31 select CPU_HAS_DCACHE if CPU_CORTEX_M7 32 select CPU_HAS_FPU 33 select CPU_HAS_FPU_DOUBLE_PRECISION if CPU_CORTEX_M7 34 select BYPASS_LDO_LPSR 35 select ADJUST_LDO 36 select HAS_MCUX_PWM 37 select HAS_MCUX_USDHC1 38 select HAS_MCUX_USDHC2 39 select HAS_MCUX_ENET 40 select HAS_MCUX_GPC 41 select HAS_MCUX_I2S 42 select HAS_MCUX_USB_EHCI 43 select HAS_MCUX_SRC_V2 44 select HAS_MCUX_IOMUXC 45 select HAS_MCUX_XBARA 46 select HAS_SWO 47 select HAS_PM 48 49config SOC_MIMXRT1176_CM4 50 select CPU_CORTEX_M4 51 52config SOC_MIMXRT1176_CM7 53 select CPU_CORTEX_M7 54 55config SOC_MIMXRT1166_CM4 56 select CPU_CORTEX_M4 57 58config SOC_MIMXRT1166_CM7 59 select CPU_CORTEX_M7 60 61if SOC_SERIES_IMXRT11XX 62 63config MCUX_CORE_SUFFIX 64 default "_cm7" if SOC_MIMXRT1176_CM7 || SOC_MIMXRT1166_CM7 65 default "_cm4" if SOC_MIMXRT1176_CM4 || SOC_MIMXRT1166_CM4 66 67config BYPASS_LDO_LPSR 68 bool "Bypass LDO lpsr" 69 70config ADJUST_LDO 71 bool "Adjust LDO setting" 72 73config ADJUST_DCDC 74 default y 75 bool "Adjust internal DCDC output" 76 77endif # SOC_SERIES_IMXRT11XX 78
