1 /** 2 ****************************************************************************** 3 * @file stm32f3xx_hal_comp_ex.h 4 * @author MCD Application Team 5 * @brief Header file of COMP HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef __STM32F3xx_HAL_COMP_EX_H 21 #define __STM32F3xx_HAL_COMP_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f3xx_hal_def.h" 29 30 /** @addtogroup STM32F3xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @defgroup COMPEx COMPEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /* Exported constants --------------------------------------------------------*/ 40 /** @defgroup COMPEx_Exported_Constants COMP Extended Exported Constants 41 * @{ 42 */ 43 44 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ 45 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) 46 /** @defgroup COMPEx_InvertingInput COMP Extended InvertingInput (STM32F302xE/STM32F303xE/STM32F398xx/STM32F302xC/STM32F303xC/STM32F358xx Product devices) 47 * @{ 48 */ 49 #define COMP_INVERTINGINPUT_1_4VREFINT (0x00000000U) /*!< 1U/4 VREFINT connected to comparator inverting input */ 50 #define COMP_INVERTINGINPUT_1_2VREFINT COMP_CSR_COMPxINSEL_0 /*!< 1U/2 VREFINT connected to comparator inverting input */ 51 #define COMP_INVERTINGINPUT_3_4VREFINT COMP_CSR_COMPxINSEL_1 /*!< 3U/4 VREFINT connected to comparator inverting input */ 52 #define COMP_INVERTINGINPUT_VREFINT (COMP_CSR_COMPxINSEL_1|COMP_CSR_COMPxINSEL_0) /*!< VREFINT connected to comparator inverting input */ 53 #define COMP_INVERTINGINPUT_DAC1_CH1 COMP_CSR_COMPxINSEL_2 /*!< DAC1_CH1_OUT (PA4) connected to comparator inverting input */ 54 #define COMP_INVERTINGINPUT_DAC1_CH2 (COMP_CSR_COMPxINSEL_2|COMP_CSR_COMPxINSEL_0) /*!< DAC1_CH2_OUT (PA5) connected to comparator inverting input */ 55 #define COMP_INVERTINGINPUT_IO1 (COMP_CSR_COMPxINSEL_2|COMP_CSR_COMPxINSEL_1) /*!< IO1 (PA0 for COMP1, PA2 for COMP2, PD15 for COMP3, 56 PE8 for COMP4, PD13 for COMP5, PD10 for COMP6, 57 PC0 for COMP7) connected to comparator inverting input */ 58 #define COMP_INVERTINGINPUT_IO2 COMP_CSR_COMPxINSEL /*!< IO2 (PB12 for COMP3, PB2 for COMP4, PB10 for COMP5, 59 PB15 for COMP6) connected to comparator inverting input */ 60 /* Aliases for compatibility */ 61 #define COMP_INVERTINGINPUT_DAC1 COMP_INVERTINGINPUT_DAC1_CH1 62 #define COMP_INVERTINGINPUT_DAC2 COMP_INVERTINGINPUT_DAC1_CH2 63 /** 64 * @} 65 */ 66 #elif defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) 67 /** @defgroup COMPEx_InvertingInput COMP Extended InvertingInput (STM32F301x8/STM32F302x8/STM32F318xx Product devices) 68 * @{ 69 */ 70 #define COMP_INVERTINGINPUT_1_4VREFINT (0x00000000U) /*!< 1U/4 VREFINT connected to comparator inverting input */ 71 #define COMP_INVERTINGINPUT_1_2VREFINT COMP_CSR_COMPxINSEL_0 /*!< 1U/2 VREFINT connected to comparator inverting input */ 72 #define COMP_INVERTINGINPUT_3_4VREFINT COMP_CSR_COMPxINSEL_1 /*!< 3U/4 VREFINT connected to comparator inverting input */ 73 #define COMP_INVERTINGINPUT_VREFINT (COMP_CSR_COMPxINSEL_1|COMP_CSR_COMPxINSEL_0) /*!< VREFINT connected to comparator inverting input */ 74 #define COMP_INVERTINGINPUT_DAC1_CH1 COMP_CSR_COMPxINSEL_2 /*!< DAC1_CH1_OUT (PA4) connected to comparator inverting input */ 75 #define COMP_INVERTINGINPUT_IO1 (COMP_CSR_COMPxINSEL_2|COMP_CSR_COMPxINSEL_1) /*!< IO1 (PA2 for COMP2), 76 connected to comparator inverting input */ 77 #define COMP_INVERTINGINPUT_IO2 COMP_CSR_COMPxINSEL /*!< IO2 (PB2 for COMP4, PB15 for COMP6) 78 connected to comparator inverting input */ 79 /* Aliases for compatibility */ 80 #define COMP_INVERTINGINPUT_DAC1 COMP_INVERTINGINPUT_DAC1_CH1 81 /** 82 * @} 83 */ 84 #elif defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) 85 /** @defgroup COMPEx_InvertingInput COMP Extended InvertingInput (STM32F303x8/STM32F334x8/STM32F328xx Product devices) 86 * @{ 87 */ 88 /* Note: On these STM32 devices, there is only 1 comparator inverting input */ 89 /* connected to a GPIO. */ 90 /* It must be chosen among the 2 literals COMP_INVERTINGINPUT_IOx */ 91 /* depending on comparator instance COMPx. */ 92 #define COMP_INVERTINGINPUT_1_4VREFINT (0x00000000U) /*!< 1U/4 VREFINT connected to comparator inverting input */ 93 #define COMP_INVERTINGINPUT_1_2VREFINT COMP_CSR_COMPxINSEL_0 /*!< 1U/2 VREFINT connected to comparator inverting input */ 94 #define COMP_INVERTINGINPUT_3_4VREFINT COMP_CSR_COMPxINSEL_1 /*!< 3U/4 VREFINT connected to comparator inverting input */ 95 #define COMP_INVERTINGINPUT_VREFINT (COMP_CSR_COMPxINSEL_1|COMP_CSR_COMPxINSEL_0) /*!< VREFINT connected to comparator inverting input */ 96 #define COMP_INVERTINGINPUT_DAC1_CH1 COMP_CSR_COMPxINSEL_2 /*!< DAC1_CH1_OUT (PA4) connected to comparator inverting input */ 97 #define COMP_INVERTINGINPUT_DAC1_CH2 (COMP_CSR_COMPxINSEL_2|COMP_CSR_COMPxINSEL_0) /*!< DAC1_CH2_OUT (PA5) connected to comparator inverting input */ 98 #define COMP_INVERTINGINPUT_IO1 (COMP_CSR_COMPxINSEL_2|COMP_CSR_COMPxINSEL_1) /*!< IO1 (PA2 for COMP2), 99 connected to comparator inverting input */ 100 #define COMP_INVERTINGINPUT_IO2 COMP_CSR_COMPxINSEL /*!< IO2 (PB2 for COMP4, PB15 for COMP6) 101 connected to comparator inverting input */ 102 #define COMP_INVERTINGINPUT_DAC2_CH1 COMP_CSR_COMPxINSEL_3 /*!< DAC2_CH1_OUT connected to comparator inverting input */ 103 104 /* Aliases for compatibility */ 105 #define COMP_INVERTINGINPUT_DAC1 COMP_INVERTINGINPUT_DAC1_CH1 106 #define COMP_INVERTINGINPUT_DAC2 COMP_INVERTINGINPUT_DAC1_CH2 107 /** 108 * @} 109 */ 110 #elif defined(STM32F373xC) || defined(STM32F378xx) 111 /** @defgroup COMPEx_InvertingInput COMP Extended InvertingInput (STM32F373xC/STM32F378xx Product devices) 112 * @{ 113 */ 114 #define COMP_INVERTINGINPUT_1_4VREFINT (0x00000000U) /*!< 1U/4 VREFINT connected to comparator inverting input */ 115 #define COMP_INVERTINGINPUT_1_2VREFINT ((uint32_t)COMP_CSR_COMPxINSEL_0) /*!< 1U/2 VREFINT connected to comparator inverting input */ 116 #define COMP_INVERTINGINPUT_3_4VREFINT ((uint32_t)COMP_CSR_COMPxINSEL_1) /*!< 3U/4 VREFINT connected to comparator inverting input */ 117 #define COMP_INVERTINGINPUT_VREFINT ((uint32_t)(COMP_CSR_COMPxINSEL_1|COMP_CSR_COMPxINSEL_0)) /*!< VREFINT connected to comparator inverting input */ 118 #define COMP_INVERTINGINPUT_DAC1_CH1 ((uint32_t)COMP_CSR_COMPxINSEL_2) /*!< DAC1_CH1_OUT (PA4) connected to comparator inverting input */ 119 #define COMP_INVERTINGINPUT_DAC1_CH2 ((uint32_t)(COMP_CSR_COMPxINSEL_2|COMP_CSR_COMPxINSEL_0)) /*!< DAC1_CH2_OUT (PA5) connected to comparator inverting input */ 120 #define COMP_INVERTINGINPUT_IO1 ((uint32_t)(COMP_CSR_COMPxINSEL_2|COMP_CSR_COMPxINSEL_1)) /*!< IO1 (PA0 for COMP1, PA2 for COMP2) connected to comparator inverting input */ 121 #define COMP_INVERTINGINPUT_DAC2_CH1 ((uint32_t)COMP_CSR_COMPxINSEL) /*!< DAC2_CH1_OUT connected to comparator inverting input */ 122 123 /* Aliases for compatibility */ 124 #define COMP_INVERTINGINPUT_DAC1 COMP_INVERTINGINPUT_DAC1_CH1 125 #define COMP_INVERTINGINPUT_DAC2 COMP_INVERTINGINPUT_DAC1_CH2 126 /** 127 * @} 128 */ 129 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ 130 /* STM32F302xC || STM32F303xC || STM32F358xx */ 131 132 #if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) 133 /** @defgroup COMPEx_NonInvertingInput COMP Extended NonInvertingInput (STM32F302xC/STM32F303xC/STM32F358xx Product devices) 134 * @{ 135 */ 136 #define COMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< IO1 (PA1 for COMP1, PA7 for COMP2, PB14 for COMP3, 137 PB0 for COMP4, PD12 for COMP5, PD11 for COMP6, 138 PA0 for COMP7) connected to comparator non inverting input */ 139 #define COMP_NONINVERTINGINPUT_IO2 COMP_CSR_COMPxNONINSEL /*!< IO2 (PA3 for COMP2, PD14 for COMP3, PE7 for COMP4, PB13 for COMP5, 140 PB11 for COMP6, PC1 for COMP7) connected to comparator non inverting input */ 141 #define COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED COMP1_CSR_COMP1SW1 /*!< DAC output connected to comparator COMP1 non inverting input */ 142 /** 143 * @} 144 */ 145 #elif defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) 146 /** @defgroup COMPEx_NonInvertingInput COMP Extended NonInvertingInput (STM32F301x8/STM32F302x8/STM32F318xx Product devices) 147 * @{ 148 */ 149 #define COMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< IO1 (PA7 for COMP2, PB0 for COMP4, PB11 for COMP6) 150 connected to comparator non inverting input */ 151 #define COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED COMP2_CSR_COMP2INPDAC /*!< DAC output connected to comparator COMP2 non inverting input */ 152 /** 153 * @} 154 */ 155 #elif defined(STM32F373xC) || defined(STM32F378xx) 156 /** @defgroup COMPEx_NonInvertingInput COMP Extended NonInvertingInput (STM32F373xC/STM32F378xx Product devices) 157 * @{ 158 */ 159 #define COMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< IO1 (PA1 for COMP1, PA3 for COMP2) 160 connected to comparator non inverting input */ 161 #define COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED COMP_CSR_COMP1SW1 /*!< DAC output connected to comparator COMP1 non inverting input */ 162 /** 163 * @} 164 */ 165 #elif defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) 166 /** @defgroup COMPEx_NonInvertingInput COMP Extended NonInvertingInput (STM32F302xE/STM32F303xE/STM32F398xx Product devices) 167 * @{ 168 */ 169 #define COMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< IO1 (PA1 for COMP1, PA7 for COMP2, PB14 for COMP3, 170 PB0 for COMP4, PD12 for COMP5, PD11 for COMP6, 171 PA0 for COMP7) connected to comparator non inverting input */ 172 #define COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED COMP1_CSR_COMP1SW1 /*!< DAC output connected to comparator COMP1 non inverting input */ 173 /** 174 * @} 175 */ 176 #else 177 /** @defgroup COMPEx_NonInvertingInput COMP Extended NonInvertingInput (Other Product devices) 178 * @{ 179 */ 180 #define COMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< IO1 (PA7 for COMP2, PB0 for COMP4, PB11 for COMP6) 181 connected to comparator non inverting input */ 182 /** 183 * @} 184 */ 185 #endif /* STM32F302xC || STM32F303xC || STM32F358xx */ 186 187 #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) 188 /** @defgroup COMPEx_Output COMP Extended Output (STM32F301x8/STM32F302x8/STM32F318xx Product devices) 189 * Elements value convention on 16 LSB: 00XXXX0000YYYYYYb 190 * - YYYYYY : Applicable comparator instance number (bitmap format: 000010 for COMP2, 100000 for COMP6) 191 * - XXXX : COMPxOUTSEL value 192 * @{ 193 */ 194 /* Output Redirection values common to all comparators COMP2, COMP4 and COMP6 */ 195 #define COMP_OUTPUT_NONE (0x0000002AU) /*!< COMP2, COMP4 or COMP6 output isn't connected to other peripherals */ 196 #define COMP_OUTPUT_TIM1BKIN (0x0000042AU) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input (BKIN) */ 197 #define COMP_OUTPUT_TIM1BKIN2_BRK2 (0x0000082AU) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BRK2) */ 198 #define COMP_OUTPUT_TIM1BKIN2 (0x0000142AU) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BKIN2) */ 199 /* Output Redirection specific to COMP2 */ 200 #define COMP_OUTPUT_TIM1OCREFCLR (0x00001802U) /*!< COMP2 output connected to TIM1 OCREF Clear */ 201 #define COMP_OUTPUT_TIM1IC1 (0x00001C02U) /*!< COMP2 output connected to TIM1 Input Capture 1U */ 202 #define COMP_OUTPUT_TIM2IC4 (0x00002002U) /*!< COMP2 output connected to TIM2 Input Capture 4U */ 203 #define COMP_OUTPUT_TIM2OCREFCLR (0x00002402U) /*!< COMP2 output connected to TIM2 OCREF Clear */ 204 /* Output Redirection specific to COMP4 */ 205 #define COMP_OUTPUT_TIM15IC2 (0x00002008U) /*!< COMP4 output connected to TIM15 Input Capture 2U */ 206 #define COMP_OUTPUT_TIM15OCREFCLR (0x00002808U) /*!< COMP4 output connected to TIM15 OCREF Clear */ 207 /* Output Redirection specific to COMP6 */ 208 #define COMP_OUTPUT_TIM2IC2 (0x00001820U) /*!< COMP6 output connected to TIM2 Input Capture 2U */ 209 #define COMP_OUTPUT_COMP6_TIM2OCREFCLR (0x00002020U) /*!< COMP6 output connected to TIM2 OCREF Clear */ 210 #define COMP_OUTPUT_TIM16OCREFCLR (0x00002420U) /*!< COMP6 output connected to TIM16 OCREF Clear */ 211 #define COMP_OUTPUT_TIM16IC1 (0x00002820U) /*!< COMP6 output connected to TIM16 Input Capture 1U */ 212 /** 213 * @} 214 */ 215 #elif defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) 216 /** @defgroup COMPEx_Output COMP Extended Output (STM32F303x8/STM32F334x8/STM32F328xx Product devices) 217 * Elements value convention on 16 LSB: 00XXXX0000YYYYYYb 218 * - YYYYYY : Applicable comparator instance number (bitmap format: 000010 for COMP2, 100000 for COMP6) 219 * - XXXX : COMPxOUTSEL value 220 * @{ 221 */ 222 /* Output Redirection values common to all comparators COMP2, COMP4 and COMP6 */ 223 #define COMP_OUTPUT_NONE (0x0000002AU) /*!< COMP2, COMP4 or COMP6 output isn't connected to other peripherals */ 224 #define COMP_OUTPUT_TIM1BKIN (0x0000042AU) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input (BKIN) */ 225 #define COMP_OUTPUT_TIM1BKIN2 (0x0000082AU) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BKIN2) */ 226 /* Output Redirection common to COMP2 and COMP4 */ 227 #define COMP_OUTPUT_TIM3OCREFCLR (0x00002C0AU) /*!< COMP2 or COMP4 output connected to TIM3 OCREF Clear */ 228 /* Output Redirection specific to COMP2 */ 229 #define COMP_OUTPUT_TIM1OCREFCLR (0x00001802U) /*!< COMP2 output connected to TIM1 OCREF Clear */ 230 #define COMP_OUTPUT_TIM1IC1 (0x00001C02U) /*!< COMP2 output connected to TIM1 Input Capture 1U */ 231 #define COMP_OUTPUT_TIM2IC4 (0x00002002U) /*!< COMP2 output connected to TIM2 Input Capture 4U */ 232 #define COMP_OUTPUT_TIM2OCREFCLR (0x00002402U) /*!< COMP2 output connected to TIM2 OCREF Clear */ 233 #define COMP_OUTPUT_TIM3IC1 (0x00002802U) /*!< COMP2 output connected to TIM3 Input Capture 1U */ 234 /* Output Redirection specific to COMP4 */ 235 #define COMP_OUTPUT_TIM3IC3 (0x00001808U) /*!< COMP4 output connected to TIM3 Input Capture 3U */ 236 #define COMP_OUTPUT_TIM15IC2 (0x00002008U) /*!< COMP4 output connected to TIM15 Input Capture 2U */ 237 #define COMP_OUTPUT_TIM15OCREFCLR (0x00002808U) /*!< COMP4 output connected to TIM15 OCREF Clear */ 238 /* Output Redirection specific to COMP6 */ 239 #define COMP_OUTPUT_TIM2IC2 (0x00001820U) /*!< COMP6 output connected to TIM2 Input Capture 2U */ 240 #define COMP_OUTPUT_COMP6_TIM2OCREFCLR (0x00002020U) /*!< COMP6 output connected to TIM2 OCREF Clear */ 241 #define COMP_OUTPUT_TIM16OCREFCLR (0x00002420U) /*!< COMP6 output connected to TIM16 OCREF Clear */ 242 #define COMP_OUTPUT_TIM16IC1 (0x00002820U) /*!< COMP6 output connected to TIM16 Input Capture 1U */ 243 /** 244 * @} 245 */ 246 #elif defined(STM32F302xC) || defined(STM32F302xE) 247 /** @defgroup COMPEx_Output COMP Extended Output (STM32F302xC/STM32F302xE Product devices) 248 * Elements value convention on 16 LSB: 00XXXX0000YYYYYYb 249 * - YYYYYY : Applicable comparator instance number (bitmap format: 000001 for COMP1, 100000 for COMP6) 250 * - XXXX : COMPxOUTSEL value 251 * @{ 252 */ 253 /* Output Redirection values common to all comparators COMP1, COMP2, COMP4, COMP6 */ 254 #define COMP_OUTPUT_NONE (0x0000002BU) /*!< COMP1, COMP2, COMP4 or COMP6 output isn't connected to other peripherals */ 255 #define COMP_OUTPUT_TIM1BKIN (0x0000042BU) /*!< COMP1, COMP2, COMP4 or COMP6 output connected to TIM1 Break Input (BKIN) */ 256 #define COMP_OUTPUT_TIM1BKIN2_BRK2 (0x0000082BU) /*!< COMP1, COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BRK2) */ 257 #define COMP_OUTPUT_TIM1BKIN2 (0x0000142BU) /*!< COMP1, COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BKIN2) */ 258 /* Output Redirection common to COMP1 and COMP2 */ 259 #define COMP_OUTPUT_TIM1OCREFCLR (0x00001803U) /*!< COMP1 or COMP2 output connected to TIM1 OCREF Clear */ 260 #define COMP_OUTPUT_TIM1IC1 (0x00001C03U) /*!< COMP1 or COMP2 output connected to TIM1 Input Capture 1U */ 261 #define COMP_OUTPUT_TIM2IC4 (0x00002003U) /*!< COMP1 or COMP2 output connected to TIM2 Input Capture 4U */ 262 #define COMP_OUTPUT_TIM2OCREFCLR (0x00002403U) /*!< COMP1 or COMP2 output connected to TIM2 OCREF Clear */ 263 #define COMP_OUTPUT_TIM3IC1 (0x00002803U) /*!< COMP1 or COMP2 output connected to TIM3 Input Capture 1U */ 264 /* Output Redirection common to COMP1,COMP2 and COMP4 */ 265 #define COMP_OUTPUT_TIM3OCREFCLR (0x00002C0BU) /*!< COMP1, COMP2 or COMP4 output connected to TIM3 OCREF Clear */ 266 /* Output Redirection specific to COMP4 */ 267 #define COMP_OUTPUT_TIM3IC3 (0x00001808U) /*!< COMP4 output connected to TIM3 Input Capture 3U */ 268 #define COMP_OUTPUT_TIM15IC2 (0x00002008U) /*!< COMP4 output connected to TIM15 Input Capture 2U */ 269 #define COMP_OUTPUT_TIM4IC2 (0x00002408U) /*!< COMP4 output connected to TIM4 Input Capture 2U */ 270 #define COMP_OUTPUT_TIM15OCREFCLR (0x00002808U) /*!< COMP4 output connected to TIM15 OCREF Clear */ 271 /* Output Redirection specific to COMP6 */ 272 #define COMP_OUTPUT_TIM2IC2 (0x00001820U) /*!< COMP6 output connected to TIM2 Input Capture 2U */ 273 #define COMP_OUTPUT_COMP6_TIM2OCREFCLR (0x00002020U) /*!< COMP6 output connected to TIM2 OCREF Clear */ 274 #define COMP_OUTPUT_TIM16OCREFCLR (0x00002420U) /*!< COMP6 output connected to TIM16 OCREF Clear */ 275 #define COMP_OUTPUT_TIM16IC1 (0x00002820U) /*!< COMP6 output connected to TIM16 Input Capture 1U */ 276 #define COMP_OUTPUT_TIM4IC4 (0x00002C20U) /*!< COMP6 output connected to TIM4 Input Capture 4U */ 277 /** 278 * @} 279 */ 280 #elif defined(STM32F303xC) || defined(STM32F358xx) 281 /** @defgroup COMPEx_Output COMP Extended Output (STM32F303xC/STM32F358xx Product devices) 282 * Elements value convention on 16 LSB: 00XXXX000YYYYYYYb 283 * - YYYYYYY : Applicable comparator instance number (bitmap format: 0000001 for COMP1, 1000000 for COMP7) 284 * - XXXX : COMPxOUTSEL value 285 * @{ 286 */ 287 /* Output Redirection values common to all comparators COMP1...COMP7 */ 288 #define COMP_OUTPUT_NONE (0x0000007FU) /*!< COMP1, COMP2... or COMP7 output isn't connected to other peripherals */ 289 #define COMP_OUTPUT_TIM1BKIN (0x0000047FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input (BKIN) */ 290 #define COMP_OUTPUT_TIM1BKIN2 (0x0000087FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2 (BKIN2) */ 291 #define COMP_OUTPUT_TIM8BKIN (0x00000C7FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM8 Break Input (BKIN) */ 292 #define COMP_OUTPUT_TIM8BKIN2 (0x0000107FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM8 Break Input 2 (BKIN2) */ 293 #define COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2 (0x0000147FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2 and TIM8 Break Input 2U */ 294 /* Output Redirection common to COMP1, COMP2, COMP3 and COMP7 */ 295 #define COMP_OUTPUT_TIM1OCREFCLR (0x00001847U) /*!< COMP1, COMP2, COMP3 or COMP7 output connected to TIM1 OCREF Clear */ 296 /* Output Redirection common to COMP1, COMP2 and COMP3 */ 297 #define COMP_OUTPUT_TIM2OCREFCLR (0x00002407U) /*!< COMP1, COMP2 or COMP3 output connected to TIM2 OCREF Clear */ 298 /* Output Redirection common to COMP1, COMP2, COMP4 and COMP5 */ 299 #define COMP_OUTPUT_TIM3OCREFCLR (0x00002C1BU) /*!< COMP1, COMP2, COMP4 or COMP5 output connected to TIM3 OCREF Clear */ 300 /* Output Redirection common to COMP4, COMP5, COMP6 and COMP7 */ 301 #define COMP_OUTPUT_TIM8OCREFCLR (0x00001C78U) /*!< COMP4, COMP5, COMP6 or COMP7 output connected to TIM8 OCREF Clear */ 302 /* Output Redirection common to COMP1 and COMP2 */ 303 #define COMP_OUTPUT_TIM1IC1 (0x00001C03U) /*!< COMP1 or COMP2 output connected to TIM1 Input Capture 1U */ 304 #define COMP_OUTPUT_TIM2IC4 (0x00002003U) /*!< COMP1 or COMP2 output connected to TIM2 Input Capture 4U */ 305 #define COMP_OUTPUT_TIM3IC1 (0x00002803U) /*!< COMP1 or COMP2 output connected to TIM3 Input Capture 1U */ 306 /* Output Redirection specific to COMP3 */ 307 #define COMP_OUTPUT_TIM4IC1 (0x00001C04U) /*!< COMP3 output connected to TIM4 Input Capture 1U */ 308 #define COMP_OUTPUT_TIM3IC2 (0x00002004U) /*!< COMP3 output connected to TIM3 Input Capture 2U */ 309 #define COMP_OUTPUT_TIM15IC1 (0x00002804U) /*!< COMP3 output connected to TIM15 Input Capture 1U */ 310 #define COMP_OUTPUT_TIM15BKIN (0x00002C04U) /*!< COMP3 output connected to TIM15 Break Input (BKIN) */ 311 /* Output Redirection specific to COMP4 */ 312 #define COMP_OUTPUT_TIM3IC3 (0x00001808U) /*!< COMP4 output connected to TIM3 Input Capture 3U */ 313 #define COMP_OUTPUT_TIM15IC2 (0x00002008U) /*!< COMP4 output connected to TIM15 Input Capture 2U */ 314 #define COMP_OUTPUT_TIM4IC2 (0x00002408U) /*!< COMP4 output connected to TIM4 Input Capture 2U */ 315 #define COMP_OUTPUT_TIM15OCREFCLR (0x00002808U) /*!< COMP4 output connected to TIM15 OCREF Clear */ 316 /* Output Redirection specific to COMP5 */ 317 #define COMP_OUTPUT_TIM2IC1 (0x00001810U) /*!< COMP5 output connected to TIM2 Input Capture 1U */ 318 #define COMP_OUTPUT_TIM17IC1 (0x00002010U) /*!< COMP5 output connected to TIM17 Input Capture 1U */ 319 #define COMP_OUTPUT_TIM4IC3 (0x00002410U) /*!< COMP5 output connected to TIM4 Input Capture 3U */ 320 #define COMP_OUTPUT_TIM16BKIN (0x00002810U) /*!< COMP5 output connected to TIM16 Break Input (BKIN) */ 321 /* Output Redirection specific to COMP6 */ 322 #define COMP_OUTPUT_TIM2IC2 (0x00001820U) /*!< COMP6 output connected to TIM2 Input Capture 2U */ 323 #define COMP_OUTPUT_COMP6_TIM2OCREFCLR (0x00002020U) /*!< COMP6 output connected to TIM2 OCREF Clear */ 324 #define COMP_OUTPUT_TIM16OCREFCLR (0x00002420U) /*!< COMP6 output connected to TIM16 OCREF Clear */ 325 #define COMP_OUTPUT_TIM16IC1 (0x00002820U) /*!< COMP6 output connected to TIM16 Input Capture 1U */ 326 #define COMP_OUTPUT_TIM4IC4 (0x00002C20U) /*!< COMP6 output connected to TIM4 Input Capture 4U */ 327 /* Output Redirection specific to COMP7 */ 328 #define COMP_OUTPUT_TIM2IC3 (0x00002040U) /*!< COMP7 output connected to TIM2 Input Capture 3U */ 329 #define COMP_OUTPUT_TIM1IC2 (0x00002440U) /*!< COMP7 output connected to TIM1 Input Capture 2U */ 330 #define COMP_OUTPUT_TIM17OCREFCLR (0x00002840U) /*!< COMP7 output connected to TIM17 OCREF Clear */ 331 #define COMP_OUTPUT_TIM17BKIN (0x00002C40U) /*!< COMP7 output connected to TIM17 Break Input (BKIN) */ 332 /** 333 * @} 334 */ 335 #elif defined(STM32F303xE) || defined(STM32F398xx) 336 /** @defgroup COMPEx_Output COMP Extended Output (STM32F303xE/STM32F398xx Product devices) 337 * Elements value convention on 16 LSB: 00XXXX000YYYYYYYb 338 * - YYYYYYY : Applicable comparator instance number (bitmap format: 0000001 for COMP1, 1000000 for COMP7) 339 * - XXXX : COMPxOUTSEL value 340 * @{ 341 */ 342 /* Output Redirection values common to all comparators COMP1...COMP7 */ 343 #define COMP_OUTPUT_NONE (0x0000007FU) /*!< COMP1, COMP2... or COMP7 output isn't connected to other peripherals */ 344 #define COMP_OUTPUT_TIM1BKIN (0x0000047FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input (BKIN) */ 345 #define COMP_OUTPUT_TIM1BKIN2 (0x0000087FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2 (BKIN2) */ 346 #define COMP_OUTPUT_TIM8BKIN (0x00000C7FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM8 Break Input (BKIN) */ 347 #define COMP_OUTPUT_TIM8BKIN2 (0x0000107FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM8 Break Input 2 (BKIN2) */ 348 #define COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2 (0x0000147FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2 and TIM8 Break Input 2U */ 349 #define COMP_OUTPUT_TIM20BKIN (0x0000307FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM20 Break Input (BKIN) */ 350 #define COMP_OUTPUT_TIM20BKIN2 (0x0000347FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM20 Break Input 2 (BKIN2) */ 351 #define COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2 (0x0000387FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2U, TIM8 Break Input 2 and TIM20 Break Input 2 */ 352 /* Output Redirection common to COMP1, COMP2, COMP3 and COMP7 */ 353 #define COMP_OUTPUT_TIM1OCREFCLR (0x00001847U) /*!< COMP1, COMP2, COMP3 or COMP7 output connected to TIM1 OCREF Clear */ 354 /* Output Redirection common to COMP1, COMP2 and COMP3 */ 355 #define COMP_OUTPUT_TIM2OCREFCLR (0x00002407U) /*!< COMP1, COMP2 or COMP3 output connected to TIM2 OCREF Clear */ 356 /* Output Redirection common to COMP1, COMP2, COMP4 and COMP5 */ 357 #define COMP_OUTPUT_TIM3OCREFCLR (0x00002C1BU) /*!< COMP1, COMP2, COMP4 or COMP5 output connected to TIM3 OCREF Clear */ 358 /* Output Redirection common to COMP4, COMP5, COMP6 and COMP7 */ 359 #define COMP_OUTPUT_TIM8OCREFCLR (0x00001C78U) /*!< COMP4, COMP5, COMP6 or COMP7 output connected to TIM8 OCREF Clear */ 360 /* Output Redirection common to COMP1 and COMP2 */ 361 #define COMP_OUTPUT_TIM1IC1 (0x00001C03U) /*!< COMP1 or COMP2 output connected to TIM1 Input Capture 1U */ 362 #define COMP_OUTPUT_TIM2IC4 (0x00002003U) /*!< COMP1 or COMP2 output connected to TIM2 Input Capture 4U */ 363 #define COMP_OUTPUT_TIM3IC1 (0x00002803U) /*!< COMP1 or COMP2 output connected to TIM3 Input Capture 1U */ 364 /* Output Redirection specific to COMP2 */ 365 #define COMP_OUTPUT_TIM20OCREFCLR (0x00003C04U) /*!< COMP2 output connected to TIM20 OCREF Clear */ 366 /* Output Redirection specific to COMP3 */ 367 #define COMP_OUTPUT_TIM4IC1 (0x00001C04U) /*!< COMP3 output connected to TIM4 Input Capture 1U */ 368 #define COMP_OUTPUT_TIM3IC2 (0x00002004U) /*!< COMP3 output connected to TIM3 Input Capture 2U */ 369 #define COMP_OUTPUT_TIM15IC1 (0x00002804U) /*!< COMP3 output connected to TIM15 Input Capture 1U */ 370 #define COMP_OUTPUT_TIM15BKIN (0x00002C04U) /*!< COMP3 output connected to TIM15 Break Input (BKIN) */ 371 /* Output Redirection specific to COMP4 */ 372 #define COMP_OUTPUT_TIM3IC3 (0x00001808U) /*!< COMP4 output connected to TIM3 Input Capture 3U */ 373 #define COMP_OUTPUT_TIM15IC2 (0x00002008U) /*!< COMP4 output connected to TIM15 Input Capture 2U */ 374 #define COMP_OUTPUT_TIM4IC2 (0x00002408U) /*!< COMP4 output connected to TIM4 Input Capture 2U */ 375 #define COMP_OUTPUT_TIM15OCREFCLR (0x00002808U) /*!< COMP4 output connected to TIM15 OCREF Clear */ 376 /* Output Redirection specific to COMP5 */ 377 #define COMP_OUTPUT_TIM2IC1 (0x00001810U) /*!< COMP5 output connected to TIM2 Input Capture 1U */ 378 #define COMP_OUTPUT_TIM17IC1 (0x00002010U) /*!< COMP5 output connected to TIM17 Input Capture 1U */ 379 #define COMP_OUTPUT_TIM4IC3 (0x00002410U) /*!< COMP5 output connected to TIM4 Input Capture 3U */ 380 #define COMP_OUTPUT_TIM16BKIN (0x00002810U) /*!< COMP5 output connected to TIM16 Break Input (BKIN) */ 381 /* Output Redirection specific to COMP6 */ 382 #define COMP_OUTPUT_TIM2IC2 (0x00001820U) /*!< COMP6 output connected to TIM2 Input Capture 2U */ 383 #define COMP_OUTPUT_COMP6_TIM2OCREFCLR (0x00002020U) /*!< COMP6 output connected to TIM2 OCREF Clear */ 384 #define COMP_OUTPUT_TIM16OCREFCLR (0x00002420U) /*!< COMP6 output connected to TIM16 OCREF Clear */ 385 #define COMP_OUTPUT_TIM16IC1 (0x00002820U) /*!< COMP6 output connected to TIM16 Input Capture 1U */ 386 #define COMP_OUTPUT_TIM4IC4 (0x00002C20U) /*!< COMP6 output connected to TIM4 Input Capture 4U */ 387 /* Output Redirection specific to COMP7 */ 388 #define COMP_OUTPUT_TIM2IC3 (0x00002040U) /*!< COMP7 output connected to TIM2 Input Capture 3U */ 389 #define COMP_OUTPUT_TIM1IC2 (0x00002440U) /*!< COMP7 output connected to TIM1 Input Capture 2U */ 390 #define COMP_OUTPUT_TIM17OCREFCLR (0x00002840U) /*!< COMP7 output connected to TIM17 OCREF Clear */ 391 #define COMP_OUTPUT_TIM17BKIN (0x00002C40U) /*!< COMP7 output connected to TIM17 Break Input (BKIN) */ 392 /** 393 * @} 394 */ 395 #elif defined(STM32F373xC) || defined(STM32F378xx) 396 /** @defgroup COMPEx_Output COMP Extended Output (STM32F373xC/STM32F378xx Product devices) 397 * Elements value convention: 00000XXX000000YYb 398 * - YY : Applicable comparator instance number (bitmap format: 01 for COMP1, 10 for COMP2) 399 * - XXX : COMPxOUTSEL value 400 * @{ 401 */ 402 /* Output Redirection values common to all comparators COMP1 and COMP2 */ 403 #define COMP_OUTPUT_NONE (0x0003U) /*!< COMP1 or COMP2 output isn't connected to other peripherals */ 404 #define COMP_OUTPUT_TIM2IC4 (0x0403U) /*!< COMP1 or COMP2 output connected to TIM2 Input Capture 4U */ 405 #define COMP_OUTPUT_TIM2OCREFCLR (0x0503U) /*!< COMP1 or COMP2 output connected to TIM2 OCREF Clear */ 406 /* Output Redirection specific to COMP1 */ 407 #define COMP_OUTPUT_TIM15BKIN (0x0101U) /*!< COMP1 output connected to TIM15 Break Input */ 408 #define COMP_OUTPUT_COMP1_TIM3IC1 (0x0201U) /*!< COMP1 output connected to TIM3 Input Capture 1U */ 409 #define COMP_OUTPUT_COMP1_TIM3OCREFCLR (0x0301U) /*!< COMP1 output connected to TIM3 OCREF Clear */ 410 #define COMP_OUTPUT_TIM5IC4 (0x0601U) /*!< COMP1 output connected to TIM5 Input Capture 4U */ 411 #define COMP_OUTPUT_TIM5OCREFCLR (0x0701U) /*!< COMP1 output connected to TIM5 OCREF Clear */ 412 /* Output Redirection specific to COMP2 */ 413 #define COMP_OUTPUT_TIM16BKIN (0x0102U) /*!< COMP2 output connected to TIM16 Break Input */ 414 #define COMP_OUTPUT_TIM4IC1 (0x0202U) /*!< COMP2 output connected to TIM4 Input Capture 1U */ 415 #define COMP_OUTPUT_TIM4OCREFCLR (0x0302U) /*!< COMP2 output connected to TIM4 OCREF Clear */ 416 #define COMP_OUTPUT_COMP2_TIM3IC1 (0x0602U) /*!< COMP2 output connected to TIM3 Input Capture 1U */ 417 #define COMP_OUTPUT_COMP2_TIM3OCREFCLR (0x0702U) /*!< COMP2 output connected to TIM3 OCREF Clear */ 418 /** 419 * @} 420 */ 421 #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */ 422 423 #if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) 424 /** @defgroup COMPEx_WindowMode COMP Extended WindowMode (STM32F302xC/STM32F303xC/STM32F358xx Product devices) 425 * @{ 426 */ 427 #define COMP_WINDOWMODE_DISABLE (0x00000000U) /*!< Window mode disabled */ 428 #define COMP_WINDOWMODE_ENABLE COMP_CSR_COMPxWNDWEN /*!< Window mode enabled: non inverting input of comparator X (x=2U,4,6U) 429 is connected to the non inverting input of comparator X-1U */ 430 /** 431 * @} 432 */ 433 #elif defined(STM32F373xC) || defined(STM32F378xx) 434 /** @defgroup COMPEx_WindowMode COMP Extended WindowMode (STM32F373xC/STM32F378xx Product devices) 435 * @{ 436 */ 437 #define COMP_WINDOWMODE_DISABLE (0x00000000U) /*!< Window mode disabled */ 438 #define COMP_WINDOWMODE_ENABLE ((uint32_t)COMP_CSR_COMPxWNDWEN) /*!< Window mode enabled: non inverting input of comparator 2 439 is connected to the non inverting input of comparator 1 (PA1) */ 440 /** 441 * @} 442 */ 443 #else 444 /** @defgroup COMPEx_WindowMode COMP Extended WindowMode (Other Product devices) 445 * @{ 446 */ 447 #define COMP_WINDOWMODE_DISABLE (0x00000000U) /*!< Window mode disabled (not available) */ 448 /** 449 * @} 450 */ 451 #endif /* STM32F302xC || STM32F303xC || STM32F358xx */ 452 453 /** @defgroup COMPEx_Mode COMP Extended Mode 454 * @{ 455 */ 456 #if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ 457 defined(STM32F373xC) || defined(STM32F378xx) 458 459 /* Please refer to the electrical characteristics in the device datasheet for 460 the power consumption values */ 461 #define COMP_MODE_HIGHSPEED (0x00000000U) /*!< High Speed */ 462 #define COMP_MODE_MEDIUMSPEED COMP_CSR_COMPxMODE_0 /*!< Medium Speed */ 463 #define COMP_MODE_LOWPOWER COMP_CSR_COMPxMODE_1 /*!< Low power mode */ 464 #define COMP_MODE_ULTRALOWPOWER COMP_CSR_COMPxMODE /*!< Ultra-low power mode */ 465 466 #endif /* STM32F302xC || STM32F303xC || STM32F358xx || */ 467 /* STM32F373xC || STM32F378xx */ 468 /** 469 * @} 470 */ 471 472 /** @defgroup COMPEx_Hysteresis COMP Extended Hysteresis 473 * @{ 474 */ 475 #if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ 476 defined(STM32F373xC) || defined(STM32F378xx) 477 478 #define COMP_HYSTERESIS_NONE (0x00000000U) /*!< No hysteresis */ 479 #define COMP_HYSTERESIS_LOW COMP_CSR_COMPxHYST_0 /*!< Hysteresis level low */ 480 #define COMP_HYSTERESIS_MEDIUM COMP_CSR_COMPxHYST_1 /*!< Hysteresis level medium */ 481 #define COMP_HYSTERESIS_HIGH COMP_CSR_COMPxHYST /*!< Hysteresis level high */ 482 483 #else 484 485 #define COMP_HYSTERESIS_NONE (0x00000000U) /*!< No hysteresis */ 486 487 #endif /* STM32F302xC || STM32F303xC || STM32F358xx || */ 488 /* STM32F373xC || STM32F378xx */ 489 /** 490 * @} 491 */ 492 493 #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ 494 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) 495 /** @defgroup COMPEx_BlankingSrce COMP Extended Blanking Source (STM32F301x8/STM32F302x8/STM32F303x8/STM32F334x8/STM32F318xx/STM32F328xx Product devices) 496 * @{ 497 */ 498 /* No blanking source can be selected for all comparators */ 499 #define COMP_BLANKINGSRCE_NONE (0x00000000U) /*!< No blanking source */ 500 /* Blanking source for COMP2 */ 501 #define COMP_BLANKINGSRCE_TIM1OC5 COMP_CSR_COMPxBLANKING_0 /*!< TIM1 OC5 selected as blanking source for COMP2 */ 502 #define COMP_BLANKINGSRCE_TIM2OC3 COMP_CSR_COMPxBLANKING_1 /*!< TIM2 OC3 selected as blanking source for COMP2 */ 503 #define COMP_BLANKINGSRCE_TIM3OC3 (COMP_CSR_COMPxBLANKING_0|COMP_CSR_COMPxBLANKING_1) /*!< TIM3 OC3 selected as blanking source for COMP2 */ 504 /* Blanking source for COMP4 */ 505 #define COMP_BLANKINGSRCE_TIM3OC4 COMP_CSR_COMPxBLANKING_0 /*!< TIM3 OC4 selected as blanking source for COMP4 */ 506 #define COMP_BLANKINGSRCE_TIM15OC1 (COMP_CSR_COMPxBLANKING_0|COMP_CSR_COMPxBLANKING_1) /*!< TIM15 OC1 selected as blanking source for COMP4 */ 507 /* Blanking source for COMP6 */ 508 #define COMP_BLANKINGSRCE_TIM2OC4 (COMP_CSR_COMPxBLANKING_0|COMP_CSR_COMPxBLANKING_1) /*!< TIM2 OC4 selected as blanking source for COMP6 */ 509 #define COMP_BLANKINGSRCE_TIM15OC2 COMP_CSR_COMPxBLANKING_2 /*!< TIM15 OC2 selected as blanking source for COMP6 */ 510 /** 511 * @} 512 */ 513 514 #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ 515 /* STM32F303x8 || STM32F334x8 || STM32F328xx */ 516 517 #if defined(STM32F302xE) ||\ 518 defined(STM32F302xC) 519 /** @defgroup COMPEx_BlankingSrce COMP Extended Blanking Source (STM32F302xE/STM32F302xC Product devices) 520 * @{ 521 */ 522 /* No blanking source can be selected for all comparators */ 523 #define COMP_BLANKINGSRCE_NONE (0x00000000U) /*!< No blanking source */ 524 /* Blanking source common for COMP1 and COMP2 */ 525 #define COMP_BLANKINGSRCE_TIM1OC5 COMP_CSR_COMPxBLANKING_0 /*!< TIM1 OC5 selected as blanking source for COMP1 and COMP2 */ 526 /* Blanking source common for COMP1 and COMP2 */ 527 #define COMP_BLANKINGSRCE_TIM2OC3 COMP_CSR_COMPxBLANKING_1 /*!< TIM2 OC3 selected as blanking source for COMP1 and COMP2 */ 528 /* Blanking source common for COMP1 and COMP2 */ 529 #define COMP_BLANKINGSRCE_TIM3OC3 (COMP_CSR_COMPxBLANKING_0|COMP_CSR_COMPxBLANKING_1) /*!< TIM3 OC3 selected as blanking source for COMP1 and COMP2 */ 530 /* Blanking source for COMP4 */ 531 #define COMP_BLANKINGSRCE_TIM3OC4 COMP_CSR_COMPxBLANKING_0 /*!< TIM3 OC4 selected as blanking source for COMP4 */ 532 #define COMP_BLANKINGSRCE_TIM15OC1 (COMP_CSR_COMPxBLANKING_0|COMP_CSR_COMPxBLANKING_1) /*!< TIM15 OC1 selected as blanking source for COMP4 */ 533 /* Blanking source for COMP6 */ 534 #define COMP_BLANKINGSRCE_TIM2OC4 (COMP_CSR_COMPxBLANKING_0|COMP_CSR_COMPxBLANKING_1) /*!< TIM2 OC4 selected as blanking source for COMP6 */ 535 #define COMP_BLANKINGSRCE_TIM15OC2 COMP_CSR_COMPxBLANKING_2 /*!< TIM15 OC2 selected as blanking source for COMP6 */ 536 /** 537 * @} 538 */ 539 540 #endif /* STM32F302xE || */ 541 /* STM32F302xC */ 542 543 #if defined(STM32F303xE) || defined(STM32F398xx) || \ 544 defined(STM32F303xC) || defined(STM32F358xx) 545 /** @defgroup COMPEx_BlankingSrce COMP Extended Blanking Source (STM32F303xE/STM32F398xx/STM32F303xC/STM32F358xx Product devices) 546 * @{ 547 */ 548 /* No blanking source can be selected for all comparators */ 549 #define COMP_BLANKINGSRCE_NONE (0x00000000U) /*!< No blanking source */ 550 /* Blanking source common for COMP1, COMP2, COMP3 and COMP7 */ 551 #define COMP_BLANKINGSRCE_TIM1OC5 COMP_CSR_COMPxBLANKING_0 /*!< TIM1 OC5 selected as blanking source for COMP1, COMP2, COMP3 and COMP7 */ 552 /* Blanking source common for COMP1 and COMP2 */ 553 #define COMP_BLANKINGSRCE_TIM2OC3 COMP_CSR_COMPxBLANKING_1 /*!< TIM2 OC5 selected as blanking source for COMP1 and COMP2 */ 554 /* Blanking source common for COMP1, COMP2 and COMP5 */ 555 #define COMP_BLANKINGSRCE_TIM3OC3 (COMP_CSR_COMPxBLANKING_0|COMP_CSR_COMPxBLANKING_1) /*!< TIM2 OC3 selected as blanking source for COMP1, COMP2 and COMP5 */ 556 /* Blanking source common for COMP3 and COMP6 */ 557 #define COMP_BLANKINGSRCE_TIM2OC4 (COMP_CSR_COMPxBLANKING_0|COMP_CSR_COMPxBLANKING_1) /*!< TIM2 OC4 selected as blanking source for COMP3 and COMP6 */ 558 /* Blanking source common for COMP4, COMP5, COMP6 and COMP7 */ 559 #define COMP_BLANKINGSRCE_TIM8OC5 COMP_CSR_COMPxBLANKING_1 /*!< TIM8 OC5 selected as blanking source for COMP4, COMP5, COMP6 and COMP7 */ 560 /* Blanking source for COMP4 */ 561 #define COMP_BLANKINGSRCE_TIM3OC4 COMP_CSR_COMPxBLANKING_0 /*!< TIM3 OC4 selected as blanking source for COMP4 */ 562 #define COMP_BLANKINGSRCE_TIM15OC1 (COMP_CSR_COMPxBLANKING_0|COMP_CSR_COMPxBLANKING_1) /*!< TIM15 OC1 selected as blanking source for COMP4 */ 563 /* Blanking source common for COMP6 and COMP7 */ 564 #define COMP_BLANKINGSRCE_TIM15OC2 COMP_CSR_COMPxBLANKING_2 /*!< TIM15 OC2 selected as blanking source for COMP6 and COMP7 */ 565 /** 566 * @} 567 */ 568 569 #endif /* STM32F303xE || STM32F398xx || */ 570 /* STM32F303xC || STM32F358xx */ 571 572 #if defined(STM32F373xC) || defined(STM32F378xx) 573 /** @defgroup COMPEx_BlankingSrce COMP Extended Blanking Source (STM32F373xC/STM32F378xx Product devices) 574 * @{ 575 */ 576 /* No blanking source can be selected for all comparators */ 577 #define COMP_BLANKINGSRCE_NONE (0x00000000U) /*!< No blanking source */ 578 /** 579 * @} 580 */ 581 582 #endif /* STM32F373xC || STM32F378xx */ 583 584 /** @defgroup COMP_Flag COMP Flag 585 * @{ 586 */ 587 #if defined(STM32F373xC) || defined(STM32F378xx) 588 #define COMP_FLAG_LOCK COMP_CSR_COMP1LOCK /*!< Lock flag */ 589 #else 590 #define COMP_FLAG_LOCK COMP_CSR_LOCK /*!< Lock flag */ 591 #endif /* STM32F373xC || STM32F378xx */ 592 /** 593 * @} 594 */ 595 596 597 /** 598 * @} 599 */ 600 601 /* Exported macro ------------------------------------------------------------*/ 602 /** @defgroup COMPEx_Exported_Macros COMP Extended Exported Macros 603 * @{ 604 */ 605 #if defined(STM32F373xC) || defined(STM32F378xx) 606 607 /** 608 * @brief Enable the specified comparator. 609 * @param __HANDLE__ COMP handle. 610 * @retval None 611 */ 612 #define __HAL_COMP_ENABLE(__HANDLE__) \ 613 do { \ 614 uint32_t regshift = COMP_CSR_COMP1_SHIFT; \ 615 \ 616 if((__HANDLE__)->Instance == COMP2) \ 617 { \ 618 regshift = COMP_CSR_COMP2_SHIFT; \ 619 } \ 620 SET_BIT(COMP->CSR, (uint32_t)COMP_CSR_COMPxEN << regshift); \ 621 } while(0U) 622 623 /** 624 * @brief Disable the specified comparator. 625 * @param __HANDLE__ COMP handle. 626 * @retval None 627 */ 628 #define __HAL_COMP_DISABLE(__HANDLE__) \ 629 do { \ 630 uint32_t regshift = COMP_CSR_COMP1_SHIFT; \ 631 \ 632 if((__HANDLE__)->Instance == COMP2) \ 633 { \ 634 regshift = COMP_CSR_COMP2_SHIFT; \ 635 } \ 636 CLEAR_BIT(COMP->CSR, (uint32_t)COMP_CSR_COMPxEN << regshift); \ 637 } while(0U) 638 639 /** 640 * @brief Lock a comparator instance 641 * @param __HANDLE__ COMP handle 642 * @retval None. 643 */ 644 #define __HAL_COMP_LOCK(__HANDLE__) \ 645 do { \ 646 uint32_t regshift = COMP_CSR_COMP1_SHIFT; \ 647 \ 648 if((__HANDLE__)->Instance == COMP2) \ 649 { \ 650 regshift = COMP_CSR_COMP2_SHIFT; \ 651 } \ 652 SET_BIT(COMP->CSR, (uint32_t)COMP_CSR_COMPxLOCK << regshift); \ 653 } while(0U) 654 655 /** @brief Check whether the specified COMP flag is set or not. 656 * @param __HANDLE__ COMP Handle. 657 * @param __FLAG__ flag to check. 658 * This parameter can be one of the following values: 659 * @arg @ref COMP_FLAG_LOCK lock flag 660 * @retval The new state of __FLAG__ (TRUE or FALSE). 661 */ 662 #define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__) \ 663 (((__HANDLE__)->Instance == COMP1) ? (((__HANDLE__)->Instance->CSR & (__FLAG__)) == (__FLAG__)) \ 664 (((__HANDLE__)->Instance->CSR & (uint32_t)((__FLAG__) << COMP_CSR_COMP2_SHIFT) == (__FLAG__)))) 665 666 #else 667 668 /** 669 * @brief Enable the specified comparator. 670 * @param __HANDLE__ COMP handle. 671 * @retval None 672 */ 673 #define __HAL_COMP_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxEN) 674 675 /** 676 * @brief Disable the specified comparator. 677 * @param __HANDLE__ COMP handle. 678 * @retval None 679 */ 680 #define __HAL_COMP_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxEN) 681 682 /** 683 * @brief Lock a comparator instance 684 * @param __HANDLE__ COMP handle 685 * @retval None. 686 */ 687 #define __HAL_COMP_LOCK(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxLOCK) 688 689 /** @brief Check whether the specified COMP flag is set or not. 690 * @param __HANDLE__ COMP Handle. 691 * @param __FLAG__ flag to check. 692 * This parameter can be one of the following values: 693 * @arg @ref COMP_FLAG_LOCK lock flag 694 * @retval The new state of __FLAG__ (TRUE or FALSE). 695 */ 696 #define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->CSR & (__FLAG__)) == (__FLAG__)) 697 698 #endif /* STM32F373xC || STM32F378xx */ 699 700 #if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ 701 defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ 702 defined(STM32F373xC) || defined(STM32F378xx) 703 704 /** 705 * @brief Enable the COMP1 EXTI line rising edge trigger. 706 * @retval None 707 */ 708 #define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP1) 709 710 /** 711 * @brief Disable the COMP1 EXTI line rising edge trigger. 712 * @retval None 713 */ 714 #define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP1) 715 716 /** 717 * @brief Enable the COMP1 EXTI line falling edge trigger. 718 * @retval None 719 */ 720 #define __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP1) 721 722 /** 723 * @brief Disable the COMP1 EXTI line falling edge trigger. 724 * @retval None 725 */ 726 #define __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP1) 727 728 /** 729 * @brief Enable the COMP1 EXTI line rising & falling edge trigger. 730 * @retval None 731 */ 732 #define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ 733 __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE(); \ 734 __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE(); \ 735 } while(0U) 736 737 /** 738 * @brief Disable the COMP1 EXTI line rising & falling edge trigger. 739 * @retval None 740 */ 741 #define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ 742 __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE(); \ 743 __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE(); \ 744 } while(0U) 745 746 /** 747 * @brief Enable the COMP1 EXTI line in interrupt mode. 748 * @retval None 749 */ 750 #define __HAL_COMP_COMP1_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP1) 751 752 /** 753 * @brief Disable the COMP1 EXTI line in interrupt mode. 754 * @retval None 755 */ 756 #define __HAL_COMP_COMP1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP1) 757 758 /** 759 * @brief Generate a software interrupt on the COMP1 EXTI line. 760 * @retval None 761 */ 762 #define __HAL_COMP_COMP1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP1) 763 764 /** 765 * @brief Enable the COMP1 EXTI line in event mode. 766 * @retval None 767 */ 768 #define __HAL_COMP_COMP1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP1) 769 770 /** 771 * @brief Disable the COMP1 EXTI line in event mode. 772 * @retval None 773 */ 774 #define __HAL_COMP_COMP1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP1) 775 776 /** 777 * @brief Check whether the COMP1 EXTI line flag is set or not. 778 * @retval RESET or SET 779 */ 780 #define __HAL_COMP_COMP1_EXTI_GET_FLAG() READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP1) 781 782 /** 783 * @brief Clear the COMP1 EXTI flag. 784 * @retval None 785 */ 786 #define __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP1) 787 788 #endif /* STM32F302xC || STM32F303xC || STM32F358xx || */ 789 /* STM32F302xE || STM32F303xE || STM32F398xx || */ 790 /* STM32F373xC || STM32F378xx */ 791 792 /** 793 * @brief Enable the COMP2 EXTI line rising edge trigger. 794 * @retval None 795 */ 796 #define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP2) 797 798 /** 799 * @brief Disable the COMP2 EXTI line rising edge trigger. 800 * @retval None 801 */ 802 #define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP2) 803 804 /** 805 * @brief Enable the COMP2 EXTI line falling edge trigger. 806 * @retval None 807 */ 808 #define __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP2) 809 810 /** 811 * @brief Disable the COMP2 EXTI line falling edge trigger. 812 * @retval None 813 */ 814 #define __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP2) 815 816 /** 817 * @brief Enable the COMP2 EXTI line rising & falling edge trigger. 818 * @retval None 819 */ 820 #define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ 821 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE(); \ 822 __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE(); \ 823 } while(0U) 824 825 /** 826 * @brief Disable the COMP2 EXTI line rising & falling edge trigger. 827 * @retval None 828 */ 829 #define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ 830 __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE(); \ 831 __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE(); \ 832 } while(0U) 833 834 /** 835 * @brief Enable the COMP2 EXTI line in interrupt mode. 836 * @retval None 837 */ 838 #define __HAL_COMP_COMP2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP2) 839 840 /** 841 * @brief Disable the COMP2 EXTI line in interrupt mode. 842 * @retval None 843 */ 844 #define __HAL_COMP_COMP2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP2) 845 846 /** 847 * @brief Generate a software interrupt on the COMP2 EXTI line. 848 * @retval None 849 */ 850 #define __HAL_COMP_COMP2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP2) 851 852 /** 853 * @brief Enable the COMP2 EXTI line in event mode. 854 * @retval None 855 */ 856 #define __HAL_COMP_COMP2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP2) 857 858 /** 859 * @brief Disable the COMP2 EXTI line in event mode. 860 * @retval None 861 */ 862 #define __HAL_COMP_COMP2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP2) 863 864 /** 865 * @brief Check whether the COMP2 EXTI line flag is set or not. 866 * @retval RESET or SET 867 */ 868 #define __HAL_COMP_COMP2_EXTI_GET_FLAG() READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP2) 869 870 /** 871 * @brief Clear the COMP2 EXTI flag. 872 * @retval None 873 */ 874 #define __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP2) 875 876 #if defined(STM32F303xE) || defined(STM32F398xx) || \ 877 defined(STM32F303xC) || defined(STM32F358xx) 878 879 /** 880 * @brief Enable the COMP3 EXTI line rising edge trigger. 881 * @retval None 882 */ 883 #define __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP3) 884 885 /** 886 * @brief Disable the COMP3 EXTI line rising edge trigger. 887 * @retval None 888 */ 889 #define __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP3) 890 891 /** 892 * @brief Enable the COMP3 EXTI line falling edge trigger. 893 * @retval None 894 */ 895 #define __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP3) 896 897 /** 898 * @brief Disable the COMP3 EXTI line falling edge trigger. 899 * @retval None 900 */ 901 #define __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP3) 902 903 /** 904 * @brief Enable the COMP3 EXTI line rising & falling edge trigger. 905 * @retval None 906 */ 907 #define __HAL_COMP_COMP3_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ 908 __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE(); \ 909 __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE(); \ 910 } while(0U) 911 912 /** 913 * @brief Disable the COMP3 EXTI line rising & falling edge trigger. 914 * @retval None 915 */ 916 #define __HAL_COMP_COMP3_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ 917 __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE(); \ 918 __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE(); \ 919 } while(0U) 920 921 /** 922 * @brief Enable the COMP3 EXTI line in interrupt mode. 923 * @retval None 924 */ 925 #define __HAL_COMP_COMP3_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP3) 926 927 /** 928 * @brief Disable the COMP3 EXTI line in interrupt mode. 929 * @retval None 930 */ 931 #define __HAL_COMP_COMP3_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP3) 932 933 /** 934 * @brief Generate a software interrupt on the COMP3 EXTI line. 935 * @retval None 936 */ 937 #define __HAL_COMP_COMP3_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP3) 938 939 /** 940 * @brief Enable the COMP3 EXTI line in event mode. 941 * @retval None 942 */ 943 #define __HAL_COMP_COMP3_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP3) 944 945 /** 946 * @brief Disable the COMP3 EXTI line in event mode. 947 * @retval None 948 */ 949 #define __HAL_COMP_COMP3_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP3) 950 951 /** 952 * @brief Check whether the COMP3 EXTI line flag is set or not. 953 * @retval RESET or SET 954 */ 955 #define __HAL_COMP_COMP3_EXTI_GET_FLAG() READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP3) 956 957 /** 958 * @brief Clear the COMP3 EXTI flag. 959 * @retval None 960 */ 961 #define __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP3) 962 963 #endif /* STM32F303xE || STM32F398xx || */ 964 /* STM32F303xC || STM32F358xx */ 965 966 #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ 967 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ 968 defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ 969 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) 970 971 /** 972 * @brief Enable the COMP4 EXTI line rising edge trigger. 973 * @retval None 974 */ 975 #define __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP4) 976 977 /** 978 * @brief Disable the COMP4 EXTI line rising edge trigger. 979 * @retval None 980 */ 981 #define __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP4) 982 983 /** 984 * @brief Enable the COMP4 EXTI line falling edge trigger. 985 * @retval None 986 */ 987 #define __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP4) 988 989 /** 990 * @brief Disable the COMP4 EXTI line falling edge trigger. 991 * @retval None 992 */ 993 #define __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP4) 994 995 /** 996 * @brief Enable the COMP4 EXTI line rising & falling edge trigger. 997 * @retval None 998 */ 999 #define __HAL_COMP_COMP4_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ 1000 __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE(); \ 1001 __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE(); \ 1002 } while(0U) 1003 1004 /** 1005 * @brief Disable the COMP4 EXTI line rising & falling edge trigger. 1006 * @retval None 1007 */ 1008 #define __HAL_COMP_COMP4_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ 1009 __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE(); \ 1010 __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE(); \ 1011 } while(0U) 1012 1013 /** 1014 * @brief Enable the COMP4 EXTI line in interrupt mode. 1015 * @retval None 1016 */ 1017 #define __HAL_COMP_COMP4_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP4) 1018 1019 /** 1020 * @brief Disable the COMP4 EXTI line in interrupt mode. 1021 * @retval None 1022 */ 1023 #define __HAL_COMP_COMP4_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP4) 1024 1025 /** 1026 * @brief Generate a software interrupt on the COMP4 EXTI line. 1027 * @retval None 1028 */ 1029 #define __HAL_COMP_COMP4_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP4) 1030 1031 /** 1032 * @brief Enable the COMP4 EXTI line in event mode. 1033 * @retval None 1034 */ 1035 #define __HAL_COMP_COMP4_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP4) 1036 1037 /** 1038 * @brief Disable the COMP4 EXTI line in event mode. 1039 * @retval None 1040 */ 1041 #define __HAL_COMP_COMP4_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP4) 1042 1043 /** 1044 * @brief Check whether the COMP4 EXTI line flag is set or not. 1045 * @retval RESET or SET 1046 */ 1047 #define __HAL_COMP_COMP4_EXTI_GET_FLAG() READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP4) 1048 1049 /** 1050 * @brief Clear the COMP4 EXTI flag. 1051 * @retval None 1052 */ 1053 #define __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP4) 1054 1055 #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ 1056 /* STM32F302xC || STM32F303xC || STM32F358xx || */ 1057 /* STM32F302xE || STM32F303xE || STM32F398xx || */ 1058 /* STM32F303x8 || STM32F334x8 || STM32F328xx */ 1059 1060 #if defined(STM32F303xE) || defined(STM32F398xx) || \ 1061 defined(STM32F303xC) || defined(STM32F358xx) 1062 1063 /** 1064 * @brief Enable the COMP5 EXTI line rising edge trigger. 1065 * @retval None 1066 */ 1067 #define __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP5) 1068 1069 /** 1070 * @brief Disable the COMP5 EXTI line rising edge trigger. 1071 * @retval None 1072 */ 1073 #define __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP5) 1074 1075 /** 1076 * @brief Enable the COMP5 EXTI line falling edge trigger. 1077 * @retval None 1078 */ 1079 #define __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP5) 1080 1081 /** 1082 * @brief Disable the COMP5 EXTI line falling edge trigger. 1083 * @retval None 1084 */ 1085 #define __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP5) 1086 1087 /** 1088 * @brief Enable the COMP5 EXTI line rising & falling edge trigger. 1089 * @retval None 1090 */ 1091 #define __HAL_COMP_COMP5_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ 1092 __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE(); \ 1093 __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE(); \ 1094 } while(0U) 1095 1096 /** 1097 * @brief Disable the COMP5 EXTI line rising & falling edge trigger. 1098 * @retval None 1099 */ 1100 #define __HAL_COMP_COMP5_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ 1101 __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE(); \ 1102 __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE(); \ 1103 } while(0U) 1104 1105 /** 1106 * @brief Enable the COMP5 EXTI line in interrupt mode. 1107 * @retval None 1108 */ 1109 #define __HAL_COMP_COMP5_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP5) 1110 1111 /** 1112 * @brief Disable the COMP5 EXTI line in interrupt mode. 1113 * @retval None 1114 */ 1115 #define __HAL_COMP_COMP5_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP5) 1116 1117 /** 1118 * @brief Generate a software interrupt on the COMP5 EXTI line. 1119 * @retval None 1120 */ 1121 #define __HAL_COMP_COMP5_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP5) 1122 1123 /** 1124 * @brief Enable the COMP5 EXTI line in event mode. 1125 * @retval None 1126 */ 1127 #define __HAL_COMP_COMP5_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP5) 1128 1129 /** 1130 * @brief Disable the COMP5 EXTI line in event mode. 1131 * @retval None 1132 */ 1133 #define __HAL_COMP_COMP5_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP5) 1134 1135 /** 1136 * @brief Check whether the COMP5 EXTI line flag is set or not. 1137 * @retval RESET or SET 1138 */ 1139 #define __HAL_COMP_COMP5_EXTI_GET_FLAG() READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP5) 1140 1141 /** 1142 * @brief Clear the COMP5 EXTI flag. 1143 * @retval None 1144 */ 1145 #define __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP5) 1146 1147 #endif /* STM32F303xE || STM32F398xx || */ 1148 /* STM32F303xC || STM32F358xx */ 1149 1150 #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ 1151 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ 1152 defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ 1153 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) 1154 1155 /** 1156 * @brief Enable the COMP6 EXTI line rising edge trigger. 1157 * @retval None 1158 */ 1159 #define __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, COMP_EXTI_LINE_COMP6) 1160 1161 /** 1162 * @brief Disable the COMP6 EXTI line rising edge trigger. 1163 * @retval None 1164 */ 1165 #define __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, COMP_EXTI_LINE_COMP6) 1166 1167 /** 1168 * @brief Enable the COMP6 EXTI line falling edge trigger. 1169 * @retval None 1170 */ 1171 #define __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, COMP_EXTI_LINE_COMP6) 1172 1173 /** 1174 * @brief Disable the COMP6 EXTI line falling edge trigger. 1175 * @retval None 1176 */ 1177 #define __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, COMP_EXTI_LINE_COMP6) 1178 1179 /** 1180 * @brief Enable the COMP6 EXTI line rising & falling edge trigger. 1181 * @retval None 1182 */ 1183 #define __HAL_COMP_COMP6_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ 1184 __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE(); \ 1185 __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE(); \ 1186 } while(0U) 1187 1188 /** 1189 * @brief Disable the COMP6 EXTI line rising & falling edge trigger. 1190 * @retval None 1191 */ 1192 #define __HAL_COMP_COMP6_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ 1193 __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE(); \ 1194 __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE(); \ 1195 } while(0U) 1196 1197 /** 1198 * @brief Enable the COMP6 EXTI line in interrupt mode. 1199 * @retval None 1200 */ 1201 #define __HAL_COMP_COMP6_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, COMP_EXTI_LINE_COMP6) 1202 1203 /** 1204 * @brief Disable the COMP6 EXTI line in interrupt mode. 1205 * @retval None 1206 */ 1207 #define __HAL_COMP_COMP6_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, COMP_EXTI_LINE_COMP6) 1208 1209 /** 1210 * @brief Generate a software interrupt on the COMP6 EXTI line. 1211 * @retval None 1212 */ 1213 #define __HAL_COMP_COMP6_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, COMP_EXTI_LINE_COMP6) 1214 1215 /** 1216 * @brief Enable the COMP6 EXTI line in event mode. 1217 * @retval None 1218 */ 1219 #define __HAL_COMP_COMP6_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, COMP_EXTI_LINE_COMP6) 1220 1221 /** 1222 * @brief Disable the COMP6 EXTI line in event mode. 1223 * @retval None 1224 */ 1225 #define __HAL_COMP_COMP6_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, COMP_EXTI_LINE_COMP6) 1226 1227 /** 1228 * @brief Check whether the COMP6 EXTI line flag is set or not. 1229 * @retval RESET or SET 1230 */ 1231 #define __HAL_COMP_COMP6_EXTI_GET_FLAG() READ_BIT(EXTI->PR2, COMP_EXTI_LINE_COMP6) 1232 1233 /** 1234 * @brief Clear the COMP6 EXTI flag. 1235 * @retval None 1236 */ 1237 #define __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, COMP_EXTI_LINE_COMP6) 1238 1239 #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ 1240 /* STM32F302xC || STM32F303xC || STM32F358xx || */ 1241 /* STM32F302xE || STM32F303xE || STM32F398xx || */ 1242 /* STM32F303x8 || STM32F334x8 || STM32F328xx */ 1243 1244 #if defined(STM32F303xE) || defined(STM32F398xx) || \ 1245 defined(STM32F303xC) || defined(STM32F358xx) 1246 /** 1247 * @brief Enable the COMP7 EXTI line rising edge trigger. 1248 * @retval None 1249 */ 1250 #define __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, COMP_EXTI_LINE_COMP7) 1251 1252 /** 1253 * @brief Disable the COMP7 EXTI line rising edge trigger. 1254 * @retval None 1255 */ 1256 #define __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, COMP_EXTI_LINE_COMP7) 1257 1258 /** 1259 * @brief Enable the COMP7 EXTI line falling edge trigger. 1260 * @retval None 1261 */ 1262 #define __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, COMP_EXTI_LINE_COMP7) 1263 1264 /** 1265 * @brief Disable the COMP7 EXTI line falling edge trigger. 1266 * @retval None 1267 */ 1268 #define __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, COMP_EXTI_LINE_COMP7) 1269 1270 /** 1271 * @brief Enable the COMP7 EXTI line rising & falling edge trigger. 1272 * @retval None 1273 */ 1274 #define __HAL_COMP_COMP7_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ 1275 __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE(); \ 1276 __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE(); \ 1277 } while(0U) 1278 1279 /** 1280 * @brief Disable the COMP7 EXTI line rising & falling edge trigger. 1281 * @retval None 1282 */ 1283 #define __HAL_COMP_COMP7_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ 1284 __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE(); \ 1285 __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE(); \ 1286 } while(0U) 1287 1288 /** 1289 * @brief Enable the COMP7 EXTI line in interrupt mode. 1290 * @retval None 1291 */ 1292 #define __HAL_COMP_COMP7_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, COMP_EXTI_LINE_COMP7) 1293 1294 /** 1295 * @brief Disable the COMP7 EXTI line in interrupt mode. 1296 * @retval None 1297 */ 1298 #define __HAL_COMP_COMP7_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, COMP_EXTI_LINE_COMP7) 1299 1300 /** 1301 * @brief Generate a software interrupt on the COMP7 EXTI line. 1302 * @retval None 1303 */ 1304 #define __HAL_COMP_COMP7_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, COMP_EXTI_LINE_COMP7) 1305 1306 /** 1307 * @brief Enable the COMP7 EXTI line in event mode. 1308 * @retval None 1309 */ 1310 #define __HAL_COMP_COMP7_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, COMP_EXTI_LINE_COMP7) 1311 1312 /** 1313 * @brief Disable the COMP7 EXTI line in event mode. 1314 * @retval None 1315 */ 1316 #define __HAL_COMP_COMP7_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, COMP_EXTI_LINE_COMP7) 1317 1318 /** 1319 * @brief Check whether the COMP7 EXTI line flag is set or not. 1320 * @retval RESET or SET 1321 */ 1322 #define __HAL_COMP_COMP7_EXTI_GET_FLAG() READ_BIT(EXTI->PR2, COMP_EXTI_LINE_COMP7) 1323 1324 /** 1325 * @brief Clear the COMP7 EXTI flag. 1326 * @retval None 1327 */ 1328 #define __HAL_COMP_COMP7_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, COMP_EXTI_LINE_COMP7) 1329 1330 #endif /* STM32F303xE || STM32F398xx || */ 1331 /* STM32F303xC || STM32F358xx */ 1332 1333 /** 1334 * @} 1335 */ 1336 1337 /* Private types -------------------------------------------------------------*/ 1338 /* Private constants ---------------------------------------------------------*/ 1339 /** @defgroup COMPEx_Private_Constants COMP Extended Private Constants 1340 * @{ 1341 */ 1342 /** @defgroup COMPEx_ExtiLineEvent COMP Extended EXTI lines 1343 * @{ 1344 */ 1345 #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ 1346 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) 1347 1348 #define COMP_EXTI_LINE_COMP2 EXTI_IMR_MR22 /*!< External interrupt line 22 connected to COMP2 */ 1349 #define COMP_EXTI_LINE_COMP4 EXTI_IMR_MR30 /*!< External interrupt line 30 connected to COMP4 */ 1350 #define COMP_EXTI_LINE_COMP6 EXTI_IMR2_MR32 /*!< External interrupt line 32 connected to COMP6 */ 1351 1352 #define COMP_EXTI_LINE_REG2_MASK EXTI_IMR2_MR32 /*!< Mask for External interrupt line control in register xxx2 */ 1353 1354 #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ 1355 /* STM32F303x8 || STM32F334x8 || STM32F328xx */ 1356 1357 #if defined(STM32F302xE) || \ 1358 defined(STM32F302xC) 1359 1360 #define COMP_EXTI_LINE_COMP1 EXTI_IMR_MR21 /*!< External interrupt line 21 connected to COMP1 */ 1361 #define COMP_EXTI_LINE_COMP2 EXTI_IMR_MR22 /*!< External interrupt line 22 connected to COMP2 */ 1362 #define COMP_EXTI_LINE_COMP4 EXTI_IMR_MR30 /*!< External interrupt line 30 connected to COMP4 */ 1363 #define COMP_EXTI_LINE_COMP6 EXTI_IMR2_MR32 /*!< External interrupt line 32 connected to COMP6 */ 1364 1365 #define COMP_EXTI_LINE_REG2_MASK EXTI_IMR2_MR32 /*!< Mask for External interrupt line control in register xxx2 */ 1366 1367 #endif /* STM32F302xE || */ 1368 /* STM32F302xC */ 1369 1370 #if defined(STM32F303xE) || defined(STM32F398xx) || \ 1371 defined(STM32F303xC) || defined(STM32F358xx) 1372 1373 #define COMP_EXTI_LINE_COMP1 EXTI_IMR_MR21 /*!< External interrupt line 21 connected to COMP1 */ 1374 #define COMP_EXTI_LINE_COMP2 EXTI_IMR_MR22 /*!< External interrupt line 22 connected to COMP2 */ 1375 #define COMP_EXTI_LINE_COMP3 EXTI_IMR_MR29 /*!< External interrupt line 29 connected to COMP3 */ 1376 #define COMP_EXTI_LINE_COMP4 EXTI_IMR_MR30 /*!< External interrupt line 30 connected to COMP4 */ 1377 #define COMP_EXTI_LINE_COMP5 EXTI_IMR_MR31 /*!< External interrupt line 31 connected to COMP5 */ 1378 #define COMP_EXTI_LINE_COMP6 EXTI_IMR2_MR32 /*!< External interrupt line 32 connected to COMP6 */ 1379 #define COMP_EXTI_LINE_COMP7 EXTI_IMR2_MR33 /*!< External interrupt line 33 connected to COMP7 */ 1380 1381 #define COMP_EXTI_LINE_REG2_MASK (EXTI_IMR2_MR33 | EXTI_IMR2_MR32) /*!< Mask for External interrupt line control in register xxx2 */ 1382 1383 #endif /* STM32F303xE || STM32F398xx || */ 1384 /* STM32F303xC || STM32F358xx */ 1385 1386 #if defined(STM32F373xC) || defined(STM32F378xx) 1387 1388 #define COMP_EXTI_LINE_COMP1 EXTI_IMR_MR21 /*!< External interrupt line 21 connected to COMP1 */ 1389 #define COMP_EXTI_LINE_COMP2 EXTI_IMR_MR22 /*!< External interrupt line 22 connected to COMP2 */ 1390 1391 #endif /* STM32F373xC || STM32F378xx */ 1392 1393 /** 1394 * @} 1395 */ 1396 1397 /** @defgroup COMPEx_Misc COMP Extended miscellaneous defines 1398 * @{ 1399 */ 1400 1401 /* CSR masks redefinition for internal use */ 1402 #define COMP_CSR_COMPxINSEL_MASK COMP_CSR_COMPxINSEL /*!< COMP_CSR_COMPxINSEL Mask */ 1403 #define COMP_CSR_COMPxOUTSEL_MASK COMP_CSR_COMPxOUTSEL /*!< COMP_CSR_COMPxOUTSEL Mask */ 1404 #define COMP_CSR_COMPxPOL_MASK COMP_CSR_COMPxPOL /*!< COMP_CSR_COMPxPOL Mask */ 1405 #if defined(STM32F373xC) || defined(STM32F378xx) 1406 /* CSR register reset value */ 1407 #define COMP_CSR_RESET_VALUE (0x00000000U) 1408 #define COMP_CSR_RESET_PARAMETERS_MASK (0x00003FFFU) 1409 #define COMP_CSR_UPDATE_PARAMETERS_MASK (0x00003FFEU) 1410 /* CSR COMP1/COMP2 shift */ 1411 #define COMP_CSR_COMP1_SHIFT 0U 1412 #define COMP_CSR_COMP2_SHIFT 16U 1413 #else 1414 /* CSR register reset value */ 1415 #define COMP_CSR_RESET_VALUE (0x00000000U) 1416 #endif /* STM32F373xC || STM32F378xx */ 1417 1418 #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) 1419 #define COMP_CSR_COMPxNONINSEL_MASK (COMP2_CSR_COMP2INPDAC) /*!< COMP_CSR_COMPxNONINSEL mask */ 1420 #define COMP_CSR_COMPxWNDWEN_MASK (0x00000000U) /*!< Mask empty: feature not available */ 1421 #define COMP_CSR_COMPxMODE_MASK (0x00000000U) /*!< Mask empty: feature not available */ 1422 #define COMP_CSR_COMPxHYST_MASK (0x00000000U) /*!< Mask empty: feature not available */ 1423 #define COMP_CSR_COMPxBLANKING_MASK COMP_CSR_COMPxBLANKING /*!< COMP_CSR_COMPxBLANKING mask */ 1424 #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */ 1425 1426 #if defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) 1427 #define COMP_CSR_COMPxNONINSEL_MASK (0x00000000U) /*!< Mask empty: feature not available */ 1428 #define COMP_CSR_COMPxWNDWEN_MASK (0x00000000U) /*!< Mask empty: feature not available */ 1429 #define COMP_CSR_COMPxMODE_MASK (0x00000000U) /*!< Mask empty: feature not available */ 1430 #define COMP_CSR_COMPxHYST_MASK (0x00000000U) /*!< Mask empty: feature not available */ 1431 #define COMP_CSR_COMPxBLANKING_MASK COMP_CSR_COMPxBLANKING /*!< COMP_CSR_COMPxBLANKING mask */ 1432 #endif /* STM32F303x8 || STM32F334x8 || STM32F328xx */ 1433 1434 #if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) 1435 #define COMP_CSR_COMPxNONINSEL_MASK (COMP_CSR_COMPxNONINSEL | COMP1_CSR_COMP1SW1) /*!< COMP_CSR_COMPxNONINSEL mask */ 1436 #define COMP_CSR_COMPxWNDWEN_MASK COMP_CSR_COMPxWNDWEN /*!< COMP_CSR_COMPxWNDWEN mask */ 1437 #define COMP_CSR_COMPxMODE_MASK COMP_CSR_COMPxMODE /*!< COMP_CSR_COMPxMODE Mask */ 1438 #define COMP_CSR_COMPxHYST_MASK COMP_CSR_COMPxHYST /*!< COMP_CSR_COMPxHYST Mask */ 1439 #define COMP_CSR_COMPxBLANKING_MASK COMP_CSR_COMPxBLANKING /*!< COMP_CSR_COMPxBLANKING mask */ 1440 #endif /* STM32F302xC || STM32F303xC || STM32F358xx */ 1441 1442 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) 1443 #define COMP_CSR_COMPxNONINSEL_MASK (COMP1_CSR_COMP1SW1) /*!< COMP_CSR_COMPxNONINSEL mask */ 1444 #define COMP_CSR_COMPxWNDWEN_MASK (0x00000000U) /*!< Mask empty: feature not available */ 1445 #define COMP_CSR_COMPxMODE_MASK (0x00000000U) /*!< Mask empty: feature not available */ 1446 #define COMP_CSR_COMPxHYST_MASK (0x00000000U) /*!< Mask empty: feature not available */ 1447 #define COMP_CSR_COMPxBLANKING_MASK COMP_CSR_COMPxBLANKING /*!< COMP_CSR_COMPxBLANKING mask */ 1448 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */ 1449 1450 #if defined(STM32F373xC) || defined(STM32F378xx) 1451 #define COMP_CSR_COMPxNONINSEL_MASK (COMP_CSR_COMP1SW1) /*!< COMP_CSR_COMPxNONINSEL mask */ 1452 #define COMP_CSR_COMPxWNDWEN_MASK COMP_CSR_COMPxWNDWEN /*!< COMP_CSR_COMPxWNDWEN mask */ 1453 #define COMP_CSR_COMPxMODE_MASK COMP_CSR_COMPxMODE /*!< COMP_CSR_COMPxMODE Mask */ 1454 #define COMP_CSR_COMPxHYST_MASK COMP_CSR_COMPxHYST /*!< COMP_CSR_COMPxHYST Mask */ 1455 #define COMP_CSR_COMPxBLANKING_MASK (0x00000000U) /*!< Mask empty: feature not available */ 1456 #endif /* STM32F373xC || STM32F378xx */ 1457 1458 /** 1459 * @} 1460 */ 1461 1462 /** 1463 * @} 1464 */ 1465 1466 /* Private macros ------------------------------------------------------------*/ 1467 /** @defgroup COMPEx_Private_Macros COMP Extended Private Macros 1468 * @{ 1469 */ 1470 /** @defgroup COMP_GET_EXTI_LINE COMP Extended Private macro to get the EXTI line associated with a comparator handle 1471 * @{ 1472 */ 1473 #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ 1474 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) 1475 /** 1476 * @brief Get the specified EXTI line for a comparator instance 1477 * @param __INSTANCE__ specifies the COMP instance. 1478 * @retval value of @ref COMPEx_ExtiLineEvent 1479 */ 1480 #define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP2) ? COMP_EXTI_LINE_COMP2 : \ 1481 ((__INSTANCE__) == COMP4) ? COMP_EXTI_LINE_COMP4 : \ 1482 COMP_EXTI_LINE_COMP6) 1483 #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ 1484 /* STM32F303x8 || STM32F334x8 || STM32F328xx */ 1485 1486 #if defined(STM32F302xE) || \ 1487 defined(STM32F302xC) 1488 /** 1489 * @brief Get the specified EXTI line for a comparator instance 1490 * @param __INSTANCE__ specifies the COMP instance. 1491 * @retval value of @ref COMPEx_ExtiLineEvent 1492 */ 1493 #define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? COMP_EXTI_LINE_COMP1 : \ 1494 ((__INSTANCE__) == COMP2) ? COMP_EXTI_LINE_COMP2 : \ 1495 ((__INSTANCE__) == COMP4) ? COMP_EXTI_LINE_COMP4 : \ 1496 COMP_EXTI_LINE_COMP6) 1497 #endif /* STM32F302xE || */ 1498 /* STM32F302xC */ 1499 1500 #if defined(STM32F303xE) || defined(STM32F398xx) || \ 1501 defined(STM32F303xC) || defined(STM32F358xx) 1502 /** 1503 * @brief Get the specified EXTI line for a comparator instance 1504 * @param __INSTANCE__ specifies the COMP instance. 1505 * @retval value of @ref COMPEx_ExtiLineEvent 1506 */ 1507 #define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? COMP_EXTI_LINE_COMP1 : \ 1508 ((__INSTANCE__) == COMP2) ? COMP_EXTI_LINE_COMP2 : \ 1509 ((__INSTANCE__) == COMP3) ? COMP_EXTI_LINE_COMP3 : \ 1510 ((__INSTANCE__) == COMP4) ? COMP_EXTI_LINE_COMP4 : \ 1511 ((__INSTANCE__) == COMP5) ? COMP_EXTI_LINE_COMP5 : \ 1512 ((__INSTANCE__) == COMP6) ? COMP_EXTI_LINE_COMP6 : \ 1513 COMP_EXTI_LINE_COMP7) 1514 #endif /* STM32F303xE || STM32F398xx || */ 1515 /* STM32F303xC || STM32F358xx */ 1516 1517 #if defined(STM32F373xC) || defined(STM32F378xx) 1518 /** 1519 * @brief Get the specified EXTI line for a comparator instance 1520 * @param __INSTANCE__ specifies the COMP instance. 1521 * @retval value of @ref COMPEx_ExtiLineEvent 1522 */ 1523 #define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? COMP_EXTI_LINE_COMP1 : \ 1524 COMP_EXTI_LINE_COMP2) 1525 #endif /* STM32F373xC || STM32F378xx */ 1526 1527 /** 1528 * @} 1529 */ 1530 1531 /** @defgroup COMPEx_Private_Macros_Misc COMP Extended miscellaneous private macros 1532 * @{ 1533 */ 1534 1535 #if defined(STM32F373xC) || defined(STM32F378xx) 1536 /** 1537 * @brief Init a comparator instance 1538 * @param __HANDLE__ COMP handle 1539 * @note The common output selection is checked versus the COMP instance to set the right output configuration 1540 * @retval None. 1541 */ 1542 #define COMP_INIT(__HANDLE__) \ 1543 do { \ 1544 uint32_t regshift = COMP_CSR_COMP1_SHIFT; \ 1545 uint32_t compoutput = (__HANDLE__)->Init.Output & COMP_CSR_COMPxOUTSEL_MASK; \ 1546 \ 1547 if((__HANDLE__)->Instance == COMP2) \ 1548 { \ 1549 regshift = COMP_CSR_COMP2_SHIFT; \ 1550 } \ 1551 \ 1552 MODIFY_REG(COMP->CSR, \ 1553 (COMP_CSR_COMPxINSEL | COMP_CSR_COMPxNONINSEL_MASK | \ 1554 COMP_CSR_COMPxOUTSEL | COMP_CSR_COMPxPOL | \ 1555 COMP_CSR_COMPxHYST | COMP_CSR_COMPxMODE) << regshift, \ 1556 ((__HANDLE__)->Init.InvertingInput | \ 1557 (__HANDLE__)->Init.NonInvertingInput | \ 1558 compoutput | \ 1559 (__HANDLE__)->Init.OutputPol | \ 1560 (__HANDLE__)->Init.Hysteresis | \ 1561 (__HANDLE__)->Init.Mode) << regshift); \ 1562 \ 1563 if((__HANDLE__)->Init.WindowMode != COMP_WINDOWMODE_DISABLE) \ 1564 { \ 1565 COMP->CSR |= COMP_CSR_WNDWEN; \ 1566 } \ 1567 } while(0U) 1568 1569 /** 1570 * @brief DeInit a comparator instance 1571 * @param __HANDLE__ COMP handle 1572 * @retval None. 1573 */ 1574 #define COMP_DEINIT(__HANDLE__) \ 1575 do { \ 1576 uint32_t regshift = COMP_CSR_COMP1_SHIFT; \ 1577 \ 1578 if((__HANDLE__)->Instance == COMP2) \ 1579 { \ 1580 regshift = COMP_CSR_COMP2_SHIFT; \ 1581 } \ 1582 MODIFY_REG(COMP->CSR, \ 1583 COMP_CSR_RESET_PARAMETERS_MASK << regshift, \ 1584 COMP_CSR_RESET_VALUE << regshift); \ 1585 } while(0U) 1586 1587 1588 /** 1589 * @brief Enable the Exti Line rising edge trigger. 1590 * @param __EXTILINE__ specifies the COMP Exti sources to be enabled. 1591 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1592 * @retval None. 1593 */ 1594 #define COMP_EXTI_RISING_ENABLE(__EXTILINE__) SET_BIT(EXTI->RTSR, (__EXTILINE__)) 1595 1596 /** 1597 * @brief Disable the Exti Line rising edge trigger. 1598 * @param __EXTILINE__ specifies the COMP Exti sources to be disabled. 1599 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1600 * @retval None. 1601 */ 1602 #define COMP_EXTI_RISING_DISABLE(__EXTILINE__) CLEAR_BIT(EXTI->RTSR, (__EXTILINE__)) 1603 1604 /** 1605 * @brief Enable the Exti Line falling edge trigger. 1606 * @param __EXTILINE__ specifies the COMP Exti sources to be enabled. 1607 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1608 * @retval None. 1609 */ 1610 #define COMP_EXTI_FALLING_ENABLE(__EXTILINE__) SET_BIT(EXTI->FTSR, (__EXTILINE__)) 1611 1612 /** 1613 * @brief Disable the Exti Line falling edge trigger. 1614 * @param __EXTILINE__ specifies the COMP Exti sources to be disabled. 1615 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1616 * @retval None. 1617 */ 1618 #define COMP_EXTI_FALLING_DISABLE(__EXTILINE__) CLEAR_BIT(EXTI->FTSR, (__EXTILINE__)) 1619 1620 /** 1621 * @brief Enable the COMP Exti Line interrupt generation. 1622 * @param __EXTILINE__ specifies the COMP Exti sources to be enabled. 1623 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1624 * @retval None. 1625 */ 1626 #define COMP_EXTI_ENABLE_IT(__EXTILINE__) SET_BIT(EXTI->IMR, (__EXTILINE__)) 1627 1628 /** 1629 * @brief Disable the COMP Exti Line interrupt generation. 1630 * @param __EXTILINE__ specifies the COMP Exti sources to be disabled. 1631 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1632 * @retval None. 1633 */ 1634 #define COMP_EXTI_DISABLE_IT(__EXTILINE__) CLEAR_BIT(EXTI->IMR, (__EXTILINE__)) 1635 1636 /** 1637 * @brief Enable the COMP Exti Line event generation. 1638 * @param __EXTILINE__ specifies the COMP Exti sources to be enabled. 1639 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1640 * @retval None. 1641 */ 1642 #define COMP_EXTI_ENABLE_EVENT(__EXTILINE__) SET_BIT(EXTI->EMR, (__EXTILINE__)) 1643 1644 /** 1645 * @brief Disable the COMP Exti Line event generation. 1646 * @param __EXTILINE__ specifies the COMP Exti sources to be disabled. 1647 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1648 * @retval None. 1649 */ 1650 #define COMP_EXTI_DISABLE_EVENT(__EXTILINE__) CLEAR_BIT(EXTI->EMR, (__EXTILINE__)) 1651 1652 /** 1653 * @brief Check whether the specified EXTI line flag is set or not. 1654 * @param __FLAG__ specifies the COMP Exti sources to be checked. 1655 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1656 * @retval The state of __FLAG__ (SET or RESET). 1657 */ 1658 #define COMP_EXTI_GET_FLAG(__FLAG__) READ_BIT(EXTI->PR, (__FLAG__)) 1659 1660 /** 1661 * @brief Clear the COMP Exti flags. 1662 * @param __FLAG__ specifies the COMP Exti sources to be cleared. 1663 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1664 * @retval None. 1665 */ 1666 #define COMP_EXTI_CLEAR_FLAG(__FLAG__) WRITE_REG(EXTI->PR, (__FLAG__)) 1667 1668 #else /* STM32F30x, STM32F32xx, STM32F35x, STM32F39x, STM32F33x */ 1669 1670 1671 /** 1672 * @brief Init a comparator instance 1673 * @param __HANDLE__ COMP handle 1674 * @retval None. 1675 */ 1676 #define COMP_INIT(__HANDLE__) \ 1677 do { \ 1678 __IO uint32_t csrreg = 0U; \ 1679 \ 1680 csrreg = READ_REG((__HANDLE__)->Instance->CSR); \ 1681 MODIFY_REG(csrreg, COMP_CSR_COMPxINSEL_MASK, (__HANDLE__)->Init.InvertingInput); \ 1682 MODIFY_REG(csrreg, COMP_CSR_COMPxNONINSEL_MASK, (__HANDLE__)->Init.NonInvertingInput); \ 1683 MODIFY_REG(csrreg, COMP_CSR_COMPxBLANKING_MASK, (__HANDLE__)->Init.BlankingSrce); \ 1684 MODIFY_REG(csrreg, COMP_CSR_COMPxOUTSEL_MASK, (__HANDLE__)->Init.Output & COMP_CSR_COMPxOUTSEL_MASK); \ 1685 MODIFY_REG(csrreg, COMP_CSR_COMPxPOL_MASK, (__HANDLE__)->Init.OutputPol); \ 1686 MODIFY_REG(csrreg, COMP_CSR_COMPxHYST_MASK, (__HANDLE__)->Init.Hysteresis); \ 1687 MODIFY_REG(csrreg, COMP_CSR_COMPxMODE_MASK, (__HANDLE__)->Init.Mode); \ 1688 MODIFY_REG(csrreg, COMP_CSR_COMPxWNDWEN_MASK, (__HANDLE__)->Init.WindowMode); \ 1689 WRITE_REG((__HANDLE__)->Instance->CSR, csrreg); \ 1690 } while(0U) 1691 1692 /** 1693 * @brief DeInit a comparator instance 1694 * @param __HANDLE__ COMP handle 1695 * @retval None. 1696 */ 1697 #define COMP_DEINIT(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->CSR, COMP_CSR_RESET_VALUE) 1698 1699 /** 1700 * @brief Enable the Exti Line rising edge trigger. 1701 * @param __EXTILINE__ specifies the COMP Exti sources to be enabled. 1702 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1703 * @retval None. 1704 */ 1705 #define COMP_EXTI_RISING_ENABLE(__EXTILINE__) ((((__EXTILINE__) & COMP_EXTI_LINE_REG2_MASK) != RESET) ? SET_BIT(EXTI->RTSR2, (__EXTILINE__)) : SET_BIT(EXTI->RTSR, (__EXTILINE__))) 1706 1707 /** 1708 * @brief Disable the Exti Line rising edge trigger. 1709 * @param __EXTILINE__ specifies the COMP Exti sources to be disabled. 1710 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1711 * @retval None. 1712 */ 1713 #define COMP_EXTI_RISING_DISABLE(__EXTILINE__) ((((__EXTILINE__) & COMP_EXTI_LINE_REG2_MASK) != RESET) ? CLEAR_BIT(EXTI->RTSR2, (__EXTILINE__)) : CLEAR_BIT(EXTI->RTSR, (__EXTILINE__))) 1714 1715 /** 1716 * @brief Enable the Exti Line falling edge trigger. 1717 * @param __EXTILINE__ specifies the COMP Exti sources to be enabled. 1718 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1719 * @retval None. 1720 */ 1721 #define COMP_EXTI_FALLING_ENABLE(__EXTILINE__) ((((__EXTILINE__) & COMP_EXTI_LINE_REG2_MASK) != RESET) ? SET_BIT(EXTI->FTSR2, (__EXTILINE__)) : SET_BIT(EXTI->FTSR, (__EXTILINE__))) 1722 1723 /** 1724 * @brief Disable the Exti Line falling edge trigger. 1725 * @param __EXTILINE__ specifies the COMP Exti sources to be disabled. 1726 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1727 * @retval None. 1728 */ 1729 #define COMP_EXTI_FALLING_DISABLE(__EXTILINE__) ((((__EXTILINE__) & COMP_EXTI_LINE_REG2_MASK) != RESET) ? CLEAR_BIT(EXTI->FTSR2, (__EXTILINE__)) : CLEAR_BIT(EXTI->FTSR, (__EXTILINE__))) 1730 1731 /** 1732 * @brief Enable the COMP Exti Line interrupt generation. 1733 * @param __EXTILINE__ specifies the COMP Exti sources to be enabled. 1734 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1735 * @retval None. 1736 */ 1737 #define COMP_EXTI_ENABLE_IT(__EXTILINE__) ((((__EXTILINE__) & COMP_EXTI_LINE_REG2_MASK) != RESET) ? SET_BIT(EXTI->IMR2, (__EXTILINE__)) : SET_BIT(EXTI->IMR, (__EXTILINE__))) 1738 1739 /** 1740 * @brief Disable the COMP Exti Line interrupt generation. 1741 * @param __EXTILINE__ specifies the COMP Exti sources to be disabled. 1742 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1743 * @retval None. 1744 */ 1745 #define COMP_EXTI_DISABLE_IT(__EXTILINE__) ((((__EXTILINE__) & COMP_EXTI_LINE_REG2_MASK) != RESET) ? CLEAR_BIT(EXTI->IMR2, (__EXTILINE__)) : CLEAR_BIT(EXTI->IMR, (__EXTILINE__))) 1746 1747 /** 1748 * @brief Enable the COMP Exti Line event generation. 1749 * @param __EXTILINE__ specifies the COMP Exti sources to be enabled. 1750 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1751 * @retval None. 1752 */ 1753 #define COMP_EXTI_ENABLE_EVENT(__EXTILINE__) ((((__EXTILINE__) & COMP_EXTI_LINE_REG2_MASK) != RESET) ? SET_BIT(EXTI->EMR2, (__EXTILINE__)) : SET_BIT(EXTI->EMR, (__EXTILINE__))) 1754 1755 /** 1756 * @brief Disable the COMP Exti Line event generation. 1757 * @param __EXTILINE__ specifies the COMP Exti sources to be disabled. 1758 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1759 * @retval None. 1760 */ 1761 #define COMP_EXTI_DISABLE_EVENT(__EXTILINE__) ((((__EXTILINE__) & COMP_EXTI_LINE_REG2_MASK) != RESET) ? CLEAR_BIT(EXTI->EMR2, (__EXTILINE__)) : CLEAR_BIT(EXTI->EMR, (__EXTILINE__))) 1762 1763 /** 1764 * @brief Check whether the specified EXTI line flag is set or not. 1765 * @param __FLAG__ specifies the COMP Exti sources to be checked. 1766 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1767 * @retval The state of __FLAG__ (SET or RESET). 1768 */ 1769 #define COMP_EXTI_GET_FLAG(__FLAG__) ((((__FLAG__) & COMP_EXTI_LINE_REG2_MASK) != RESET) ? READ_BIT(EXTI->PR2, (__FLAG__)) : READ_BIT(EXTI->PR, (__FLAG__))) 1770 1771 /** 1772 * @brief Clear the COMP Exti flags. 1773 * @param __FLAG__ specifies the COMP Exti sources to be cleared. 1774 * This parameter can be a value of @ref COMPEx_ExtiLineEvent 1775 * @retval None. 1776 */ 1777 #define COMP_EXTI_CLEAR_FLAG(__FLAG__) ((((__FLAG__) & COMP_EXTI_LINE_REG2_MASK) != RESET) ? WRITE_REG(EXTI->PR2, (__FLAG__)) : WRITE_REG(EXTI->PR, (__FLAG__))) 1778 1779 #endif /* STM32F373xC || STM32F378xx */ 1780 1781 1782 /** 1783 * @brief Manage inverting input comparator inverting input connected to a GPIO 1784 * for STM32F302x, STM32F32xx, STM32F33x. 1785 * - On devices STM32F302x, STM32F32xx, STM32F33x, there is 1786 * only 1 comparator inverting input connected to a GPIO. 1787 * Legacy definition of literal COMP_INVERTINGINPUT_IO1 1788 * was initially the only selection, but depending on 1789 * comparator instance it corresponds to COMP_INVERTINGINPUT_IO2 1790 * (for instances COMP4, COMP6). 1791 * Since, COMP_INVERTINGINPUT_IO2 has been created and this macro 1792 * selects the correct literal COMP_INVERTINGINPUT_IOx in function 1793 * of comparator instance. 1794 * - On other STM32F3 devices, this macro performs no action. 1795 * @param __COMP_INSTANCE__ COMP instance 1796 * @param __INVERTINGINPUT__ COMP inverting input 1797 * @retval None. 1798 */ 1799 #if defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) 1800 #define COMP_INVERTINGINPUT_SELECTION(__COMP_INSTANCE__, __INVERTINGINPUT__) \ 1801 (((__INVERTINGINPUT__) != COMP_INVERTINGINPUT_IO1) \ 1802 ? ( \ 1803 (__INVERTINGINPUT__) \ 1804 ) \ 1805 : \ 1806 (((__COMP_INSTANCE__) == COMP2) \ 1807 ? ( \ 1808 (COMP_INVERTINGINPUT_IO1) \ 1809 ) \ 1810 : \ 1811 ( \ 1812 (COMP_INVERTINGINPUT_IO2) \ 1813 ) \ 1814 ) \ 1815 ) 1816 #else 1817 #define COMP_INVERTINGINPUT_SELECTION(__COMP_INSTANCE__, __INVERTINGINPUT__) \ 1818 (__INVERTINGINPUT__) 1819 #endif 1820 1821 /** 1822 * @} 1823 */ 1824 1825 /** @defgroup COMPEx_IS_COMP_Definitions COMP Extended Private macros to check input parameters 1826 * @{ 1827 */ 1828 1829 #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) 1830 1831 #define IS_COMP_INVERTINGINPUT(INPUT) (((INPUT) == COMP_INVERTINGINPUT_1_4VREFINT) || \ 1832 ((INPUT) == COMP_INVERTINGINPUT_1_2VREFINT) || \ 1833 ((INPUT) == COMP_INVERTINGINPUT_3_4VREFINT) || \ 1834 ((INPUT) == COMP_INVERTINGINPUT_VREFINT) || \ 1835 ((INPUT) == COMP_INVERTINGINPUT_DAC1_CH1) || \ 1836 ((INPUT) == COMP_INVERTINGINPUT_IO1)) 1837 1838 #define IS_COMP_NONINVERTINGINPUT(INPUT) (((INPUT) == COMP_NONINVERTINGINPUT_IO1) || \ 1839 ((INPUT) == COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED)) 1840 1841 /* STM32F301x6/x8, STM32F302x6/x8, STM32F318xx devices comparator instances non inverting source values */ 1842 #define IS_COMP_NONINVERTINGINPUT_INSTANCE(INSTANCE, INPUT) \ 1843 ((((INSTANCE) == COMP2) && \ 1844 (((INPUT) == COMP_NONINVERTINGINPUT_IO1) || \ 1845 ((INPUT) == COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED))) \ 1846 || \ 1847 (((INPUT) == COMP_NONINVERTINGINPUT_IO1))) 1848 1849 #define IS_COMP_WINDOWMODE(WINDOWMODE) ((WINDOWMODE) == (WINDOWMODE)) /*!< Not available: check always true */ 1850 1851 #define IS_COMP_MODE(MODE) ((MODE) == (MODE)) /*!< Not available: check always true */ 1852 1853 #define IS_COMP_HYSTERESIS(HYSTERESIS) ((HYSTERESIS) == (HYSTERESIS)) /*!< Not available: check always true */ 1854 1855 #define IS_COMP_OUTPUT(OUTPUT) (((OUTPUT) == COMP_OUTPUT_NONE) || \ 1856 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 1857 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 1858 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 1859 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 1860 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 1861 ((OUTPUT) == COMP_OUTPUT_TIM2IC2) || \ 1862 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 1863 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 1864 ((OUTPUT) == COMP_OUTPUT_COMP6_TIM2OCREFCLR) || \ 1865 ((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \ 1866 ((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR) || \ 1867 ((OUTPUT) == COMP_OUTPUT_TIM16IC1) || \ 1868 ((OUTPUT) == COMP_OUTPUT_TIM16OCREFCLR)) 1869 1870 #define IS_COMP_OUTPUT_INSTANCE(INSTANCE, OUTPUT) \ 1871 ((((INSTANCE) == COMP2) && \ 1872 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 1873 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 1874 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 1875 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 1876 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 1877 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 1878 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 1879 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR))) \ 1880 || \ 1881 (((INSTANCE) == COMP4) && \ 1882 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 1883 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 1884 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 1885 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 1886 ((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \ 1887 ((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR))) \ 1888 || \ 1889 (((INSTANCE) == COMP6) && \ 1890 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 1891 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 1892 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 1893 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 1894 ((OUTPUT) == COMP_OUTPUT_TIM2IC2) || \ 1895 ((OUTPUT) == COMP_OUTPUT_COMP6_TIM2OCREFCLR) || \ 1896 ((OUTPUT) == COMP_OUTPUT_TIM16IC1) || \ 1897 ((OUTPUT) == COMP_OUTPUT_TIM16OCREFCLR)))) 1898 1899 #define IS_COMP_BLANKINGSRCE(SOURCE) (((SOURCE) == COMP_BLANKINGSRCE_NONE) || \ 1900 ((SOURCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 1901 ((SOURCE) == COMP_BLANKINGSRCE_TIM2OC3) || \ 1902 ((SOURCE) == COMP_BLANKINGSRCE_TIM3OC3) || \ 1903 ((SOURCE) == COMP_BLANKINGSRCE_TIM3OC4) || \ 1904 ((SOURCE) == COMP_BLANKINGSRCE_TIM2OC4) || \ 1905 ((SOURCE) == COMP_BLANKINGSRCE_TIM15OC1) || \ 1906 ((SOURCE) == COMP_BLANKINGSRCE_TIM15OC2)) 1907 1908 /* STM32F301x6/x8, STM32F302x6/x8, STM32F303x6/x8, STM32F334x4/6U/8U, STM32F318xx/STM32F328xx devices comparator instances blanking source values */ 1909 #define IS_COMP_BLANKINGSRCE_INSTANCE(INSTANCE, BLANKINGSRCE) \ 1910 ((((INSTANCE) == COMP2) && \ 1911 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 1912 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 1913 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC3) || \ 1914 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC3))) \ 1915 || \ 1916 (((INSTANCE) == COMP4) && \ 1917 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 1918 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC4) || \ 1919 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC1))) \ 1920 || \ 1921 (((INSTANCE) == COMP6) && \ 1922 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 1923 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC4) || \ 1924 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC2)))) 1925 1926 #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */ 1927 1928 #if defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) 1929 1930 #define IS_COMP_INVERTINGINPUT(INPUT) (((INPUT) == COMP_INVERTINGINPUT_1_4VREFINT) || \ 1931 ((INPUT) == COMP_INVERTINGINPUT_1_2VREFINT) || \ 1932 ((INPUT) == COMP_INVERTINGINPUT_3_4VREFINT) || \ 1933 ((INPUT) == COMP_INVERTINGINPUT_VREFINT) || \ 1934 ((INPUT) == COMP_INVERTINGINPUT_DAC1_CH1) || \ 1935 ((INPUT) == COMP_INVERTINGINPUT_DAC1_CH2) || \ 1936 ((INPUT) == COMP_INVERTINGINPUT_IO1) || \ 1937 ((INPUT) == COMP_INVERTINGINPUT_IO2) || \ 1938 ((INPUT) == COMP_INVERTINGINPUT_DAC2_CH1)) 1939 1940 /*!< Non inverting input not available */ 1941 #define IS_COMP_NONINVERTINGINPUT(INPUT) ((INPUT) == (INPUT)) /*!< Multiple selection not available: check always true */ 1942 1943 #define IS_COMP_NONINVERTINGINPUT_INSTANCE(INSTANCE, INPUT) ((INPUT) == (INPUT)) /*!< Multiple selection not available: check always true */ 1944 1945 #define IS_COMP_WINDOWMODE(WINDOWMODE) ((WINDOWMODE) == (WINDOWMODE)) /*!< Not available: check always true */ 1946 1947 #define IS_COMP_OUTPUT(OUTPUT) (((OUTPUT) == COMP_OUTPUT_NONE) || \ 1948 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 1949 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 1950 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 1951 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 1952 ((OUTPUT) == COMP_OUTPUT_TIM2IC2) || \ 1953 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 1954 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 1955 ((OUTPUT) == COMP_OUTPUT_COMP6_TIM2OCREFCLR) || \ 1956 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 1957 ((OUTPUT) == COMP_OUTPUT_TIM3IC3) || \ 1958 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 1959 ((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \ 1960 ((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR) || \ 1961 ((OUTPUT) == COMP_OUTPUT_TIM16IC1) || \ 1962 ((OUTPUT) == COMP_OUTPUT_TIM16OCREFCLR)) 1963 1964 #define IS_COMP_OUTPUT_INSTANCE(INSTANCE, OUTPUT) \ 1965 ((((INSTANCE) == COMP2) && \ 1966 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 1967 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 1968 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 1969 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 1970 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 1971 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 1972 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 1973 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 1974 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR))) \ 1975 || \ 1976 (((INSTANCE) == COMP4) && \ 1977 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 1978 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 1979 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 1980 ((OUTPUT) == COMP_OUTPUT_TIM3IC3) || \ 1981 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 1982 ((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \ 1983 ((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR))) \ 1984 || \ 1985 (((INSTANCE) == COMP6) && \ 1986 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 1987 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 1988 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 1989 ((OUTPUT) == COMP_OUTPUT_TIM2IC2) || \ 1990 ((OUTPUT) == COMP_OUTPUT_COMP6_TIM2OCREFCLR) || \ 1991 ((OUTPUT) == COMP_OUTPUT_TIM16IC1) || \ 1992 ((OUTPUT) == COMP_OUTPUT_TIM16OCREFCLR)))) 1993 1994 #define IS_COMP_MODE(MODE) ((MODE) == (MODE)) /*!< Not available: check always true */ 1995 1996 #define IS_COMP_HYSTERESIS(HYSTERESIS) ((HYSTERESIS) == (HYSTERESIS)) /*!< Not available: check always true */ 1997 1998 #define IS_COMP_BLANKINGSRCE(SOURCE) (((SOURCE) == COMP_BLANKINGSRCE_NONE) || \ 1999 ((SOURCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2000 ((SOURCE) == COMP_BLANKINGSRCE_TIM2OC3) || \ 2001 ((SOURCE) == COMP_BLANKINGSRCE_TIM3OC3) || \ 2002 ((SOURCE) == COMP_BLANKINGSRCE_TIM3OC4) || \ 2003 ((SOURCE) == COMP_BLANKINGSRCE_TIM2OC4) || \ 2004 ((SOURCE) == COMP_BLANKINGSRCE_TIM15OC1) || \ 2005 ((SOURCE) == COMP_BLANKINGSRCE_TIM15OC2)) 2006 2007 /* STM32F301x6/x8, STM32F302x6/x8, STM32F303x6/x8, STM32F334x4/6U/8U, STM32F318xx/STM32F328xx devices comparator instances blanking source values */ 2008 #define IS_COMP_BLANKINGSRCE_INSTANCE(INSTANCE, BLANKINGSRCE) \ 2009 ((((INSTANCE) == COMP2) && \ 2010 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2011 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2012 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC3) || \ 2013 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC3))) \ 2014 || \ 2015 (((INSTANCE) == COMP4) && \ 2016 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2017 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC4) || \ 2018 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC1))) \ 2019 || \ 2020 (((INSTANCE) == COMP6) && \ 2021 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2022 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC4) || \ 2023 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC2)))) 2024 2025 #endif /* STM32F303x8 || STM32F334x8 || STM32F328xx */ 2026 2027 #if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) 2028 2029 #define IS_COMP_INVERTINGINPUT(INPUT) (((INPUT) == COMP_INVERTINGINPUT_1_4VREFINT) || \ 2030 ((INPUT) == COMP_INVERTINGINPUT_1_2VREFINT) || \ 2031 ((INPUT) == COMP_INVERTINGINPUT_3_4VREFINT) || \ 2032 ((INPUT) == COMP_INVERTINGINPUT_VREFINT) || \ 2033 ((INPUT) == COMP_INVERTINGINPUT_DAC1_CH1) || \ 2034 ((INPUT) == COMP_INVERTINGINPUT_DAC1_CH2) || \ 2035 ((INPUT) == COMP_INVERTINGINPUT_IO1) || \ 2036 ((INPUT) == COMP_INVERTINGINPUT_IO2)) 2037 2038 #define IS_COMP_NONINVERTINGINPUT(INPUT) (((INPUT) == COMP_NONINVERTINGINPUT_IO1) || \ 2039 ((INPUT) == COMP_NONINVERTINGINPUT_IO2) || \ 2040 ((INPUT) == COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED)) 2041 2042 /* STM32F302xB/xC, STM32F303xB/xC, STM32F358xx devices comparator instances non inverting source values */ 2043 #define IS_COMP_NONINVERTINGINPUT_INSTANCE(INSTANCE, INPUT) \ 2044 ((((INSTANCE) == COMP1) && \ 2045 (((INPUT) == COMP_NONINVERTINGINPUT_IO1) || \ 2046 ((INPUT) == COMP_NONINVERTINGINPUT_IO2) || \ 2047 ((INPUT) == COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED))) \ 2048 || \ 2049 ((((INPUT) == COMP_NONINVERTINGINPUT_IO1) || \ 2050 ((INPUT) == COMP_NONINVERTINGINPUT_IO2)))) 2051 2052 #define IS_COMP_WINDOWMODE(WINDOWMODE) (((WINDOWMODE) == COMP_WINDOWMODE_DISABLE) || \ 2053 ((WINDOWMODE) == COMP_WINDOWMODE_ENABLE)) 2054 2055 #define IS_COMP_MODE(MODE) (((MODE) == COMP_MODE_HIGHSPEED) || \ 2056 ((MODE) == COMP_MODE_MEDIUMSPEED) || \ 2057 ((MODE) == COMP_MODE_LOWPOWER) || \ 2058 ((MODE) == COMP_MODE_ULTRALOWPOWER)) 2059 2060 #define IS_COMP_HYSTERESIS(HYSTERESIS) (((HYSTERESIS) == COMP_HYSTERESIS_NONE) || \ 2061 ((HYSTERESIS) == COMP_HYSTERESIS_LOW) || \ 2062 ((HYSTERESIS) == COMP_HYSTERESIS_MEDIUM) || \ 2063 ((HYSTERESIS) == COMP_HYSTERESIS_HIGH)) 2064 2065 #if defined(STM32F302xC) 2066 2067 #define IS_COMP_OUTPUT(OUTPUT) (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2068 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2069 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 2070 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2071 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2072 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 2073 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2074 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2075 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 2076 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 2077 ((OUTPUT) == COMP_OUTPUT_TIM3IC3) || \ 2078 ((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \ 2079 ((OUTPUT) == COMP_OUTPUT_TIM4IC2) || \ 2080 ((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR) || \ 2081 ((OUTPUT) == COMP_OUTPUT_TIM2IC2) || \ 2082 ((OUTPUT) == COMP_OUTPUT_COMP6_TIM2OCREFCLR) || \ 2083 ((OUTPUT) == COMP_OUTPUT_TIM16OCREFCLR) || \ 2084 ((OUTPUT) == COMP_OUTPUT_TIM16IC1) || \ 2085 ((OUTPUT) == COMP_OUTPUT_TIM4IC4)) 2086 2087 #define IS_COMP_OUTPUT_INSTANCE(INSTANCE, OUTPUT) \ 2088 ((((INSTANCE) == COMP1) && \ 2089 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2090 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2091 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 2092 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2093 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 2094 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2095 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2096 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2097 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 2098 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR))) \ 2099 || \ 2100 (((INSTANCE) == COMP2) && \ 2101 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2102 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2103 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 2104 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2105 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 2106 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2107 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2108 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2109 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 2110 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR))) \ 2111 || \ 2112 (((INSTANCE) == COMP4) && \ 2113 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2114 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2115 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 2116 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2117 ((OUTPUT) == COMP_OUTPUT_TIM3IC3) || \ 2118 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 2119 ((OUTPUT) == COMP_OUTPUT_TIM4IC2) || \ 2120 ((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \ 2121 ((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR))) \ 2122 || \ 2123 (((INSTANCE) == COMP6) && \ 2124 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2125 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2126 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 2127 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2128 ((OUTPUT) == COMP_OUTPUT_TIM2IC2) || \ 2129 ((OUTPUT) == COMP_OUTPUT_COMP6_TIM2OCREFCLR) || \ 2130 ((OUTPUT) == COMP_OUTPUT_TIM4IC4) || \ 2131 ((OUTPUT) == COMP_OUTPUT_TIM16IC1) || \ 2132 ((OUTPUT) == COMP_OUTPUT_TIM16OCREFCLR)))) 2133 2134 #define IS_COMP_BLANKINGSRCE(SOURCE) (((SOURCE) == COMP_BLANKINGSRCE_NONE) || \ 2135 ((SOURCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2136 ((SOURCE) == COMP_BLANKINGSRCE_TIM2OC3) || \ 2137 ((SOURCE) == COMP_BLANKINGSRCE_TIM3OC3) || \ 2138 ((SOURCE) == COMP_BLANKINGSRCE_TIM3OC4) || \ 2139 ((SOURCE) == COMP_BLANKINGSRCE_TIM2OC4) || \ 2140 ((SOURCE) == COMP_BLANKINGSRCE_TIM15OC1) || \ 2141 ((SOURCE) == COMP_BLANKINGSRCE_TIM15OC2)) 2142 2143 /* STM32F302xB/STM32F302xC/STM32F302xE devices comparator instances blanking source values */ 2144 #define IS_COMP_BLANKINGSRCE_INSTANCE(INSTANCE, BLANKINGSRCE) \ 2145 (((((INSTANCE) == COMP1) || ((INSTANCE) == COMP2)) && \ 2146 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2147 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2148 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC3) || \ 2149 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC3))) \ 2150 || \ 2151 (((INSTANCE) == COMP4) && \ 2152 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2153 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC4) || \ 2154 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC1))) \ 2155 || \ 2156 (((INSTANCE) == COMP6) && \ 2157 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2158 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC4) || \ 2159 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC2)))) 2160 2161 #endif /* STM32F302xC */ 2162 2163 #if defined(STM32F303xC) || defined(STM32F358xx) 2164 2165 #define IS_COMP_OUTPUT(OUTPUT) (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2166 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2167 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2168 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2169 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 2170 ((OUTPUT) == COMP_OUTPUT_TIM1IC2) || \ 2171 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2172 ((OUTPUT) == COMP_OUTPUT_TIM2IC1) || \ 2173 ((OUTPUT) == COMP_OUTPUT_TIM2IC2) || \ 2174 ((OUTPUT) == COMP_OUTPUT_TIM2IC3) || \ 2175 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2176 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2177 ((OUTPUT) == COMP_OUTPUT_COMP6_TIM2OCREFCLR) || \ 2178 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 2179 ((OUTPUT) == COMP_OUTPUT_TIM3IC2) || \ 2180 ((OUTPUT) == COMP_OUTPUT_TIM3IC3) || \ 2181 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 2182 ((OUTPUT) == COMP_OUTPUT_TIM4IC1) || \ 2183 ((OUTPUT) == COMP_OUTPUT_TIM4IC2) || \ 2184 ((OUTPUT) == COMP_OUTPUT_TIM4IC3) || \ 2185 ((OUTPUT) == COMP_OUTPUT_TIM4IC4) || \ 2186 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2187 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2188 ((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \ 2189 ((OUTPUT) == COMP_OUTPUT_TIM15IC1) || \ 2190 ((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \ 2191 ((OUTPUT) == COMP_OUTPUT_TIM15BKIN) || \ 2192 ((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR) || \ 2193 ((OUTPUT) == COMP_OUTPUT_TIM16BKIN) || \ 2194 ((OUTPUT) == COMP_OUTPUT_TIM16IC1) || \ 2195 ((OUTPUT) == COMP_OUTPUT_TIM16OCREFCLR) || \ 2196 ((OUTPUT) == COMP_OUTPUT_TIM17BKIN) || \ 2197 ((OUTPUT) == COMP_OUTPUT_TIM17IC1) || \ 2198 ((OUTPUT) == COMP_OUTPUT_TIM17OCREFCLR)) 2199 2200 #define IS_COMP_OUTPUT_INSTANCE(INSTANCE, OUTPUT) \ 2201 ((((INSTANCE) == COMP1) && \ 2202 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2203 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2204 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2205 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2206 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2207 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2208 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 2209 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2210 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2211 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2212 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 2213 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR))) \ 2214 || \ 2215 (((INSTANCE) == COMP2) && \ 2216 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2217 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2218 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2219 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2220 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2221 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2222 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 2223 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2224 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2225 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2226 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 2227 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR))) \ 2228 || \ 2229 (((INSTANCE) == COMP3) && \ 2230 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2231 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2232 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2233 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2234 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2235 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2236 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2237 ((OUTPUT) == COMP_OUTPUT_TIM3IC2) || \ 2238 ((OUTPUT) == COMP_OUTPUT_TIM4IC1) || \ 2239 ((OUTPUT) == COMP_OUTPUT_TIM15IC1) || \ 2240 ((OUTPUT) == COMP_OUTPUT_TIM15BKIN))) \ 2241 || \ 2242 (((INSTANCE) == COMP4) && \ 2243 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2244 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2245 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2246 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2247 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2248 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2249 ((OUTPUT) == COMP_OUTPUT_TIM3IC3) || \ 2250 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 2251 ((OUTPUT) == COMP_OUTPUT_TIM4IC2) || \ 2252 ((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \ 2253 ((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \ 2254 ((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR))) \ 2255 || \ 2256 (((INSTANCE) == COMP5) && \ 2257 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2258 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2259 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2260 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2261 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2262 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2263 ((OUTPUT) == COMP_OUTPUT_TIM2IC1) || \ 2264 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 2265 ((OUTPUT) == COMP_OUTPUT_TIM4IC3) || \ 2266 ((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \ 2267 ((OUTPUT) == COMP_OUTPUT_TIM16BKIN) || \ 2268 ((OUTPUT) == COMP_OUTPUT_TIM17IC1))) \ 2269 || \ 2270 (((INSTANCE) == COMP6) && \ 2271 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2272 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2273 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2274 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2275 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2276 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2277 ((OUTPUT) == COMP_OUTPUT_TIM2IC2) || \ 2278 ((OUTPUT) == COMP_OUTPUT_COMP6_TIM2OCREFCLR) || \ 2279 ((OUTPUT) == COMP_OUTPUT_TIM4IC4) || \ 2280 ((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \ 2281 ((OUTPUT) == COMP_OUTPUT_TIM16IC1) || \ 2282 ((OUTPUT) == COMP_OUTPUT_TIM16OCREFCLR))) \ 2283 || \ 2284 (((INSTANCE) == COMP7) && \ 2285 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2286 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2287 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2288 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2289 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2290 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2291 ((OUTPUT) == COMP_OUTPUT_TIM1IC2) || \ 2292 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2293 ((OUTPUT) == COMP_OUTPUT_TIM2IC3) || \ 2294 ((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \ 2295 ((OUTPUT) == COMP_OUTPUT_TIM17BKIN) || \ 2296 ((OUTPUT) == COMP_OUTPUT_TIM17OCREFCLR)))) 2297 2298 #define IS_COMP_BLANKINGSRCE(SOURCE) (((SOURCE) == COMP_BLANKINGSRCE_NONE) || \ 2299 ((SOURCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2300 ((SOURCE) == COMP_BLANKINGSRCE_TIM2OC3) || \ 2301 ((SOURCE) == COMP_BLANKINGSRCE_TIM3OC3) || \ 2302 ((SOURCE) == COMP_BLANKINGSRCE_TIM2OC4) || \ 2303 ((SOURCE) == COMP_BLANKINGSRCE_TIM8OC5) || \ 2304 ((SOURCE) == COMP_BLANKINGSRCE_TIM3OC4) || \ 2305 ((SOURCE) == COMP_BLANKINGSRCE_TIM15OC1) || \ 2306 ((SOURCE) == COMP_BLANKINGSRCE_TIM15OC2)) 2307 2308 /* STM32F303xE/STM32F398xx/STM32F303xB/STM32F303xC/STM32F358xx devices comparator instances blanking source values */ 2309 #define IS_COMP_BLANKINGSRCE_INSTANCE(INSTANCE, BLANKINGSRCE) \ 2310 (((((INSTANCE) == COMP1) || ((INSTANCE) == COMP2)) && \ 2311 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2312 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2313 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC3) || \ 2314 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC3))) \ 2315 || \ 2316 (((INSTANCE) == COMP3) && \ 2317 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2318 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2319 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC4))) \ 2320 || \ 2321 (((INSTANCE) == COMP4) && \ 2322 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2323 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC4) || \ 2324 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM8OC5) || \ 2325 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC1))) \ 2326 || \ 2327 (((INSTANCE) == COMP5) && \ 2328 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2329 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM8OC5) || \ 2330 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC3))) \ 2331 || \ 2332 (((INSTANCE) == COMP6) && \ 2333 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2334 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM8OC5) || \ 2335 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC4) || \ 2336 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC2))) \ 2337 || \ 2338 (((INSTANCE) == COMP7) && \ 2339 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2340 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2341 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM8OC5) || \ 2342 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC2)))) 2343 2344 #endif /* STM32F303xC || STM32F358xx */ 2345 2346 #endif /* STM32F302xC || STM32F303xC || STM32F358xx */ 2347 2348 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) 2349 2350 #define IS_COMP_INVERTINGINPUT(INPUT) (((INPUT) == COMP_INVERTINGINPUT_1_4VREFINT) || \ 2351 ((INPUT) == COMP_INVERTINGINPUT_1_2VREFINT) || \ 2352 ((INPUT) == COMP_INVERTINGINPUT_3_4VREFINT) || \ 2353 ((INPUT) == COMP_INVERTINGINPUT_VREFINT) || \ 2354 ((INPUT) == COMP_INVERTINGINPUT_DAC1_CH1) || \ 2355 ((INPUT) == COMP_INVERTINGINPUT_DAC1_CH2) || \ 2356 ((INPUT) == COMP_INVERTINGINPUT_IO1) || \ 2357 ((INPUT) == COMP_INVERTINGINPUT_IO2)) 2358 2359 #define IS_COMP_NONINVERTINGINPUT(INPUT) (((INPUT) == COMP_NONINVERTINGINPUT_IO1) || \ 2360 ((INPUT) == COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED)) 2361 2362 /* STM32F302xE/STM32F303xE/STM32F398xx devices comparator instances non inverting source values */ 2363 #define IS_COMP_NONINVERTINGINPUT_INSTANCE(INSTANCE, INPUT) \ 2364 ((((INSTANCE) == COMP1) && \ 2365 (((INPUT) == COMP_NONINVERTINGINPUT_IO1) || \ 2366 ((INPUT) == COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED))) \ 2367 || \ 2368 (((INPUT) == COMP_NONINVERTINGINPUT_IO1))) 2369 2370 #define IS_COMP_WINDOWMODE(WINDOWMODE) ((WINDOWMODE) == (WINDOWMODE)) /*!< Not available: check always true */ 2371 2372 #define IS_COMP_MODE(MODE) ((MODE) == (MODE)) /*!< Not available: check always true */ 2373 2374 #define IS_COMP_HYSTERESIS(HYSTERESIS) ((HYSTERESIS) == (HYSTERESIS)) /*!< Not available: check always true */ 2375 2376 #if defined(STM32F302xE) 2377 2378 #define IS_COMP_OUTPUT(OUTPUT) (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2379 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2380 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 2381 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2382 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2383 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 2384 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2385 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2386 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 2387 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 2388 ((OUTPUT) == COMP_OUTPUT_TIM3IC3) || \ 2389 ((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \ 2390 ((OUTPUT) == COMP_OUTPUT_TIM4IC2) || \ 2391 ((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR) || \ 2392 ((OUTPUT) == COMP_OUTPUT_TIM2IC2) || \ 2393 ((OUTPUT) == COMP_OUTPUT_COMP6_TIM2OCREFCLR) || \ 2394 ((OUTPUT) == COMP_OUTPUT_TIM16OCREFCLR) || \ 2395 ((OUTPUT) == COMP_OUTPUT_TIM16IC1) || \ 2396 ((OUTPUT) == COMP_OUTPUT_TIM4IC4)) 2397 2398 #define IS_COMP_OUTPUT_INSTANCE(INSTANCE, OUTPUT) \ 2399 ((((INSTANCE) == COMP1) && \ 2400 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2401 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2402 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 2403 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2404 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 2405 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2406 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2407 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2408 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 2409 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR))) \ 2410 || \ 2411 (((INSTANCE) == COMP2) && \ 2412 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2413 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2414 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 2415 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2416 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 2417 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2418 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2419 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2420 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 2421 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR))) \ 2422 || \ 2423 (((INSTANCE) == COMP4) && \ 2424 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2425 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2426 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 2427 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2428 ((OUTPUT) == COMP_OUTPUT_TIM3IC3) || \ 2429 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 2430 ((OUTPUT) == COMP_OUTPUT_TIM4IC2) || \ 2431 ((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \ 2432 ((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR))) \ 2433 || \ 2434 (((INSTANCE) == COMP6) && \ 2435 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2436 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2437 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_BRK2) || \ 2438 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2439 ((OUTPUT) == COMP_OUTPUT_TIM2IC2) || \ 2440 ((OUTPUT) == COMP_OUTPUT_COMP6_TIM2OCREFCLR) || \ 2441 ((OUTPUT) == COMP_OUTPUT_TIM4IC4) || \ 2442 ((OUTPUT) == COMP_OUTPUT_TIM16IC1) || \ 2443 ((OUTPUT) == COMP_OUTPUT_TIM16OCREFCLR)))) 2444 2445 #define IS_COMP_BLANKINGSRCE(SOURCE) (((SOURCE) == COMP_BLANKINGSRCE_NONE) || \ 2446 ((SOURCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2447 ((SOURCE) == COMP_BLANKINGSRCE_TIM2OC3) || \ 2448 ((SOURCE) == COMP_BLANKINGSRCE_TIM3OC3) || \ 2449 ((SOURCE) == COMP_BLANKINGSRCE_TIM3OC4) || \ 2450 ((SOURCE) == COMP_BLANKINGSRCE_TIM2OC4) || \ 2451 ((SOURCE) == COMP_BLANKINGSRCE_TIM15OC1) || \ 2452 ((SOURCE) == COMP_BLANKINGSRCE_TIM15OC2)) 2453 2454 /* STM32F302xB/STM32F302xC/STM32F302xE devices comparator instances blanking source values */ 2455 #define IS_COMP_BLANKINGSRCE_INSTANCE(INSTANCE, BLANKINGSRCE) \ 2456 (((((INSTANCE) == COMP1) || ((INSTANCE) == COMP2)) && \ 2457 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2458 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2459 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC3) || \ 2460 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC3))) \ 2461 || \ 2462 (((INSTANCE) == COMP4) && \ 2463 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2464 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC4) || \ 2465 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC1))) \ 2466 || \ 2467 (((INSTANCE) == COMP6) && \ 2468 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2469 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC4) || \ 2470 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC2)))) 2471 2472 #endif /* STM32F302xE */ 2473 2474 #if defined(STM32F303xE) || defined(STM32F398xx) 2475 2476 #define IS_COMP_OUTPUT(OUTPUT) (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2477 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2478 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 2479 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2480 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2481 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2482 ((OUTPUT) == COMP_OUTPUT_COMP6_TIM2OCREFCLR) || \ 2483 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 2484 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 2485 ((OUTPUT) == COMP_OUTPUT_TIM20OCREFCLR) || \ 2486 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2487 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2488 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2489 ((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR) || \ 2490 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2491 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN) || \ 2492 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN2) || \ 2493 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2) || \ 2494 ((OUTPUT) == COMP_OUTPUT_TIM3IC2) || \ 2495 ((OUTPUT) == COMP_OUTPUT_TIM4IC1) || \ 2496 ((OUTPUT) == COMP_OUTPUT_TIM15IC1) || \ 2497 ((OUTPUT) == COMP_OUTPUT_TIM15BKIN) || \ 2498 ((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \ 2499 ((OUTPUT) == COMP_OUTPUT_TIM3IC3) || \ 2500 ((OUTPUT) == COMP_OUTPUT_TIM4IC2) || \ 2501 ((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \ 2502 ((OUTPUT) == COMP_OUTPUT_TIM2IC1) || \ 2503 ((OUTPUT) == COMP_OUTPUT_TIM4IC3) || \ 2504 ((OUTPUT) == COMP_OUTPUT_TIM16BKIN) || \ 2505 ((OUTPUT) == COMP_OUTPUT_TIM17IC1) || \ 2506 ((OUTPUT) == COMP_OUTPUT_TIM2IC2) || \ 2507 ((OUTPUT) == COMP_OUTPUT_TIM16IC1) || \ 2508 ((OUTPUT) == COMP_OUTPUT_TIM4IC4) || \ 2509 ((OUTPUT) == COMP_OUTPUT_TIM16OCREFCLR) || \ 2510 ((OUTPUT) == COMP_OUTPUT_TIM2IC3) || \ 2511 ((OUTPUT) == COMP_OUTPUT_TIM1IC2) || \ 2512 ((OUTPUT) == COMP_OUTPUT_TIM17BKIN) || \ 2513 ((OUTPUT) == COMP_OUTPUT_TIM17OCREFCLR)) 2514 2515 #define IS_COMP_OUTPUT_INSTANCE(INSTANCE, OUTPUT) \ 2516 ((((INSTANCE) == COMP1) && \ 2517 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2518 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2519 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2520 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2521 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2522 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2523 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN) || \ 2524 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN2) || \ 2525 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2) || \ 2526 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 2527 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2528 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2529 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2530 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 2531 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR))) \ 2532 || \ 2533 (((INSTANCE) == COMP2) && \ 2534 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2535 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2536 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2537 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2538 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2539 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2540 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN) || \ 2541 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN2) || \ 2542 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2) || \ 2543 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \ 2544 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2545 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2546 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2547 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \ 2548 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 2549 ((OUTPUT) == COMP_OUTPUT_TIM20OCREFCLR))) \ 2550 || \ 2551 (((INSTANCE) == COMP3) && \ 2552 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2553 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2554 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2555 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2556 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2557 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2558 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN) || \ 2559 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN2) || \ 2560 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2) || \ 2561 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2562 ((OUTPUT) == COMP_OUTPUT_TIM3IC2) || \ 2563 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2564 ((OUTPUT) == COMP_OUTPUT_TIM4IC1) || \ 2565 ((OUTPUT) == COMP_OUTPUT_TIM15IC1) || \ 2566 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 2567 ((OUTPUT) == COMP_OUTPUT_TIM15BKIN))) \ 2568 || \ 2569 (((INSTANCE) == COMP4) && \ 2570 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2571 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2572 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2573 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2574 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2575 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2576 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN) || \ 2577 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN2) || \ 2578 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2) || \ 2579 ((OUTPUT) == COMP_OUTPUT_TIM3IC3) || \ 2580 ((OUTPUT) == COMP_OUTPUT_TIM4IC2) || \ 2581 ((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \ 2582 ((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \ 2583 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 2584 ((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR))) \ 2585 || \ 2586 (((INSTANCE) == COMP5) && \ 2587 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2588 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2589 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2590 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2591 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2592 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2593 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN) || \ 2594 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN2) || \ 2595 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2) || \ 2596 ((OUTPUT) == COMP_OUTPUT_TIM2IC1) || \ 2597 ((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \ 2598 ((OUTPUT) == COMP_OUTPUT_TIM4IC3) || \ 2599 ((OUTPUT) == COMP_OUTPUT_TIM16BKIN) || \ 2600 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \ 2601 ((OUTPUT) == COMP_OUTPUT_TIM17IC1))) \ 2602 || \ 2603 (((INSTANCE) == COMP6) && \ 2604 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2605 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2606 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2607 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2608 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2609 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2610 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN) || \ 2611 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN2) || \ 2612 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2) || \ 2613 ((OUTPUT) == COMP_OUTPUT_TIM2IC2) || \ 2614 ((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \ 2615 ((OUTPUT) == COMP_OUTPUT_COMP6_TIM2OCREFCLR) || \ 2616 ((OUTPUT) == COMP_OUTPUT_TIM4IC4) || \ 2617 ((OUTPUT) == COMP_OUTPUT_TIM16IC1) || \ 2618 ((OUTPUT) == COMP_OUTPUT_TIM16OCREFCLR))) \ 2619 || \ 2620 (((INSTANCE) == COMP7) && \ 2621 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2622 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \ 2623 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \ 2624 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \ 2625 ((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \ 2626 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \ 2627 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \ 2628 ((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \ 2629 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN) || \ 2630 ((OUTPUT) == COMP_OUTPUT_TIM20BKIN2) || \ 2631 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2) || \ 2632 ((OUTPUT) == COMP_OUTPUT_TIM1IC2) || \ 2633 ((OUTPUT) == COMP_OUTPUT_TIM2IC3) || \ 2634 ((OUTPUT) == COMP_OUTPUT_TIM17BKIN) || \ 2635 ((OUTPUT) == COMP_OUTPUT_TIM17OCREFCLR)))) 2636 2637 #define IS_COMP_BLANKINGSRCE(SOURCE) (((SOURCE) == COMP_BLANKINGSRCE_NONE) || \ 2638 ((SOURCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2639 ((SOURCE) == COMP_BLANKINGSRCE_TIM2OC3) || \ 2640 ((SOURCE) == COMP_BLANKINGSRCE_TIM3OC3) || \ 2641 ((SOURCE) == COMP_BLANKINGSRCE_TIM2OC4) || \ 2642 ((SOURCE) == COMP_BLANKINGSRCE_TIM8OC5) || \ 2643 ((SOURCE) == COMP_BLANKINGSRCE_TIM3OC4) || \ 2644 ((SOURCE) == COMP_BLANKINGSRCE_TIM15OC1) || \ 2645 ((SOURCE) == COMP_BLANKINGSRCE_TIM15OC2)) 2646 2647 /* STM32F303xE/STM32F398xx/STM32F303xB/STM32F303xC/STM32F358xx devices comparator instances blanking source values */ 2648 #define IS_COMP_BLANKINGSRCE_INSTANCE(INSTANCE, BLANKINGSRCE) \ 2649 (((((INSTANCE) == COMP1) || ((INSTANCE) == COMP2)) && \ 2650 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2651 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2652 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC3) || \ 2653 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC3))) \ 2654 || \ 2655 (((INSTANCE) == COMP3) && \ 2656 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2657 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2658 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC4))) \ 2659 || \ 2660 (((INSTANCE) == COMP4) && \ 2661 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2662 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC4) || \ 2663 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM8OC5) || \ 2664 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC1))) \ 2665 || \ 2666 (((INSTANCE) == COMP5) && \ 2667 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2668 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM8OC5) || \ 2669 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM3OC3))) \ 2670 || \ 2671 (((INSTANCE) == COMP6) && \ 2672 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2673 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM8OC5) || \ 2674 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM2OC4) || \ 2675 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC2))) \ 2676 || \ 2677 (((INSTANCE) == COMP7) && \ 2678 (((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \ 2679 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM1OC5) || \ 2680 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM8OC5) || \ 2681 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_TIM15OC2)))) 2682 2683 #endif /* STM32F303xE || STM32F398xx */ 2684 2685 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */ 2686 2687 #if defined(STM32F373xC) || defined(STM32F378xx) 2688 2689 #define IS_COMP_INVERTINGINPUT(INPUT) (((INPUT) == COMP_INVERTINGINPUT_1_4VREFINT) || \ 2690 ((INPUT) == COMP_INVERTINGINPUT_1_2VREFINT) || \ 2691 ((INPUT) == COMP_INVERTINGINPUT_3_4VREFINT) || \ 2692 ((INPUT) == COMP_INVERTINGINPUT_VREFINT) || \ 2693 ((INPUT) == COMP_INVERTINGINPUT_DAC1_CH1) || \ 2694 ((INPUT) == COMP_INVERTINGINPUT_DAC1_CH2) || \ 2695 ((INPUT) == COMP_INVERTINGINPUT_IO1) || \ 2696 ((INPUT) == COMP_INVERTINGINPUT_DAC2_CH1)) 2697 2698 #define IS_COMP_NONINVERTINGINPUT(INPUT) (((INPUT) == COMP_NONINVERTINGINPUT_IO1) || \ 2699 ((INPUT) == COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED)) 2700 2701 /* STM32F373xB/xC, STM32F378xx devices comparator instances non inverting source values */ 2702 #define IS_COMP_NONINVERTINGINPUT_INSTANCE(INSTANCE, INPUT) \ 2703 ((((INSTANCE) == COMP1) && \ 2704 (((INPUT) == COMP_NONINVERTINGINPUT_IO1) || \ 2705 ((INPUT) == COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED))) \ 2706 || \ 2707 (((INPUT) == COMP_NONINVERTINGINPUT_IO1))) 2708 2709 #define IS_COMP_WINDOWMODE(WINDOWMODE) (((WINDOWMODE) == COMP_WINDOWMODE_DISABLE) || \ 2710 ((WINDOWMODE) == COMP_WINDOWMODE_ENABLE)) 2711 2712 #define IS_COMP_MODE(MODE) (((MODE) == COMP_MODE_HIGHSPEED) || \ 2713 ((MODE) == COMP_MODE_MEDIUMSPEED) || \ 2714 ((MODE) == COMP_MODE_LOWPOWER) || \ 2715 ((MODE) == COMP_MODE_ULTRALOWPOWER)) 2716 2717 #define IS_COMP_HYSTERESIS(HYSTERESIS) (((HYSTERESIS) == COMP_HYSTERESIS_NONE) || \ 2718 ((HYSTERESIS) == COMP_HYSTERESIS_LOW) || \ 2719 ((HYSTERESIS) == COMP_HYSTERESIS_MEDIUM) || \ 2720 ((HYSTERESIS) == COMP_HYSTERESIS_HIGH)) 2721 2722 #define IS_COMP_OUTPUT(OUTPUT) (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2723 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2724 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2725 ((OUTPUT) == COMP_OUTPUT_COMP1_TIM3IC1) || \ 2726 ((OUTPUT) == COMP_OUTPUT_COMP1_TIM3OCREFCLR) || \ 2727 ((OUTPUT) == COMP_OUTPUT_COMP2_TIM3IC1) || \ 2728 ((OUTPUT) == COMP_OUTPUT_COMP2_TIM3OCREFCLR) || \ 2729 ((OUTPUT) == COMP_OUTPUT_TIM4IC1) || \ 2730 ((OUTPUT) == COMP_OUTPUT_TIM4OCREFCLR) || \ 2731 ((OUTPUT) == COMP_OUTPUT_TIM5IC4) || \ 2732 ((OUTPUT) == COMP_OUTPUT_TIM5OCREFCLR) || \ 2733 ((OUTPUT) == COMP_OUTPUT_TIM15BKIN) || \ 2734 ((OUTPUT) == COMP_OUTPUT_TIM16BKIN)) 2735 2736 #define IS_COMP_OUTPUT_INSTANCE(INSTANCE, OUTPUT) \ 2737 ((((INSTANCE) == COMP1) && \ 2738 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2739 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2740 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2741 ((OUTPUT) == COMP_OUTPUT_COMP1_TIM3IC1) || \ 2742 ((OUTPUT) == COMP_OUTPUT_COMP1_TIM3OCREFCLR) || \ 2743 ((OUTPUT) == COMP_OUTPUT_TIM5IC4) || \ 2744 ((OUTPUT) == COMP_OUTPUT_TIM5OCREFCLR) || \ 2745 ((OUTPUT) == COMP_OUTPUT_TIM15BKIN))) \ 2746 || \ 2747 (((INSTANCE) == COMP2) && \ 2748 (((OUTPUT) == COMP_OUTPUT_NONE) || \ 2749 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \ 2750 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \ 2751 ((OUTPUT) == COMP_OUTPUT_COMP2_TIM3IC1) || \ 2752 ((OUTPUT) == COMP_OUTPUT_COMP2_TIM3OCREFCLR) || \ 2753 ((OUTPUT) == COMP_OUTPUT_TIM4IC1) || \ 2754 ((OUTPUT) == COMP_OUTPUT_TIM4OCREFCLR) || \ 2755 ((OUTPUT) == COMP_OUTPUT_TIM16BKIN)))) 2756 2757 #define IS_COMP_BLANKINGSRCE(SOURCE) ((SOURCE) == (SOURCE)) /*!< Not available: check always true */ 2758 2759 /* STM32F373xB/STM32F373xC/STM32F378xx devices comparator instances blanking source values */ 2760 #define IS_COMP_BLANKINGSRCE_INSTANCE(INSTANCE, BLANKINGSRCE) \ 2761 ((((INSTANCE) == COMP1) || ((INSTANCE) == COMP2)) && \ 2762 ((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE)) 2763 2764 #endif /* STM32F373xC || STM32F378xx */ 2765 2766 /** 2767 * @} 2768 */ 2769 2770 /** 2771 * @} 2772 */ 2773 2774 /** 2775 * @} 2776 */ 2777 2778 /** 2779 * @} 2780 */ 2781 2782 #ifdef __cplusplus 2783 } 2784 #endif 2785 2786 #endif /* __STM32F3xx_HAL_COMP_EX_H */ 2787 2788
