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Searched defs:CMC_SRIF_CDOG0_MASK (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h2771 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h2771 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h2771 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h2771 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h4974 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h4974 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h4974 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h4974 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h4974 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h4974 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h9344 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h9314 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h11628 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
DMCXN546_cm33_core1.h11628 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h11628 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
DMCXN547_cm33_core1.h11628 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h11674 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
DMCXN947_cm33_core0.h11674 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h11674 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro
DMCXN946_cm33_core1.h11674 #define CMC_SRIF_CDOG0_MASK (0x4000000U) macro