Searched defs:CLK_PLLCTL_PLLSRC_HIRC (Results 1 – 2 of 2) sorted by relevance
270 #define CLK_PLLCTL_PLLSRC_HIRC 0x00080000UL /*!< For PLL clock source is HIRC. 2MHz < FIN/NR < … macro
281 #define CLK_PLLCTL_PLLSRC_HIRC 0x00080000UL /*!< For PLL clock source is HIRC. 2MHz < FIN/NR < … macro