| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV10Z7/ |
| D | MKV10Z7.h | 2540 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV10Z1287/ |
| D | MKV10Z1287.h | 2801 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV11Z7/ |
| D | MKV11Z7.h | 3589 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM34Z7/ |
| D | MKM34Z7.h | 4608 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM35Z7/ |
| D | MKM35Z7.h | 4501 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV56F24/ |
| D | MKV56F24.h | 11953 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV58F24/ |
| D | MKV58F24.h | 13719 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK80F25615/ |
| D | MK80F25615.h | 9479 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK82F25615/ |
| D | MK82F25615.h | 9473 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK27FA15/ |
| D | MK27FA15.h | 8804 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK28FA15/ |
| D | MK28FA15.h | 8806 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/ |
| D | MIMXRT1011.h | 12415 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/ |
| D | MCIMX7U5_cm4.h | 6091 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/ |
| D | MCIMX7U3_cm4.h | 6090 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/ |
| D | MIMXRT1015.h | 15106 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 18568 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 18552 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/ |
| D | MIMXRT1041.h | 20844 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/ |
| D | MIMXRT1051.h | 19602 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/ |
| D | MIMXRT1052.h | 20387 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/ |
| D | MIMXRT1061.h | 21217 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/ |
| D | MIMXRT1042.h | 20846 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/ |
| D | MIMXRT1062.h | 22003 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/ |
| D | MIMXRT1064.h | 22077 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/ |
| D | MIMXRT1165_cm4.h | 35645 __IO uint8_t CLKCTRL; /**< Clock Control Register, offset: 0x4 */ member
|
