Searched defs:CIMR0 (Results 1 – 7 of 7) sorted by relevance
85 __IO uint32_t CIMR0; /**< Channel Interrupt Mask 0, offset: 0x24 */ member
90 …__IO uint32_t CIMR0; /**< EOC Interrupt Enable For Precision Inputs, o… member
622 __IO uint32_t CIMR0; /**< Channel Interrupt Mask 0, offset: 0x24 */ member
62816 __IO uint32_t CIMR0; /**< Channel Interrupt Mask 0, offset: 0x24 */ member
624 __IO uint32_t CIMR0; /**< Channel Interrupt Mask 0, offset: 0x24 */ member
558 __IO uint32_t CIMR0; /**< Channel Interrupt Mask 0, offset: 0x24 */ member
548 __IO uint32_t CIMR0; /**< Channel Interrupt Mask 0, offset: 0x24 */ member
