Searched defs:CIMR0 (Results 1 – 4 of 4) sorted by relevance
85 __IO uint32_t CIMR0; /**< Channel Interrupt Mask 0, offset: 0x24 */ member
90 …__IO uint32_t CIMR0; /**< EOC Interrupt Enable For Precision Inputs, o… member
88100 __IO uint32_t CIMR0; /**< Channel Interrupt Mask 0, offset: 0x24 */ member
76537 __IO uint32_t CIMR0; /**< Channel Interrupt Mask 0, offset: 0x24 */ member
